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New mainboard: X2E_N150

Browse Source 
Patch in Gerrit: https://review.coreboot.org/c/coreboot/+/89281
Not working: USB3 ports only work at USB2 speeds.

IFD:
Modified the original by:
- Removing Device Exp2 region (empty anyway)
- Enlarging the BIOS region to use this freed space
- Setting the HAP bit in PCHSTRP55 using a fork of
  me_cleaner: https://github.com/XutaxKamay/me_cleaner

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
Signed-off-by: Leah Rowe <leah@libreboot.org>
This commit is contained in:
Riku Viitanen
2025-09-27 10:53:05 +03:00
parent c9d6143e20
commit b4c3bafb0e
10 changed files with 1137 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
config/coreboot/default/nuke.list
View File

@@ -1,5 +1,4 @@
3rdparty/fsp/EagleStreamFspBinPkg
3rdparty/fsp/AlderLakeFspBinPkg
3rdparty/fsp/MeteorLakeFspBinPkg
3rdparty/fsp/IceLakeFspBinPkg
3rdparty/fsp/AmberLakeFspBinPkg

110
config/coreboot/default/patches/0036-mb-topton-adl-Add-TWL-variant-X2E_N150.patch Normal file
View File

@@ -0,0 +1,110 @@
From 96a6735e7b59f1e538ed8c87993ed2d217c27891 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Thu, 25 Sep 2025 22:45:37 +0300
Subject: [PATCH] mb/topton/adl: Add TWL variant (X2E_N150)
Seems to be the same board but with a Twin Lake processor.
VBT extracted from vendor firmware. This makes HDMI and
DisplayPort work.
Change-Id: I1018042802cbb8010888847226a2117fd9dfaeb0
Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
src/mainboard/topton/adl/Kconfig | 12 +++++++++---
src/mainboard/topton/adl/Kconfig.name | 3 +++
src/mainboard/topton/adl/data_twl.vbt | Bin 0 -> 9216 bytes
3 files changed, 12 insertions(+), 3 deletions(-)
create mode 100644 src/mainboard/topton/adl/data_twl.vbt
diff --git a/src/mainboard/topton/adl/Kconfig b/src/mainboard/topton/adl/Kconfig
index ffdfae1eee..331e1d624d 100644
--- a/src/mainboard/topton/adl/Kconfig
+++ b/src/mainboard/topton/adl/Kconfig
@@ -1,6 +1,6 @@
## SPDX-License-Identifier: GPL-2.0-or-later
-if BOARD_TOPTON_X2F_N100
+if BOARD_TOPTON_X2F_N100 || BOARD_TOPTON_X2E_N150
config BOARD_SPECIFIC_OPTIONS
def_bool y
@@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS
select SUPERIO_ITE_IT8625E
select DRIVERS_UART_8250IO
select SOC_INTEL_ALDERLAKE_PCH_N
+ select SOC_INTEL_TWINLAKE if BOARD_TOPTON_X2E_N150
select INTEL_GMA_HAVE_VBT
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select HAVE_INTEL_PTT
@@ -20,7 +21,12 @@ config BOARD_SPECIFIC_OPTIONS
config MAINBOARD_DIR
default "topton/adl"
+config INTEL_GMA_VBT_FILE
+ default "src/mainboard/\$(MAINBOARDDIR)/data.vbt" if BOARD_TOPTON_X2F_N100
+ default "src/mainboard/\$(MAINBOARDDIR)/data_twl.vbt" if BOARD_TOPTON_X2E_N150
+
config MAINBOARD_PART_NUMBER
- default "X2F_N100"
+ default "X2F_N100" if BOARD_TOPTON_X2F_N100
+ default "X2E_N150" if BOARD_TOPTON_X2E_N150
-endif # BOARD_TOPTON_X2F_N100
+endif # BOARD_TOPTON_X2F_N100 || BOARD_TOPTON_X2E_N150
diff --git a/src/mainboard/topton/adl/Kconfig.name b/src/mainboard/topton/adl/Kconfig.name
index 5b8b5ff602..db0eef29be 100644
--- a/src/mainboard/topton/adl/Kconfig.name
+++ b/src/mainboard/topton/adl/Kconfig.name
@@ -2,3 +2,6 @@
config BOARD_TOPTON_X2F_N100
bool "X2F_N100"
+
+config BOARD_TOPTON_X2E_N150
+ bool "X2E_N150"
diff --git a/src/mainboard/topton/adl/data_twl.vbt b/src/mainboard/topton/adl/data_twl.vbt
new file mode 100644
index 0000000000000000000000000000000000000000..05fbd5807365b3343e55ecedbd12fabb8a3199e9
GIT binary patch
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--
2.51.0

29
config/coreboot/default/patches/0037-alderlake-Kconfig-disable-MRC_CACHE_USING_MRC_VERSIO.patch Normal file
View File

@@ -0,0 +1,29 @@
From 31aae60ea0de0903759082cf90f78b8012850c5f Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sat, 27 Sep 2025 23:30:46 +0300
Subject: [PATCH] soc/intel/alderlake: Disable MRC_CACHE_USING_MRC_VERSION
There's some issue with building against the FSP headers in src/vendorcode.
Headers in 3rdparty/fsp work, but since FspProducerDataHeaer.h is missing
from there, we need to disable MRC_CACHE_USING_MRC_VERSION by force.
Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
src/soc/intel/alderlake/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 51bdf98b9d..739faa3808 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -34,7 +34,6 @@ config SOC_INTEL_ALDERLAKE
select INTEL_GMA_VERSION_2
select INTEL_TXT_LIB
select MP_SERVICES_PPI_V2
- select MRC_CACHE_USING_MRC_VERSION if (SOC_INTEL_ALDERLAKE_PCH_N || SOC_INTEL_RAPTORLAKE) && !FSP_USE_REPO
select MRC_SETTINGS_PROTECT
select PARALLEL_MP_AP_WORK
select PLATFORM_USES_FSP2_2
--
2.51.0

847
config/coreboot/x2e_n150/config/libgfxinit_corebootfb Normal file
View File

@@ -0,0 +1,847 @@
#
# Automatically generated file; DO NOT EDIT.
# coreboot configuration
#
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_LTO is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_OPTION_BACKEND_NONE=y
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
CONFIG_USE_BLOBS=y
# CONFIG_USE_AMD_BLOBS is not set
# CONFIG_USE_QC_BLOBS is not set
# CONFIG_COVERAGE is not set
# CONFIG_UBSAN is not set
CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
# CONFIG_ASAN is not set
# CONFIG_NO_STAGE_CACHE is not set
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
# Mainboard
#
#
# Important: Run 'make distclean' before switching boards
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ARM is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_ERYING is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HARDKERNEL is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LATTEPANDA is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_MITAC_COMPUTING is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_NOVACUSTOM is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
# CONFIG_VENDOR_PACKARDBELL is not set
# CONFIG_VENDOR_PCENGINES is not set
# CONFIG_VENDOR_PINE64 is not set
# CONFIG_VENDOR_PORTWELL is not set
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
CONFIG_VENDOR_TOPTON=y
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="X2E_N150"
CONFIG_MAINBOARD_VERSION="1.0"
CONFIG_MAINBOARD_DIR="topton/adl"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=512
CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="TOPTON"
CONFIG_CBFS_SIZE=0xBEC000
CONFIG_CONSOLE_SERIAL=y
CONFIG_MAX_CPUS=24
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_UART_FOR_CONSOLE=0
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
# CONFIG_VGA_BIOS is not set
CONFIG_PCIEXP_ASPM=y
CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="TOPTON"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
# CONFIG_FATAL_ASSERTS is not set
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data_twl.vbt"
# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0x4000
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="X2E_N150"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_USE_PM_ACPI_TIMER=y
CONFIG_DCACHE_RAM_BASE=0xfef00000
CONFIG_DCACHE_RAM_SIZE=0xc0000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x88000
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/x2e_n150/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/x2e_n150/me.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x40000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
# CONFIG_USE_LEGACY_8254_TIMER is not set
# CONFIG_DEBUG_SMI is not set
CONFIG_HAVE_IFD_BIN=y
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_TTYS0_BAUD=115200
# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
CONFIG_D3COLD_SUPPORT=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_FSP_TEMP_RAM_SIZE=0x20000
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TME_KEY_REGENERATION_ON_WARM_BOOT is not set
# CONFIG_BOARD_TOPTON_X2F_N100 is not set
CONFIG_BOARD_TOPTON_X2E_N150=y
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
CONFIG_ROM_SIZE=0x01000000
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
# end of Mainboard
#
# Chipset
#
#
# SoC
#
CONFIG_CHIPSET_DEVICETREE="soc/intel/alderlake/chipset.cb"
CONFIG_FSP_M_FILE="../../../vendorfiles/alderlake-n/Fsp_M.fd"
CONFIG_FSP_S_FILE="../../../vendorfiles/alderlake-n/Fsp_S.fd"
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x200000
CONFIG_SMM_MODULE_STACK_SIZE=0x800
CONFIG_ACPI_BERT_SIZE=0x0
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=133
CONFIG_VBOOT_HASH_BLOCK_SIZE=0x1000
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
CONFIG_SOC_INTEL_ALDERLAKE=y
CONFIG_SOC_INTEL_TWINLAKE=y
CONFIG_SOC_INTEL_ALDERLAKE_PCH_N=y
CONFIG_SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT=y
CONFIG_ALDERLAKE_CAR_ENHANCED_NEM=y
CONFIG_EXT_BIOS_WIN_BASE=0xf8000000
CONFIG_EXT_BIOS_WIN_SIZE=0x2000000
CONFIG_IFD_CHIPSET="adl"
CONFIG_IED_REGION_SIZE=0x400000
CONFIG_MAX_PCH_ROOT_PORTS=12
CONFIG_MAX_CPU_ROOT_PORTS=0
CONFIG_MAX_TBT_ROOT_PORTS=0
CONFIG_MAX_ROOT_PORTS=12
CONFIG_MAX_PCIE_CLOCK_SRC=5
CONFIG_MAX_PCIE_CLOCK_REQ=5
CONFIG_PCR_BASE_ADDRESS=0xfd000000
CONFIG_CPU_BCLK_MHZ=100
CONFIG_SOC_INTEL_PERFORMANCE_CORE_SCALE_FACTOR=127
CONFIG_SOC_INTEL_EFFICIENT_CORE_SCALE_FACTOR=100
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
CONFIG_CPU_XTAL_HZ=38400000
CONFIG_SOC_INTEL_UFS_CLK_FREQ_HZ=19200000
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=7
CONFIG_SOC_INTEL_I2C_DEV_MAX=8
# CONFIG_ENABLE_SATA_TEST_MODE is not set
CONFIG_SOC_INTEL_UART_DEV_MAX=7
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff
CONFIG_FSP_TYPE_IOT=y
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Include/"
CONFIG_FSP_FD_PATH="3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Fsp.fd"
CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
CONFIG_DATA_BUS_WIDTH=128
CONFIG_DIMMS_PER_CHANNEL=2
CONFIG_MRC_CHANNEL_WIDTH=16
CONFIG_ALDERLAKE_ENABLE_SOC_WORKAROUND=y
CONFIG_SI_DESC_REGION="SI_DESC"
CONFIG_SI_DESC_REGION_SZ=4096
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8258
CONFIG_INTEL_GMA_BCLV_WIDTH=32
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLM_WIDTH=32
CONFIG_FSP_PUBLISH_MBP_HOB=y
# CONFIG_INCLUDE_HSPHY_IN_FMAP is not set
CONFIG_HSPHY_FW_MAX_SIZE=0x8000
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005
CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
CONFIG_MAX_HECI_DEVICES=6
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_HAVE_PAM0_REGISTER=y
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FSP_T_LOCATION=0xfffe0000
CONFIG_INTEL_TME=y
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_SOC_INTEL_COMMON=y
#
# Intel SoC Common Code for IP blocks
#
CONFIG_SOC_INTEL_COMMON_BLOCK=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP_LPM_REQ=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID=y
CONFIG_SOC_INTEL_UFS_OCP_TIMER_DISABLE=y
CONFIG_SOC_INTEL_UFS_LTR_DISQUALIFY=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ASPM=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CNVI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
# CONFIG_USE_COREBOOT_MP_INIT is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
CONFIG_INTEL_CAR_NEM_ENHANCED=y
CONFIG_INTEL_CAR_ENEM_USE_EFFECTIVE_WAY_SIZE=y
CONFIG_CAR_HAS_SF_MASKS=y
CONFIG_COS_MAPPED_TO_MSB=y
CONFIG_CAR_HAS_L3_PROTECTED_WAYS=y
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
CONFIG_USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI=y
CONFIG_CPU_SUPPORTS_INTEL_TME=y
CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
CONFIG_HAVE_HYPERTHREADING=y
CONFIG_FSP_HYPERTHREADING=y
# CONFIG_INTEL_KEYLOCKER is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC=y
CONFIG_SOC_INTEL_CSE_SEND_EOP_LATE=y
CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
CONFIG_SOC_INTEL_CSE_RW_FILE=""
CONFIG_SOC_INTEL_CSE_RW_VERSION=""
CONFIG_SOC_INTEL_CSE_SET_EOP=y
CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
CONFIG_SOC_INTEL_CSE_HAVE_SPEC_SUPPORT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ME_SPEC_16=y
CONFIG_ME_SPEC=16
CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_DTT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_SBI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
# CONFIG_SOC_INTEL_DISABLE_IGD is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
CONFIG_SOC_INTEL_COMMON_BLOCK_IPU=y
CONFIG_SOC_INTEL_COMMON_BLOCK_IRQ=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_MEMINIT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_OC_WDT=y
# CONFIG_SOC_INTEL_COMMON_OC_WDT_ENABLE is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE_RTD3=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
CONFIG_SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_EPOC=y
CONFIG_PMC_IPC_ACPI_INTERFACE=y
CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
CONFIG_HAVE_CAPID_A_REGISTER=y
CONFIG_HAVE_BDSM_BGSM_REGISTER=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS=y
# CONFIG_TCSS_HAS_USBC_OPS is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4=y
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI=y
CONFIG_DEFAULT_SOFTWARE_CONNECTION_MANAGER=y
# CONFIG_FIRMWARE_CONNECTION_MANAGER is not set
CONFIG_SOFTWARE_CONNECTION_MANAGER=y
CONFIG_SOC_INTEL_COMMON_BLOCK_VTD=y
# CONFIG_ENABLE_EARLY_DMA_PROTECTION is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
#
# Intel SoC Common PCH Code
#
CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
#
# Intel SoC Common coreboot stages and non-IP blocks
#
CONFIG_SOC_INTEL_COMMON_BASECODE=y
CONFIG_SOC_INTEL_COMMON_BASECODE_RAMTOP=y
CONFIG_SOC_INTEL_COMMON_RESET=y
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
CONFIG_PAVP=y
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
CONFIG_HAVE_INTEL_COMPLIANCE_TEST_MODE=y
# CONFIG_SOC_INTEL_COMPLIANCE_TEST_MODE is not set
CONFIG_HAS_INTEL_CPU_ROOT_PORTS=y
#
# CPU
#
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
CONFIG_SET_MSR_AESNI_LOCK_BIT=y
CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
CONFIG_CPU_INTEL_COMMON_SMM=y
CONFIG_PARALLEL_MP=y
CONFIG_PARALLEL_MP_AP_WORK=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
#
# Southbridge
#
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
#
# Super I/O
#
CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y
CONFIG_SUPERIO_ITE_ENV_CTRL=y
CONFIG_SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG=y
CONFIG_SUPERIO_ITE_ENV_CTRL_8BIT_PWM=y
CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y
CONFIG_SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN=y
CONFIG_SUPERIO_ITE_IT8625E=y
#
# Embedded Controllers
#
#
# Intel Firmware
#
CONFIG_HAVE_ME_BIN=y
# CONFIG_STITCH_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_UDK_BASE=y
CONFIG_UDK_202111_BINDING=y
CONFIG_UDK_2013_VERSION=2013
CONFIG_UDK_2017_VERSION=2017
CONFIG_UDK_202005_VERSION=202005
CONFIG_UDK_202111_VERSION=202111
CONFIG_UDK_202302_VERSION=202302
CONFIG_UDK_202305_VERSION=202305
CONFIG_UDK_VERSION=202111
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_CUSTOM_BOOTMEDIA=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_IDT_IN_EVERY_STAGE=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
CONFIG_DEFAULT_EBDA_SIZE=0x400
# end of Chipset
#
# Devices
#
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
CONFIG_HAVE_FSP_GOP=y
# CONFIG_VGA_ROM_RUN is not set
CONFIG_RUN_FSP_GOP=y
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
#
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
CONFIG_LINEAR_FRAMEBUFFER=y
# CONFIG_BOOTSPLASH is not set
CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
# end of Display
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_HAVE_VBT=y
CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM=y
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_DRIVERS_EFI_FW_INFO is not set
# CONFIG_ELOG is not set
CONFIG_CACHE_MRC_SETTINGS=y
CONFIG_MRC_SETTINGS_PROTECT=y
# CONFIG_DRIVERS_OPTION_CFR is not set
# CONFIG_SMMSTORE is not set
CONFIG_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
CONFIG_DRIVERS_UART=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_DESIGNWARE=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
# CONFIG_FSP_USE_REPO is not set
# CONFIG_DISPLAY_HOBS is not set
# CONFIG_DISPLAY_UPD_DATA is not set
CONFIG_PLATFORM_USES_FSP2_0=y
CONFIG_PLATFORM_USES_FSP2_1=y
CONFIG_PLATFORM_USES_FSP2_2=y
CONFIG_PLATFORM_USES_FSP2_X86_32=y
CONFIG_HAVE_INTEL_FSP_REPO=y
CONFIG_ADD_FSP_BINARIES=y
CONFIG_FSP_S_CBFS="fsps.bin"
CONFIG_FSP_M_CBFS="fspm.bin"
CONFIG_FSP_FULL_FD=y
CONFIG_FSP_T_RESERVED_SIZE=0x0
CONFIG_FSP_M_XIP=y
CONFIG_FSP_USES_CB_STACK=y
CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
CONFIG_FSPS_HAS_ARCH_UPD=y
CONFIG_FSPS_USE_MULTI_PHASE_INIT=y
CONFIG_FSP_USES_CB_DEBUG_EVENT_HANDLER=y
# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
CONFIG_FSP_ENABLE_SERIAL_DEBUG=y
CONFIG_FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN=y
# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
CONFIG_INTEL_GMA_ACPI=y
CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
CONFIG_INTEL_GMA_OPREGION_2_1=y
CONFIG_INTEL_GMA_VERSION_2=y
CONFIG_HAVE_INTEL_PTT=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_USE_PC_CMOS_ALTCENTURY=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_USB_ACPI=y
CONFIG_DRIVERS_WIFI_GENERIC=y
CONFIG_DRIVERS_MTK_WIFI=y
CONFIG_MP_SERVICES_PPI=y
CONFIG_MP_SERVICES_PPI_V2=y
# end of Generic Drivers
#
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
CONFIG_VBOOT_LIB=y
# end of Verified Boot (vboot)
#
# Trusted Platform Module
#
CONFIG_NO_TPM=y
# CONFIG_TPM1 is not set
# CONFIG_TPM2 is not set
CONFIG_PCR_BOOT_MODE=1
CONFIG_PCR_HWID=1
CONFIG_PCR_SRTM=2
CONFIG_PCR_FW_VER=10
CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
# Memory initialization
#
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
# end of Memory initialization
CONFIG_INTEL_TXT_LIB=y
# CONFIG_STM is not set
# CONFIG_INTEL_CBNT_SUPPORT is not set
CONFIG_BOOTMEDIA_LOCK_NONE=y
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
# CONFIG_BOOTMEDIA_SMM_BWP is not set
# end of Security
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
CONFIG_ACPI_CUSTOM_MADT=y
CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_ACPI_LPIT=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
#
# Console
#
CONFIG_BOOTBLOCK_CONSOLE=y
CONFIG_POSTCAR_CONSOLE=y
CONFIG_SQUELCH_EARLY_SMP=y
#
# I/O mapped, 8250-compatible
#
CONFIG_TTYS0_BASE=0x3f8
#
# Serial port base address = 0x3f8
#
# CONFIG_CONSOLE_SERIAL_921600 is not set
# CONFIG_CONSOLE_SERIAL_460800 is not set
# CONFIG_CONSOLE_SERIAL_230400 is not set
CONFIG_CONSOLE_SERIAL_115200=y
# CONFIG_CONSOLE_SERIAL_57600 is not set
# CONFIG_CONSOLE_SERIAL_38400 is not set
# CONFIG_CONSOLE_SERIAL_19200 is not set
# CONFIG_CONSOLE_SERIAL_9600 is not set
CONFIG_TTYS0_LCS=3
# CONFIG_SPKMODEM is not set
# CONFIG_CONSOLE_NE2K is not set
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
# CONFIG_POST_DEVICE_PCI_PCIE is not set
CONFIG_POST_IO_PORT=0x80
CONFIG_HWBASE_DEBUG_CB=y
# end of Console
CONFIG_ACPI_S1_NOT_SUPPORTED=y
CONFIG_HAVE_ACPI_RESUME=y
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
CONFIG_HAVE_MONOTONIC_TIMER=y
CONFIG_IOAPIC=y
#
# System tables
#
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
#
# Payload
#
CONFIG_PAYLOAD_NONE=y
# end of Payload
#
# Debugging
#
#
# CPU Debug Settings
#
# CONFIG_DISPLAY_MTRRS is not set
#
# Vendorcode Debug Settings
#
#
# BLOB Debug Settings
#
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
# CONFIG_DISPLAY_FSP_HEADER is not set
# CONFIG_VERIFY_HOBS is not set
CONFIG_DISPLAY_FSP_VERSION_INFO=y
# CONFIG_ENABLE_FSP_ERROR_INFO is not set
CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
#
# General Debug Settings
#
# CONFIG_GDB_STUB is not set
CONFIG_HAVE_DEBUG_GPIO=y
# CONFIG_DEBUG_GPIO is not set
# CONFIG_DEBUG_CBFS is not set
CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
#
# Boot Logo Configuration
#
# CONFIG_BMP_LOGO is not set
# end of Boot Logo Configuration
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

13
config/coreboot/x2e_n150/target.cfg Normal file
View File

@@ -0,0 +1,13 @@
# SPDX-License-Identifier: GPL-3.0-or-later
tree="default"
xarch="i386-elf"
payload_seabios="y"
payload_grub="y"
payload_memtest="y"
grub_scan_disk="nvme ahci"
grubtree="xhci"
vcfg="x2e_n150"
build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
IFD_platform="adl"
payload_uboot="amd64"

5
config/git/me_cleaner/pkg.cfg Normal file
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@@ -0,0 +1,5 @@
# SPDX-License-Identifier: GPL-3.0-or-later
rev="f20532d90378120b1ed2e710cecb36505cc70c31"
url="https://codeberg.org/libreboot/me_cleaner"
bkup_url="https://git.disroot.org/libreboot/me_cleaner"

BIN
config/ifd/x2e_n150/ifd Normal file
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71
config/me_cleaner/patches/0001-Add-a-p-option-skip-FPTR-checks.patch Normal file
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@@ -0,0 +1,71 @@
From e9ceef92dc53501d8d6debc9f5ac9580149eb3dc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Sep 2025 22:52:45 +0100
Subject: [PATCH 1/1] Add a -p option (skip FPTR checks)
if you pass -k (keep fptr modules), don't use -r, don't
use -t, you can essentially just use me_cleaner to
extract a ME image without changing it. this is useful
when for example, you just want to set the HAP bit.
however, me_cleaner still performs a FPTR check.
on some newer ME versions, it's always invalid according
to me_cleaner, because for example it doesn't handle
ME16 very well yet.
this patch adds an option to override the FPTR check
either pass -p or --pass-fptr
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
me_cleaner.py | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/me_cleaner.py b/me_cleaner.py
index 473e761..36760fb 100755
--- a/me_cleaner.py
+++ b/me_cleaner.py
@@ -276,8 +276,10 @@ def check_partition_signature(f, offset):
return "{:#x}".format(decrypted_sig).endswith(sha256.hexdigest()) # FIXME
-def print_check_partition_signature(f, offset):
- if check_partition_signature(f, offset):
+def print_check_partition_signature(f, offset, pass_fptr):
+ if pass_fptr:
+ print("Skipping FPTR checks because the user told us to")
+ elif check_partition_signature(f, offset):
print("VALID")
else:
print("INVALID!!")
@@ -517,6 +519,8 @@ if __name__ == "__main__":
"--extract-me)", action="store_true")
parser.add_argument("-k", "--keep-modules", help="don't remove the FTPR "
"modules, even when possible", action="store_true")
+ parser.add_argument("-p", "--pass-fptr", help="skip FTPR signature checks"
+ "regardless of other operations", action="store_true")
bw_list.add_argument("-w", "--whitelist", metavar="whitelist",
help="Comma separated list of additional partitions "
"to keep in the final image. This can be used to "
@@ -1024,12 +1028,14 @@ if __name__ == "__main__":
print("Checking the FTPR RSA signature of the extracted ME "
"image... ", end="")
print_check_partition_signature(mef_copy,
- ftpr_offset + ftpr_mn2_offset)
+ ftpr_offset + ftpr_mn2_offset,
+ args.pass_fptr)
mef_copy.close()
if not me6_ignition:
print("Checking the FTPR RSA signature... ", end="")
- print_check_partition_signature(mef, ftpr_offset + ftpr_mn2_offset)
+ print_check_partition_signature(mef, ftpr_offset + ftpr_mn2_offset,
+ args.pass_fptr)
f.close()
--
2.47.3

35
config/vendor/x2e_n150/pkg.cfg vendored Normal file
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@@ -0,0 +1,35 @@
# SPDX-License-Identifier: GPL-3.0-or-later
DL_hash="0a967d7baa7deea750da426a6e48113d8c8c7a32de0f5e8b0a610169e8c948b81e59003f5095ded75d904ccc30ac4f386ebf0d5d477336a0a167857c262473da"
DL_url="https://archive.org/download/Topton-H30W-1264NP-4L5G-FW/BK12R415.rar"
DL_url_bkup="https://archive.org/download/Topton-H30W-1264NP-4L5G-FW/BK12R415.rar"
# Original is hosted on sharepoint, needs some work to download directly from there
# So for now we rely on archive.org :(
# DL_url_bkup="https://x8sb8-my.sharepoint.com/personal/support_bkipc_com/_layouts/15/onedrive.aspx?ga=1&id=%2Fpersonal%2Fsupport%5Fbkipc%5Fcom%2FDocuments%2FProduct%2FFCBGA1264%2F1264NP%2D4L%2D5G%2FProduct%20Firmware%2FN150%2FBK12R415%2Erar&parent=%2Fpersonal%2Fsupport%5Fbkipc%5Fcom%2FDocuments%2FProduct%2FFCBGA1264%2F1264NP%2D4L%2D5G%2FProduct%20Firmware%2FN150"
ME_bin_hash="3f4b67947c0902c9041043da063af89857fdd8d80bde1f2e294b64cf549c42a2bf94eb5fba3dab06cdb68e7fe2b4315d2ee88ae2f611e0f9552af9fea7d82be8"
# find_me will be skipped if this is y.
# a custom extract function is used instead.
XBMKmecleaner="y"
# on this board, we simply set the HAP bit
# but we do not modify ME at all. this is because
# me_cleaner currently has to way to validate
# the result when neutering. simply setting
# the HAP bit has the same result for users
MEclean="n" # - however:
# we still use me_cleaner, merely to extract, in
# such circumstances, otherwise lbmk vendor.sh
# would be way more complex because we'd have
# to resort to ifdtool instead. me_cleaner can
# also extract a ME without modifying it
# for Fsp.fd, we don't rely on a download. Instead,
# we copy from coreboot.git. The file is defined
# by CONFIG_FSP_FD_PATH, split to CONFIG_FSP_M_FILE and CONFIG_FSP_S_FILE
# and inserted to CBFS with names CONFIG_FSP_S_CBFS and CONFIG_FSP_M_CBFS
#
FSPFD_hash="69d945ea208912167af70774178366d2a56ba898ecc1864a4feda86fe96bbf55d408b2aaea2e3406c3f40772b603a9178139f5722015fb622e4e6274bd53ad52"
FSPM_bin_hash="619f6f1478554b2fe958da37b1c51c5c9781565424acd48528bd333332b3de2ea728ff21e0048f77f2564c6e242d0382d659415bd16bc8405bd6f9fa7f17d9ac"
FSPS_bin_hash="631cd96a912549fa4e792c1f8aefd26c35f98b1f9543958f24a1f87c92f0d91582b85f0b5d58f2651fe90cb526d5225bae2f4ab494745c3f586f7063abde096e"

35
include/vendor.sh
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@@ -42,7 +42,8 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
ME11version ME11sku ME11pch _me _metmp mfs TBFW_url_bkup TBFW_url cbdir \
TBFW_hash TBFW_size hashfile EC_url_bkup FSPM_bin_hash FSPS_bin_hash \
EC_FW1_hash EC_FW2_hash ME_bin_hash MRC_bin_hash REF_bin_hash _dl_bin \
SCH5545EC_bin_hash TBFW_bin_hash E6400_VGA_bin_hash _pre_dest`"
SCH5545EC_bin_hash TBFW_bin_hash E6400_VGA_bin_hash _pre_dest \
XBMKmecleaner MEclean`"
download()
{
@@ -235,19 +236,30 @@ find_me()
fi
_7ztest="${_7ztest}a"
_r="-r"
_r="-r" # re-locate modules
_trunc="-t" # -t: truncate the ME size
_keep="" # -k: keep fptr modules even if they can be removed
_pass="" # -p: skip fptr check
if [ -n "$mfs" ]; then
if [ -n "$mfs" ] || [ "$MEclean" = "n" ]; then
_r=""
fi
if "$mecleaner" $mfs $_r -t -O "$xbtmp/a" -M "$_metmp" "$1"; then
if [ "$MEclean" = "n" ]; then
_keep="-k"
_trunc=""
_pass="-p"
fi
if "$mecleaner" $mfs $_r $_keep $_pass $_trunc -O "$xbtmp/a" \
-M "$_metmp" "$1" || [ -f "$_metmp" ]; then
# me.bin extracted from a full image with ifd, then shrunk
:
elif "$mecleaner" $mfs $_r -t -O "$_metmp" "$1"; then
elif "$mecleaner" $mfs $_r $_pass $_keep $_trunc -O "$_metmp" "$1" || \
[ -f "$_metmp" ]; then
# me.bin image already present, and we shrunk it
:
elif "$me7updateparser" -O "$_metmp" "$1"; then
elif "$me7updateparser" $_keep -O "$_metmp" "$1"; then
# thinkpad sandybridge me.bin image e.g. x220/t420
:
elif extract_archive "$1" "$_7ztest"; then
@@ -284,7 +296,9 @@ extract_archive()
:
elif 7z x "$1" -o"$2"; then
:
elif unar "$1" -o "$2"; then
elif unar -f "$1" -o "$2" || unrar -o+ -op"$2" x "$1"; then
# compatible with unrar-free and unrar-nonfree
:
elif unzip "$1" -d "$2"; then
:
@@ -415,12 +429,17 @@ getvfile()
bootstrap()
{
cbdir="src/coreboot/$tree"
mecleaner="$xbmkpwd/$cbdir/util/me_cleaner/me_cleaner.py"
kbc1126_ec_dump="$xbmkpwd/$cbdir/util/kbc1126/kbc1126_ec_dump"
cbfstool="elf/coreboot/$tree/cbfstool"
rmodtool="elf/coreboot/$tree/rmodtool"
mecleaner="$xbmkpwd/$cbdir/util/me_cleaner/me_cleaner.py"
if [ "$XBMKmecleaner" = "y" ]; then
mecleaner="$xbmkpwd/src/me_cleaner/me_cleaner.py"
fi
x_ ./mk -f coreboot "${cbdir##*/}"
x_ ./mk -f me_cleaner
x_ ./mk -b bios_extract
x_ ./mk -b biosutilities