26 Commits

Author SHA1 Message Date
Leah Rowe
1cf3181537 Libreboot 26.01 release
Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-30 07:14:30 +00:00
Leah Rowe
a808333c04 Libreboot 26.01 RC4 Magnanimous Max
Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-21 01:20:43 +00:00
Leah Rowe
fc2a521446 Libreboot 26.01 RC3 Magnanimous Max
Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-21 00:01:38 +00:00
Leah Rowe
9ea35f3866 Libreboot 26.01 RC2, or: Magnanimous Max
Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-20 04:32:50 +00:00
Leah Rowe
a59fc6a353 Libreboot 26.01 RC1 Tenacious Tomato
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-25 01:11:59 +01:00
Leah Rowe
5df6b924d7 bump seabios revision
by the time i'd done this, i'd realised that seabios only
modified some documentation upstream. the code has not
changed since last update, upstream.

no point scrapping the update now. now we have slightly
better documentation for seabios!

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-24 01:58:24 +01:00
Leah Rowe
5b2661a485 SeaBIOS/default: Bump to rev b686f460, 28 Jun 2025
This brings in the following changes:

* b686f460 sercon: Fix keycodes for F11 and F12
* b52ca86e docs: Note v1.17.0 release
* a6c8e8bb ahci: Fix hangs due to controller reset

The serial console fix is useful to us, as is the AHCI
fix; the latter was previously mitigated by removing
SeaBIOS's AHCI reset patch.

Upstream realised that the AHCI controllers need to have
a timeout on them when resetting them, because they don't
always react immediately to commands.

This makes the AHCI behaviour more correct, in SeaBIOS.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-06 15:31:48 +01:00
Leah Rowe
c46a71138c Libreboot 25.06 release
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-06-30 14:08:48 +01:00
Leah Rowe
c073ee9d4f Restore SeaBIOS 9029a010 update, but with AHCI fix
I fixed the AHCI bug, with a patch that I wrote. It works by
restoring the old SeaBIOS AHCI initialisation behaviour, whereby
the AHCI controller is enabled from its current state; the patch
that broke AHCI in coreboot (tested on ThinkPad T420), changed
AHCI initialisation behaviour so that the controller's state is
first reset, prior to enablement.

However, my patch also retains the new AHCI initialisation
behaviour, when a CSM is in use. The AHCI reset patch was done,
by the author, specifically for SeaBIOS in CSM mode, so it makes
sense to only change the behaviour conditionally according to that.

This reverts commit 8245f0b321.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-02 02:24:07 +01:00
Leah Rowe
8245f0b321 Revert "seabios: bump to rev 9029a010, 4 March 2025"
This reverts commit a08b8d94fc.

From #libreboot IRC today:

07:02 <irys> ooh this is fun. seabios commit 8863cbbd15a73b03153553c562f5b1fb939ad4d7 (ahci: add controller reset) breaks ahci entirely on t420
07:05 <irys> cbmem console on that seabios commit has a timeout then "AHCI/0: device not ready"
07:07 <irys> AHCI works fine if i change config/seabios/default/target.cfg to use the immediate previous seabios commit (df9dd418b3b0e586cb208125094620fc7f90f23d)
07:07 <irys> works in grub payload either way though
07:31 <irys> here, `cbmem -c` after booting the broken rev: https://0x0.st/84oQ.log
07:31 <irys> compared to the working one https://0x0.st/84o1.log
07:33 <irys> i can't report to upstream myself *right now* but i figure you might want to know about this leah

I have downloaded those logs locally for reference, so that an upstream
report can be made to SeaBIOS. For the purposes of this Libreboot commit,
the diff of the logs is as follows (diff -u broken.log working.log):

Taking each diff line out of the log, the relevant entries
seem to be:

Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
+AHCI/0: Set transfer mode to UDMA-6
+Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@0/disk@0
+AHCI/0: registering: "AHCI/0: Netac SSD 128GB ATA-11 Hard-Disk (119 GiBytes)"

-WARNING - Timeout at ahci_port_setup:477!
-AHCI/0: device not ready (tf 0x80)
-All threads complete.

-2. Payload [memtest]
+2. AHCI/0: Netac SSD 128GB ATA-11 Hard-Disk (119 GiBytes)
+3. Payload [memtest]

-Space available for UMB: c7000-eb800, f5880-f5ff0
-Returned 16777216 bytes of ZoneHigh
+drive 0x000f5fa0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=250069680
+Space available for UMB: c7000-eb800, f5880-f5fa0
+Returned 16773120 bytes of ZoneHigh

Therefore, the revision will be reverted back for now. It was
only about 8 additional patches imported in the update anyway.
2025-05-01 14:30:14 +01:00
Leah Rowe
f21749da8b Libreboot 25.04 Corny Calamity
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-04-30 12:28:46 +01:00
Leah Rowe
a08b8d94fc seabios: bump to rev 9029a010, 4 March 2025
This brings in the following improvements from upstream:

* 9029a010 kconfig: fix the check-lxdialog.sh to work with gcc 14+
* 8863cbbd ahci: add controller reset
* df9dd418 update pci_pad_mem64 handling
* a4fc1845 add romfile_loadbool()
* a2725e28 drop acpi tables and hex includes
* 35aa9a72 drop obsolete acpi table code
* 1b598a1d usb-hid: Support multiple USB HID devices by storing them in a linked list

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-04-30 01:52:56 +01:00
Alper Nebi Yasak
35c853f8b3 seabios: Fix malloc_fn function pointer in romfile patch
One of our SeaBIOS patches causes build errors with GCC 15:

  src/romfile.c: In function 'romfile_loadfile_g':
  src/romfile.c:65:18: error: too many arguments to function 'malloc_fn'; expected 0, have 1
     65 |     char *data = malloc_fn(filesize+add_len);
        |                  ^~~~~~~~~ ~~~~~~~~~~~~~~~~
  src/romfile.c: In function 'romfile_loadfile':
  src/romfile.c:88:50: error: passing argument 3 of 'romfile_loadfile_g' from incompatible pointer type [-Wincompatible-pointer-types]
     88 |     char *data = romfile_loadfile_g(name, psize, &malloc_tmphigh, 1);
        |                                                  ^~~~~~~~~~~~~~~
        |                                                  |
        |                                                  void * (*)(u32) {aka void * (*)(unsigned int)}
  src/romfile.c:55:28: note: expected 'void * (*)(void)' but argument is of type 'void * (*)(u32)' {aka 'void * (*)(unsigned int)'}
     55 |                    void *(*malloc_fn)(), int add_len)
        |                    ~~~~~~~~^~~~~~~~~~~~
  In file included from src/romfile.c:8:
  src/malloc.h:42:21: note: 'malloc_tmphigh' declared here
     42 | static inline void *malloc_tmphigh(u32 size) {
        |                     ^~~~~~~~~~~~~~
  make: *** [Makefile:142: out/src/romfile.o] Error 1
  make: *** Waiting for unfinished jobs....
  src/optionroms.c: In function 'vgarom_setup':
  src/optionroms.c:468:60: error: passing argument 3 of 'romfile_loadfile_g' from incompatible pointer type [-Wincompatible-pointer-types]
    468 |     void *mxm_sis = romfile_loadfile_g("mxm-30-sis", NULL, &malloc_low, 0);
        |                                                            ^~~~~~~~~~~
        |                                                            |
        |                                                            void * (*)(u32) {aka void * (*)(unsigned int)}
  In file included from src/optionroms.c:18:
  src/romfile.h:17:34: note: expected 'void * (*)(void)' but argument is of type 'void * (*)(u32)' {aka 'void * (*)(unsigned int)'}
     17 |                          void *(*malloc_fn)(), int add_len);
        |                          ~~~~~~~~^~~~~~~~~~~~
  In file included from src/optionroms.c:16:
  src/malloc.h:30:21: note: 'malloc_low' declared here
     30 | static inline void *malloc_low(u32 size) {
        |                     ^~~~~~~~~~
  make: *** [Makefile:141: out/src/optionroms.o] Error 1
  make: Leaving directory '/tmp/lbmk/src/seabios/default'

This is because the function pointer defined as `void *(*malloc_fn)()`
refers to a function that takes no arguments, unlike `malloc_tmphigh`
which takes an unsigned int. Add the missing argument type.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2025-04-29 16:37:14 +03:00
Leah Rowe
3c9f4be76f Libreboot 20241206, 8th revision
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-01-06 22:47:14 +00:00
Leah Rowe
95ea3293df bump seabios to rev 1602647f1 (7 November 2024)
This brings in a *single* change from SeaBIOS, because there
has only been one change in the main branch, and it's a bug fix.

The change from upstream is as follows:

commit 1602647f1be24fe63d11138d802e735c8e674e63
Author: Daniel Khodabakhsh <d.khodabakhsh@gmail.com>
Date:   Thu Nov 7 18:46:16 2024 -0800

    boot: Force display of the boot menu when boot-menu-wait is a negative number

Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-12-31 03:31:37 +00:00
Leah Rowe
8f370cb60d add spdx headers to various config files
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-12-27 02:24:38 +00:00
Leah Rowe
19795bf980 re-update seabios to latest revision
I reset it temporarily back to 1.16.3 when testing the
SeaBIOS hanging bug on 3050 micro, but the revision had
no effect; the bug was caused by a bad coreboot config

Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-27 20:06:16 +00:00
Leah Rowe
c56f698713 Use SeaBIOS 1.16.3 and enable debugging
This diff matches the setup currently used in coreboot.

I'm eliminating as many differences as possible, while
I test the SeaBIOS hanging issue on Dell Optiplex 3050 Micro.

The actual SeaBIOS configs have also been modified, to match
the coreboot config.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-27 16:07:56 +00:00
Leah Rowe
91a26ec361 bump seabios
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-17 23:22:44 +01:00
Leah Rowe
c3f6dd03cc seabios/default: bump to ec0bc256 (2024-06-24)
This brings in a single change:

commit ec0bc256ae0ea08a32d3e854e329cfbc141f07ad
Author: Gerd Hoffmann <kraxel@redhat.com>
Date:   Mon Jun 24 10:44:09 2024 +0200

    limit address space used for pci devices, part two

This increases compatibility with i686 hosts, when allocating
memory for pci devices.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-08-11 16:43:22 +01:00
Leah Rowe
e1ea5dd0fd bump seabios to e5f2e4c69643bc3cd385306a9e5d29e11578148c
changes upstream, relative to the previous revision:

* e5f2e4c6 pciinit: don't misalign large BARs
* 731c88d5 stdvgaio: Only read/write one color palette entry at a time
* c5a361c0 stdvga: Add stdvga_set_vertical_size() helper function
* 22c91412 stdvga: Rename stdvga_get_vde() to stdvga_get_vertical_size()
* 549463db stdvga: Rename stdvga_set_scan_lines() to stdvga_set_character_height()
* c67914ac stdvga: Rename stdvga_set_text_block_specifier() to stdvga_set_font_location()
* aa94925d stdvga: Rework stdvga palette index paging interface functions
* 8de51a5a stdvga: Rename stdvga_toggle_intensity() to stdvga_set_palette_blinking()
* 96c7781f stdvga: Add comments to interface functions in stdvga.c
* 2996819f stdvga: Rename CGA palette functions
* 91368088 stdvgamodes: Improve naming of dac palette tables
* 70f43981 stdvgamodes: No need to store pelmask in vga_modes[]
* 1588fd14 vgasrc: Rename vgahw_get_linesize() to vgahw_minimum_linelength()
* d73e18bb vgasrc: Use curmode_g instead of vmode_g when mode is the current video mode
* 192e23b7 vbe: implement function 09h (get/set palette data)
* 3722c21d vgasrc: round up save/restore size
* 5d87ff25 vbe: Add VBE 2.0+ OemData field to struct vbe_info
* 163fd9f0 fix smbios blob length overflow
* 82faf1d5 Add LBA 64bit support for reads beyond 2TB.
* 3f082f38 Add AHCI Power ON + ICC_ACTIVE into port setup code
* 3ae88886 esp-scsi: terminate DMA transfer when ESP data transfer completes
* a6ed6b70 limit address space used for pci devices.

Signed-off-by: Leah Rowe <info@minifree.org>
2024-05-10 05:52:12 +01:00
Riku Viitanen
4a9fca57f3 Patch SeaBIOS: Add MXM support
Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
2024-02-11 19:13:36 +02:00
Leah Rowe
eff9130b7a update/trees: further simplify crossgcc handling
arch no longer needs to be set, on multi-tree projects,
and it has been renamed to xarch

the new behaviour is: if xarch is set, treat it as a
list of crossgcc targets and go through the list. set
the first one as the target, for what lbmk builds, but
build all of the defined crossgccc targets

crossgcc_ada is now xlang, and defines which languages
to build, rather than whether to build gcc-gnat

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-27 16:07:32 +00:00
Leah Rowe
90ac30b163 update/trees: simplified crossgcc handling
only call crossgcc for coreboot and u-boot, but use
hostcc for everything else. simplify the checking of
which architecture to compile for. "arch" in target.cfg
files has been modified, to allow further simplification.

without this patch, the logic currently only *barely* avoids
using crossgcc on things like utils, and only works in practise
because, in practise, lbmk only works on x86_64 anyway.

the new logic, as per this patch, is simpler and more robust.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21 14:18:51 +00:00
Leah Rowe
d58bc5ff0d bump seabios revision
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-07 10:36:50 +01:00
Leah Rowe
da3c9bb3c5 merge config/ and resources/
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-09-04 02:47:25 +01:00