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559 Commits

Author SHA1 Message Date
Leah Rowe
a0857f449a Libreboot 26.01rev1 Magnanimous Max
This is a hotfix release for Libreboot 26.01, which
contains the following patches:

* 379ccc2177 Re-add x230_12mb corebootfb config
* a9428b65c8 get.sh: properly initialise _ua
* 7aadc1dda3 g43t_am3: make it 2mb, not 4mb
* 8c8c3d7cb1 supermicro x11ssh_f: Remove release="n"
* 7e3c01d8d7 supermicro x11ssh_f: Disable ME HECI in devicetree
* 4f287c85c0 supermicro x11ssh_f: Use deguard-configured ME image instead of SPS
* 47401fc170 Delete unused config/ifd/supermicro-x11-lga1151-series directory
* 0415148e92 supermicro x11ssh_f: set release="n"
* ce5eb284a3 supermicro x11ssh_f: use underscores in dir names
* 1426c9cbd0 Added Danish Keymap dkqwerty.gkb
* 62859905ef Add Supermicro X11SSH-F/LN4F port
* 8d8a1f36a9 GRUB: don't download po files in bootstrap

These fixes are backports from the master branch.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-02-26 01:39:20 +00:00
Leah Rowe
379ccc2177 Re-add x230_12mb corebootfb config
also for other variants

i removed it because it was reported broken. it's not.

the removal was always temporary, pending further testing.
next time, i will be more sceptical.

everything works fine.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-02-26 01:30:50 +00:00
Leah Rowe
a9428b65c8 get.sh: properly initialise _ua
it is currently only initialised inside case
conditions. this is fine on most shells, but
some of them can be a bit buggy here.

initialise it empty and then override.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-02-26 01:26:05 +00:00
Leah Rowe
7aadc1dda3 g43t_am3: make it 2mb, not 4mb
idk why i made it 4

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-02-26 01:25:56 +00:00
Ron Nazarov
8c8c3d7cb1 supermicro x11ssh_f: Remove release="n"
Since we have redundant downloads for the ME image now, it's no longer
required.
2026-02-26 01:25:38 +00:00
Ron Nazarov
7e3c01d8d7 supermicro x11ssh_f: Disable ME HECI in devicetree
Since we always use me_cleaner, this speeds up boot time by preventing
coreboot from wasting a few seconds waiting for HECI.
2026-02-26 01:25:33 +00:00
Ron Nazarov
4f287c85c0 supermicro x11ssh_f: Use deguard-configured ME image instead of SPS
Using the same ME image as the 3050 Micro.  This fixes the lack of a
backup download URL for the ME and speeds up boot time, since MRC
caching is working with ME (unlike SPS).

Unfortunately, since the MFS partition must be preserved, this does
mean we need a larger ME region than with me_cleaned SPS.
2026-02-26 01:25:22 +00:00
Ron Nazarov
47401fc170 Delete unused config/ifd/supermicro-x11-lga1151-series directory
Left over from the hyphen -> underscore renaming commit.
2026-02-26 01:25:13 +00:00
Leah Rowe
0415148e92 supermicro x11ssh_f: set release="n"
the lack of redundancy in Intel ME downloading is a current
release blocker with this board, so set it to release=n for
now.

it is quite possible to use deguard on this board, which does
have redundant downloading when used with lbmk.

although the board doesn't have bootguard, it is still possible
to use deguard. you can configure the generic ME image that it
fetches, and reconfigure it for each machine.

i've asked ron to look into this, on their test board.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-02-26 01:24:53 +00:00
Leah Rowe
ce5eb284a3 supermicro x11ssh_f: use underscores in dir names
i don't like hyphens in file names, because of how lbmk
has historically handled directories and files in the past;
i've removed a lot of eval statements, to the extent that
it's no longer likely to be a problem (it's barely used now),
but i previously had a problem with using hyphens in config
names.

this design flaw (in lbmk) was fixed ages ago, but i still
maintain this policy. since that time, i use hyphens only.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-02-26 01:24:47 +00:00
Niel Nielsen
1426c9cbd0 Added Danish Keymap dkqwerty.gkb 2026-02-26 01:24:36 +00:00
Ron Nazarov
62859905ef Add Supermicro X11SSH-F/LN4F port
Surprisingly, SeaBIOS VGA output works (coreboot documentation says it
doesn't).

I'm using a static CMOS option table currently (like most other boards
supported in libreboot), but maybe it would be better to switch to the
CBFS file option table.  The default option table enables
hyperthreading, overriding the compile-time setting.

I'm also using a ME/SPS image extracted from the official BIOS update
for this board.  Unfortunately, https://www.supermicro.com/Bios/* is
excluded from crawlers in robots.txt so it's not in archive.org, so I
haven't been able to find a backup download URL.  I also needed to set
the user-agent for fetching the update to "curl/8.6.0" because the
default user-agent override used by lbmk resulted in a 403 error.
deguard is not required (there's no bootguard on this board).

SPS does not implement CPU replacement detection which means that the
MRC cache does not work and RAM training needs to happen on every
boot.  To avoid this it may be possible to run ME instead of SPS on
this board, but I tried both the ME image used on the OptiPlex 3050
Micro in libreboot and one from the ASRock C236 WSI and they both hung
at "[INFO ] POST: 0x92" (POSTCODE_FSP_MEMORY_INIT).

The memtest86+ build included with libreboot doesn't work with USB
keyboards and this board doesn't have a PS/2 port, which is annoying.
2026-02-26 01:24:26 +00:00
Leah Rowe
8d8a1f36a9 GRUB: don't download po files in bootstrap
The files it downloads are not versioned, and they could
change any time. GRUB has no way to deterministically grab
these.

I've removed GRUB's local for grabbing these, instead
mirroring them myself and checking hashes; no hashes seem
to have been provided by the upstream at Translation Project,
so I just used the hashes I had on the files it had, when
I downloaded them.

From now on, I can just re-download these and re-calculate
the hashes as desired, over time, when updating GRUB revisions.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-02-26 01:01:57 +00:00
Leah Rowe
1cf3181537 Libreboot 26.01 release
Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-30 07:14:30 +00:00
Leah Rowe
e42eef2d2a Merge pull request 'Update config/dependencies/void' (#400) from lucius1664/lbmk:master into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/400
2026-01-30 08:11:39 +01:00
lucius1664
466b01b17e Update config/dependencies/void 2026-01-27 13:14:22 +01:00
Leah Rowe
bc5e0bbbbb fix config/submodule/
I accidentally removed a bunch of links in a previous change,
that isn't pushed yet.

due to gitignore rules, files in config/submodule/ have to be
added manually using -f with the git add command. as a result,
i need to be very careful when making changes, especially
temporary changes.

lbmk wasn't downloading files properly, because upstreams weren't
defined. this patch fixes that.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-26 06:27:58 +00:00
Leah Rowe
a808333c04 Libreboot 26.01 RC4 Magnanimous Max
Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-21 01:20:43 +00:00
Leah Rowe
baeec45f50 use newer ME on e7240
i accidentally picked an older version from Dell update
A16. this update uses A29.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-21 01:18:06 +00:00
Leah Rowe
fc2a521446 Libreboot 26.01 RC3 Magnanimous Max
Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-21 00:01:38 +00:00
Leah Rowe
e91377b509 cb/default: new rev fcd716d9a2, 14 January 2026
This brings the following changes from upstream:

* fcd716d9a2 mb/google/ocelot: Limit Power Limit when battery is missing
* d246e2ca7e tests/Makefile.common: Fix inverted USE_SYSTEM_CMOCKA condition
* e64507638e tests/lib/ux_locales-test: Avoid double quotes in CMUnitTest.name
* 4427a34b6b drivers/intel/fsp2_0: Fix string length handling in timestamp printing
* 40dbe0807d Documentation/mb: Add missing entry for starfighter_mtl
* f070e0add8 mb/starlabs/byte_adl: Fix WOL
* fc20f238f6 mb/starlabs/*: Select DRIVERS_EFI_FW_INFO
* 225e635ea1 soc/amd/common/block/spi: Operate on multiple SPI flashes
* b9bd924847 soc/amd/common/block/spi: Implement boot_device_spi_cs()
* d7d4b67c6a commonlib/mipi/cmd: Remove unnecessary 'const void *' cast
* 5af56ddf92 mb/google/skywalker: Implement lb_board() to pass LB_TAG_PANEL_POWEROFF
* d110cf4669 commonlib/mipi/cmd: Add mipi_panel_get_commands_len()
* 0ee48a475c drivers/mipi: Add power-off commands for TM_TL121BVMS07_00C
* a974b7668e soc/intel/*: Disable InternalGfx w/o iGPU to prevent FSP-M/S crash
* 18ffcafa61 mb/google/bluey/quartz: Adjust PS8820 init sequence
* 532543027a mb/siemens/{mc_ehl6,mc_ehl7}: Configure GPIO GPP_G5 (SD CD) pull-up
* d420e1fb87 mb/siemens/mc_ehl8: Switch from LPSS UART to legacy 8250 I/O UART
* 483c3e51ae mb/siemens/mc_ehl8: Configure I2C and SMB devices
* d810257008 mb/siemens/mc_ehl8: Configure PCIe root ports
* cf2c2555f4 mb/siemens/mc_ehl8: Add new board variant based on mc_ehl1
* a12663fd88 drivers/spi: Allow SoC to provide the SPI flash CS index
* cacc11de4f include/cpu/x86/msr.h: Update return types from int -> bool
* d5fb4becd5 mb/google/nissa/var/yavilla: Update DTT parameters
* 3b18467e8a payloads/ipxe: Unconditionally restore config files post-build
* 4374bbd37b payloads/ipxe: Update and use the stable version
* c0998983d0 ec/google/chromeec: Fix uninitialized buffer in cbi_get_uint32()
* 03b47f947f soc/mediatek: Add mtk_get_mipi_panel_data() API
* 8cfc71d9e0 libpayload: Pass panel power-off commands to payloads
* d94d4b8a25 mb/starlabs/starlite_adl: Add trace length for the card reader
* 0f450a8d9c mb/starlabs/starlite: Set card_reader fallback value to 0
* 94672e2b45 sb/intel/ibexpeak: Remove 6/7 series chipset PCI IDs
* 2fc8051679 util/autoport: Factor out getting sorted Kconfig option names
* 01d82febb2 util/autoport: Separate handling of Kconfig selects
* b7763a5973 mb/google/fatcat: Implement Google Rex touchscreen integration
* 3f5807ce10 mb/siemens/mc_ehl7: Deactivate SATA interface
* 5f76f78383 mb/siemens/mc_ehl7: Deactivate GbE and PSE GbE 0
* b5ad97a268 mb/google/nissa/var/gothrax: Add wifi sar table
* 7351e663d2 mb/google/nissa: Enable early EC SW sync & eSOL for gothrax/epic
* f9b917d391 soc/qualcomm/x1p42100: Relocate CBMEM top below XBL log
* a306987ae4 util/superiotool: Add experimental Nuvoton NPCD378 support
* 139f6c3e64 mb/google/brya/var/redrix: Configure cameras for Windows/Linux ACPI mode
* 3883118ed9 mb/google/brya/var/kano: Configure cameras for Windows/Linux ACPI mode
* ae7b75fb0d mb/lenovo/sklkbl_thinkpad/cfr.c: Fix X280 build error
* 7639118729 drivers/amd/opensil: Add hooks to populate CBMEM_ID_MEMINFO
* 23f0b0b313 util/xcompile/xcompile: Fix clang target parameter
* f712c965e4 payloads/edk2: Update default MrChromebox branch from 2508 to 2511
* b4917ed44d payloads/edk2: rework serial output configuration
* 282c27c95c arch/x86/acpi_bert_storage.c: Allow vendor specific BERT entries
* 00fbc08b76 Reapply "soc/mediatek/mt8196: Call fsp_init via boot state"
* e6c5ee6450 mb/google/hatch/var/kohaku: Add Samsung S-pen driver support
* b890ca0648 mb/google/brya/var/yaviks: select USE_MTCL only if CHROMEOS
* a8737c5f86 mb/google/cyan: Set CBFS_SIZE default to match IFD BIOS size
* 72af15f1de mb/google/zork: Fix missing comma in CFR object list
* 5db16ea6fc soc/intel/pantherlake: Fix incorrect use of logical OR for TDP selection
* 2c58e525e8 soc/intel/ptl: Add ACPI IOST support
* 52aeb078ce soc/intel/common/acpi: Add IOST device
* d62764df87 soc/intel/common/block/p2sb: Add SSDT function for SoC-specific features
* 96b4754c35 soc/intel: Add CPU ID support for Nova Lake
* b741e2274e acpi: Add enums for TPM2 start method
* 6fd865f409 drivers/amd/ftpm: Add fTPM driver for PSP emulated CRB TPMs
* c09352d58d soc/intel/pantherlake: Update PS1 threshold to the latest recommendations
* 093ae8eeaa mb/siemens/mc_ehl7: Enable reboot after HW Watchdog expiry
* ddf4748c22 mb/siemens/mc_ehl7: Deactivate RTC
* e8ac9ffcd9 mb/siemens/mc_ehl7: Add new board variant based on mc_ehl6
* 94e6e5cd0d mb/google/ocelot: Add option to enable VGA mode 12
* fbf0087918 mb/google/ocelot/var/ocicat: Use GPP_F10 for ISH
* f2788e963f device: Rename PCI_EXP_SEC_CAP_ID -> PCI_CAP_ID_SEC_PCIE
* e01baafbe2 include/cper.h: Add check information structures
* a6407000f1 mipi/panel: Add 'poweroff' field to panel_serializable_data
* b4fbc59c6f treewide: Move mipi_panel_parse_commands() to commonlib
* 1d2b399fd7 lib: Rename `fill_lb_framebuffer` to `get_lb_framebuffer`
* 5f86aba4b3 soc/intel/common: Enable high address support for MCHBAR in ACPI
* f00a2ff7b8 arch/x86/ioapic.c: Support 8-bit IOAPIC IDs
* 3c3fbbaabf arch/x86/acpi_bert_storage.c: Remove unused variable
* 9f4132712f soc/intel/alderlake: add chipsetinit support
* a5c0307e9c commonlib/device_tree: Add dt_add_reserved_memory_region helper
* a3a556f05d mb/google/fatcat/var/ruby: Add wifi SAR table
* 8bc1372f72 sb/intel/common/spi: Prevent transfers across 4KiB boundaries
* 95ad028274 drivers/smmstore: Use lookup_store() for memory-mapped reads
* c421847fe2 util/crossgcc: Fix GNAT detection for gnat-15
* 292d7b9d3d Revert "soc/mediatek/mt8196: Call fsp_init via boot state"
* e705c39009 libpayload/arch/arm64/mmu: Add CB_MEM_TAG to usedmem_ranges
* 18a986c5fe soc/amd/cmn/block/cpu/mca: Support MCA_SYND1 and MCA_SYND2
* c45e153dfb mb/google/bluey/var/quartz: Enable PS8820 support
* e303357cb9 soc/qualcomm/x1p42100: Call mainboard Type-C config hook
* f9efe53cb0 mb/google/bluey: Implement PS8820 retimer configuration
* 657bcd32d9 mb/google/bluey: Add Kconfig for PS8820 retimer support
* 17a52ce94e soc/qualcomm/x1p42100: Add mainboard USB Type-C config hook
* 16cb8d0d0c mb/google/bluey: Add power sequencing for USB-C1 retimer
* 5034f8629f soc/intel/common: Add spinlock protection to fast SPI flash operations
* ceaa41c9e4 drv/intel/mipi_camera: Verify SSDB only for camera sensors
* ede97ef9da mb/google/volteer: Add IPUA device and sensor names
* 65cbf312af mb/google/volteer: Convert MIPI camera cfg from static ASL to devicetree
* 2aca802e85 mb/google/brya/acpi/cnvi_bt_reset: Fix BT re-enumeration under Windows
* 524ad684af mb/google/brya/var/taeko: Fix SOF speaker topology selection
* 829b8be432 libpayload: Add bulk with timeout callback to USB
* f4fe5514fe mb/google/ocelot/var/kodkod: Update gpio settings for NC pins
* c7f0697867 coreboot_tables: Add new CBMEM ID to hold the PCI RB aperture info
* 3ded43722a soc/amd/cmn/block/acpi/ivrs: Use less PCI accesses
* 1da7c31810 include/cpu/x86/msr.h: Add MCA related MSRs
* 7deb82d744 mb/google/bluey: Configure QUPV3_0_SE3 and QUPV3_0_SE7 for USB-C0 and USB-C1 Retimer I2C access
* b00d2ad5c2 vc/intel/fsp/fsp2_0/pantherlake: Update PTL FSP headers to FSP 3442.07
* b7ad850fd6 mb/google/bluey: Add percentage symbol to battery level log
* ae48ff8c0b drivers/wwan/fm: Use _EVT method to enhance GPIO event handling
* 7ed7abbd92 acpigen_ps2_keybd: map screenlock
* 6b52f82df2 util/amdfwtool: Remove AMD_FW_GFXIMU_2 entry
* b9145e1588 util/amdfwtool: Remove duplicated AMD_TA_IKEK
* e393fd00a4 include/cper.h: Update cper_ia32x64_context_t
* 14a7a2315e soc/mediatek/mt8196: Call fsp_init via boot state
* 82f9c593ab payloads/libpayload: Add support for RISC-V 64-bit architecture
* 4decc72c23 drivers/intel/touch: Change ELAN device name for Google's Rex touch device
* 17b36286c8 mb/google/hatch/var/kindred: Drop VBT for KLED variant
* cf280eaa7f amdblocks/root_complex.h: Add new IOHC base addresses
* ba0483c94a soc/amd/common/Makefile.mk: Strip quotes from AMDFW_CONFIG_FILE
* b2b1eb3c5a soc/amd/common/block/smn: Add simple SMN I/O accessors
* f8c10eda36 mb/google/nissa/var/gothrax: Add Rayson parts to RAM ID table
* 0c26c4494d mainboard/google/bluey: Enable display clocks and MMCX power rail
* e1e7b9b203 soc/qualcomm/x1p42100: Add API to enable display clocks
* 02e6f2a214 soc/qualcomm/x1p42100: Add API to intialize RPMh resources for display
* dc162f84be soc/qualcomm/common: Add RPMh driver support
* 999dd8905a lib/bootmem: Replace conditional return with assert in bootmem_add_range_from
* eb814f3b12 lib/bootmem: Remove forward declaration of bootmem_range_string
* 6f394ce50d coreboot_tables: Update CB_MEM_TAG and LB_MEM_TAG values to 17
* 6966885290 mb/google/skywalker: Extend MIPI panel delay to meet T3 timing
* 273e84976b mb/asus/p8z77-v: Apply vendor PCH interrupt mapping
* 573c37a518 sio/nuvoton/common: Refactor nuvoton_pnp_*_config_state()
* 0c2a3002d9 mb/asrock/z87_extreme4: Temporarily refactor nuvoton_pnp_*_conf_state()
* 19deb55f02 mb/asrock/fatal1ty_z87_professional: Temporarily refactor nuvoton_pnp_*()
* 3d980dae22 mb/google/nissa/var/rull: Add 3 DDR modules to RAM id table
* 4030fc5f91 device/Kconfig: Gate early libgfxinit default on ChromeOS
* b8402a8dfc src/qualcomm/common: Remove display buffer region declarations
* 7896d94c76 soc/qualcomm/x1p42100: Avoid reserving display buffer region
* fe0e14d716 soc/qualcomm/x1p42100: Skip SHRM meta firmware load in ramdump mode
* 56013ce0ff mainboard/google/bluey: Skip SHRM firmware load/reset in ramdump mode
* b8680d53ac mb/google/ocelot/var/ocicat: Add fw_config definitions with UFSC
* c3ff1addde mb/google/ocelot/var/ocicat: Add WIFI SAR table
* 9b5d985838 mb/google/ocelot/var/ocicat: Update audio settings
* 091e8140ea spd/lp5: Add SPD for RS1G32LO5D2FDB-23BT
* bc240baba5 Documentation: Add method for GRUB2 to load seabios from drive
* 02c57577f3 superio/nuvoton: Add common ACPI ASL code
* 7273a5b932 mb/asus/p8x7x-series: Move CONFIG_SUPERIO_PNP_BASE to sio/nuvoton
* 40eca2934f soc/mediatek/common: Track firmware splash screen rendering completion
* 49d34a6f6c mb/google/skywalker: Add MIPI panel GPIOs via lb_gpio
* b354b49d58 libpayload: Increase SYSINFO_MAX_GPIOS to 10
* 25d159a7ec mb/google/skywalker: Use FW_CONFIG for storage and dual init support
* 4063a4c3f1 mb/google/skywalker: Create variant Mace
* a1e9cd3669 mb/google/bluey: Configure QUPV3_2_SE4 for ADSP I2C access
* 2b9653cf34 arch/x86/acpi_bert_storage.c: rename check -> proc_err_info
* a3236ef110 arch/x86/acpi_bert_storage.c: Fix array size calculation
* e3fc4a1f69 ec/starlabs/merlin: Reorganize Kconfig and guard options properly
* 4a07174d0e util/cbfstool: Fix RISC-V relocations
* d912ae91b0 mb/google/bluey: Configure GPIOs for USB camera
* a27a7f0c11 mb/google/trulo/var/kaladin: Decrease G2 touch stop delay time to 150 ms
* 3bebadd347 mb/google/bluey: Enable dynamic SoC calculation and log battery level
* bab8ca2bd0 ec/google/chromeec: Refactor Battery SoC calculation
* 02b3674198 ec/google/chromeec: Add SoC calculation from battery dynamic info
* 06c83d473b ec/google/chromeec: Add function to read battery state of charge
* 7c3d45d94f drivers/usb/intel_bluetooth: Correct S-state level for power resource
* 091ac10059 soc/intel/cnvi: Correct S-state level for CNVP
* 4631f94e51 drivers/usb/intel_bluetooth: Advertise D2 for S0W
* ea045bd322 soc/intel/cnvi: Re-enable Bluetooth on reset timeout
* ffac7d90da soc/intel/cnvi: Correct error values for _RST
* f24a2f35bf mb/asrock: Correct vendor name ASROCK to ASRock
* aeb9dcf2fa libpayload: Add new memory type CB_MEM_TAG
* c093b52c20 soc/mediatek: Correct BIAS_ON value to get bias ready
* 531c24cd0a Documentation: Fix typo in 'particularly'
* 331e93cbd2 libpayload/tests: Disable generation of lcov HTML
* 7d38a96c44 mb/google/skywalker: Create variant Vader
* 75333ea7c8 mb/google/bluey: Refactor is_pd_sync_required function
* 3f00ecb05c soc/intel/pantherlake: Add ChromeOS board-specific TDP setting
* 1dfa80f02c soc/intel/pantherlake: Add configurable TDP support
* dc68f5b265 soc/intel/pantherlake: Let common code set PL1 to TDP
* bb3f40627d util/autoport: Fix style issue in generated code
* 94b326469b mb/google/bluey: Increase FW_MAIN_A/B slot size to 8.5MB
* e6c3250912 mipi/panel: Remove pic_width and pic_height from dsc_config
* 456403d9ba soc/mediatek/mt8196: Stop using dsc_config.pic_width
* 7d50f63213 soc/mediatek: Drop mtk_ddp_soc_mode_set()
* 61c9450d62 soc/mediatek/common: Pass dsi_regs to mtk_dsi_cphy_timing()
* ba5b5ea406 soc/mediatek/mt8196: Move DPM and SPM initialization
* 206025754f libpayload/tests: Remove unrecognized flag --ignore-errors inconsistent
* 82c06da584 3rdparty/fsp: Update to upstream master
* c5eecee5e9 mb/google/rex: Add IPUA device and sensor names
* bceb2c83ad mb/{google/intel}: Fix/add missing MIPI camera SSDB lanes_used/link_used
* de4148888c tests: Disable generation of lcov HTML
* 188cd88ac7 soc/mediatek/mt8196: Correct MIPI register control
* 080ca011fe Documentation: Finalize 25.12 release notes
* 695041a9bf mb/starlabs/*: Increase size of SMMSTORE region to 512KB
* 975e48faaf mb/starlabs/starlite_adl: Add CFR option for charge LED brightness
* 951c28c1bf mb/starlabs/starfighter: Add CFR options for power/charge LED brightness
* ab2c69c4f3 mb/starlabs/starbook: Add CFR options for power/charge LED brightness
* 84ff3d3d12 ec/starlabs/merlin: Add charge LED brightness control
* ac170631d5 mb/starlabs/starlite: Fix ddr5 entry
* 0e217cf1d3 soc/mediatek/mt8196: Increase FRAMEBUFFER to 32MiB
* 003ea85115 soc/mediatek/mt8196: Support logo display on DISP_PATH_DUAL_MIPI path
* 7e7ba6fb11 security/lockdown/lockdown.c: option to lock COREBOOT and BOOTBLOCK
* 56a7ae4389 soc/mediatek/mt8196: Notify MCUPM to support MTE
* 7c7feca258 CBFS verification: support Top Swap redundancy
* 739808011a Makefile.mk: don't add bootblock after other files
* cbac0d7a25 Makefile.mk,cpu/intel/fit/Makefile.mk: introduce CBFS_REGIONS
* f773a0faac cpu/intel/fit/Makefile.mk: make FIT in TOPSWAP point at MCU in COREBOOT_TS
* fa80ab0146 src/Kconfig: add MAINBOARD_NEEDS_CMOS_OPTIONS
* 59d438f5c7 mb/google/bluey: Remove GSCVD region from Bluey and BlueyH variants
* 7c4d9e0862 mb/google/*: Update Kconfig names with all known board names
* 35be1ab679 configs: Build test ramstage zstd compressed
* 2d99da12a9 commonlib/bsd: Add zstd support
* 4ca5e9c8c6 rules.h: Add ENV_RAMSTAGE_LOADER
* 0421ef2cd8 util/cbfstool: Add zstd support
* 0302b2ee07 lib/xxhash: Move to commonlib/bsd
* 76e9635346 amdfwread: Parse and print directory sizes
* a3adf4898b mb/google/brya/var/pujjocento: Add 2 Micron modules to RAM id table
* d1e1003217 spd/lp5: Add SPD for MT62F2G32D4DS-031RFWT:C
* d528561130 mb/google/bluey: Use PMIC for off-mode detection
* 65833355ca tests: Disable gcov warnings
* 060d18f070 soc/mediatek/mt8196: Add DSI dual channel

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-20 23:53:12 +00:00
Leah Rowe
86cbf66b78 NEW MAINBOARD: Dell Latitude E7240 from Iru Cai
Thank you Iru Cai for this coreboot port.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-20 22:23:10 +00:00
Leah Rowe
a494c3c2e2 Revert "coreboot/default: don't remove fsp files"
This reverts commit 2e6f6e2579.

This was a stupid revert. I don't remember why I even did it.

Better to make the releases *not* take up an extra 100MB per
source file, until I actually need these extra files.
2026-01-20 12:15:45 +00:00
Leah Rowe
f22d4b1c49 u-boot: update configs
i did: ./mk -u u-boot

otherwise, building u-boot asks for user input

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-20 12:06:15 +00:00
Leah Rowe
778ae1653a fix grub version name in xhci_nvme
Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-20 12:03:01 +00:00
Leah Rowe
9ea35f3866 Libreboot 26.01 RC2, or: Magnanimous Max
Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-20 04:32:50 +00:00
Leah Rowe
b538749c83 remove T480/T580 thunderbolt driver
it causes s3 resume to break on t480s

more testing needed across the board(s)

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-20 04:32:34 +00:00
Leah Rowe
4e33b40655 re-add deleted grub border patch
accidentally deleted it during rebase

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-19 16:33:13 +00:00
Leah Rowe
d22f7f9633 update grub to 2.14
This brings these extra changes:

* eaa3b8f0f Bump version to 2.15
* d38d6a1a9 Release 2.14
* 35bfd6c47 build: Add grub-core/tests/crypto_cipher_mode_vectors.h file to EXTRA_DIST
* ac042f3f5 configure: Print a more helpful error if autoconf-archive is not installed
* e37d02158 kern/ieee1275/openfw: Add a check for invalid partition number
* f94eae0f8 grub-mkimage: Do not generate empty SBAT metadata
* 1aa0dd0c0 configure: Defer check for -mcmodel=large until PIC/PIE checks are done
* ff1edd975 util/grub-mkimagexx: Stop generating unaligned appended signatures
* 51ebc6f67 tests: Add functional tests for ecb/cbc helpers
* caaf50b9a osdep/aros/hostdisk: Fix use-after-free bug during MsgPort deletion
* 18f08826f kern/efi/sb: Enable loading GRUB_FILE_TYPE_CRYPTODISK_ENCRYPTION_KEY and GRUB_FILE_TYPE_CRYPTODISK_DETACHED_HEADER

NOTE: This patch was reversed:

* ac042f3f5 configure: Print a more helpful error if autoconf-archive is not installed

Because it quite unhelpfully broke the build.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-19 16:03:51 +00:00
Leah Rowe
21d5050fb4 delete x230* corebootfb configs for now
a user reported that there is just a black screen at bootup
in 26.01 rc1 on these, but txtmode works.

only their x230 broke in corebootfb. their t430 and x200 they
tested worked fine.

txtmode works. this bug didn't affect 25.06, according to this
user.

no harm deleting these for now. i'll test it myself later (the
user isn't being very helpful with reporting) and fix whatever
the problem is.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-19 13:47:44 +00:00
Leah Rowe
2e6f6e2579 coreboot/default: don't remove fsp files
Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-06 22:18:54 +00:00
Leah Rowe
bbfee155ba fix fsp extraction for topton x2e n150
coreboot updated the fsp file. we know the old one worked,
so no point testing the new one so close to a stable lbmk
release.

i've modified 3rdparty/fsp/ to re-add the old one as another
file, so that other boards are unaffected, and updated the
Kconfig so that the special file is used for x2e n150 only.

more specifically, added a second fsp submodule.

it's a bit dirty, but avoids bloating lbmk.git

Signed-off-by: Leah Rowe <leah@libreboot.org>
2026-01-06 22:17:05 +00:00
Leah Rowe
d5351aee37 inject: fix mac address insertion
during previous re-factoring, i sorted variable initialisations.

that was all well and good, but prior to that, i initialised
the new_mac string to empty at first, and then to
the "xx" letters; the latter made the first initialisation
redundant, but in the re-factoring, I put the blanking of
the string afterward.

this disabled mac address insertion, because the way the script
works is precisely to avoid mac address insertion when the mac
string is empty. this is used when running the "nuke" command.

silly me.

yes, i'm very silly. very very silly. so silly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-25 13:41:37 +01:00
Leah Rowe
a59fc6a353 Libreboot 26.01 RC1 Tenacious Tomato
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-25 01:11:59 +01:00
Leah Rowe
b259f3493d update pcsx-redux openbios
use revision:
b745534eb231d3699ec57949f16a9a7bd5b79385

This brings the following upstream changes:

*   b745534e Merge pull request #1957 from wheremyfoodat/splash
|\
| *   33adecd6 Merge branch 'main' into splash
| |\
| |/
|/|
* |   d01e438e Merge pull request #1979 from nicolasnoble/upgrade-fmt
|\ \
| * | ae8c5cb8 Updating fmt to 12.1.0
|/ /
* |   fd9959a8 Merge pull request #1978 from malucard/all
|\ \
| * | 3ecd98e6 change deprecated fmt::localtime to std::localtime
|/ /
| * eec812e3 Nix: Stop using the outdated version of stb from nixpkgs (#7)
| *   836a0e10 Merge branch 'main' into splash
| |\
| |/
|/|
* |   e90d74d6 Merge pull request #1968 from wheremyfoodat/fix-coroutine
|\ \
| * | 62a23f8f Fix coroutine build on AppleClang 17
* | |   a56a96be Merge pull request #1974 from njfox/aur-ci-dependencies
|\ \ \
| * | | 98d10525 add --syncdeps to install missing PKGBUILD dependencies
| |/ /
* | |   3c155400 Merge pull request #1977 from aybe/fix-icon-overlay
|\ \ \
| * | | 79de997d Fix spurious folder icon overlay
* | | |   1d573efa Merge pull request #1976 from aybe/fix-missing-directory-extension
|\ \ \ \
| * | | | b13b80c7 Render directory node fully (including extension)
| |/ / /
* | | |   1a678f42 Merge pull request #1975 from aybe/fix-wrong-c-drive
|\ \ \ \
| |/ / /
|/| | |
| * | | c37d0597 Fix C:\ showing current directory
|/ / /
* / / 47d83a2b Padding isos to 2 minutes instead of 2 seconds.
|/ /
* |   718f0912 Merge pull request #1962 from njfox/aur-ci
|\ \
| * \   c70d85e4 Merge branch 'main' into aur-ci
| |\ \
| |/ /
|/| |
* | |   87f8e861 Merge pull request #1964 from nicolasnoble/tpageloc-fix
|\ \ \
| * \ \   acdc7e50 Merge branch 'main' into tpageloc-fix
| |\ \ \
| |/ / /
|/| | |
* | | |   a11e5ed6 Merge pull request #1965 from nicolasnoble/brew-hotfix
|\ \ \ \
| * | | | d6e15260 Now fixing psyqo...
| * | | | a7035f32 Fixing OpenBIOS build under 15.2...
| * | | | 909eb220 Also patching gcc now.
| * | | | c319254e Adding zlib patch for binutils on macos...
| * | | | d56b30e3 Derp.
| * | | | 00bd1db0 Upgrading gcc and gdb as well...
| * | | | 27e6fab9 Adding verbose mode.
| * | | | 5cb9084d Restoring readme properly.
| * | | | d911c2b1 Updating to binutils 2.45.
| * | | | a759cb84 Fixing https://github.com/orgs/Homebrew/discussions/6351
|/ / / /
| * / / 6de0f096 Properly returning a TPageLoc on TPageAttr::getPageLoc
|/ / /
| * |   98c53855 Merge branch 'main' into aur-ci
| |\ \
| |/ /
|/| |
* | |   a285e14e Merge pull request #1955 from wheremyfoodat/mac-bundle
|\ \ \
| * | | 97b9651b MacOS bundle script: Enable game mode support, list app as game
| * | | 0e0fabf2 MacOS bundle script: Clean up temporary image files
* | | |   1d54cbe6 Merge pull request #1958 from wheremyfoodat/aa64-flush-cache
|\ \ \ \
| * | | | 053eb573 arm64 JIT: Fix broken cache invalidation
| |/ / /
* | | |   52d9ddc5 Merge pull request #1956 from wheremyfoodat/jit-fixes
|\ \ \ \
| * | | | 4dd04425 a64 JIT: Fix setRWX function returning nothing on Apple
| |/ / /
* | | |   4e846d89 Merge pull request #1959 from wheremyfoodat/no-portable
|\ \ \ \
| * | | | 169788fb Add --no-portable flag
| |/ / /
* | | |   7bce4ecd Merge pull request #1960 from wheremyfoodat/remove-dynarec-dump
|\ \ \ \
| * | | | 8c995593 arm64 JIT: Don't unconditionally dump a JIT dump in the user's files
| |/ / /
* | | |   3a8ddc79 Merge pull request #1963 from njfox/openbios-fix-function-signatures
|\ \ \ \
| |/ / /
|/| | |
| * | | 98d9684b move pointer asterisk to be consistent
| * | | e7ad2b1e fix function definitions to include correct argument types
|/ / /
| * | bdaa1fe9 remove duplicate git dependency
| * | 53326672 combine dependency updates/installation and fix indentation
| * | f4d1f073 build against PR and push instead of master
|/ /
| * cdec82a4 Fix VS project files
| * 587ce8e9 GUI: Better splash image, bug fixes
| * 0b73a07a Add splash screen generation script
| * 3c4afbb6 Initial splash image draft
|/
*   4f4a00fe Merge pull request #1953 from cleverca22/fix-submodules
|\
| * 2bc000e8 fix submodules
* |   a4d6bcc4 Merge pull request #1954 from yaz0r/gdb_sharedmem
|\ \
| |/
|/|
| * 390ccf63 Address comments
| * 07e9b472 Add monitor command to retrieve the shared memory name. Only for wram so far.
|/
*   1b0cbe5e Merge pull request #1952 from yaz0r/gdbfix
|\
| * b4e77deb Fix GDB packet p (readRegister)
|/
*   a2a6d77c Merge pull request #1951 from nicolasnoble/linuxdeploy
|\
| * 2388bcb1 Switching to linuxdeploy.
|/
*   ec1154ad Merge pull request #1950 from grumpycoders/revert-1947-appimage-bullshit
|\
| * 5a66d37f Revert "Sorting out yet another AppImage breakage."
|/
*   a1f02931 Merge pull request #1940 from Forceh91/patch-1
|\
| * e23f9d01 Re-adding all examples.
| * f1b8694b Fixing test suite.
| *   78b4e9f1 Merge branch 'main' into patch-1
| |\
| |/
|/|
* |   b62b506f Merge pull request #1944 from eliasdaler/authoring_quiet
|\ \
| * \   572e18ba Merge branch 'main' into authoring_quiet
| |\ \
| |/ /
|/| |
* | |   cb651973 Merge pull request #1946 from nicolasnoble/pcsx-io-fixes
|\ \ \
| * \ \   fca66d17 Merge branch 'main' into pcsx-io-fixes
| |\ \ \
| |/ / /
|/| | |
* | | | b2066c72 Merge pull request #1947 from nicolasnoble/appimage-bullshit
* | | | e5244aea Sorting out yet another AppImage breakage.
 / / /
* / / e1be0936 Fixing accesses to the pcsx IO system.
 / /
* / 0fbc4206 autoring: add -q option
 /
* eaff5ed2 Merge branch 'main' into patch-1
* c0fa3b2f chore: nitpick changes from coderabbit
* 3b3e7986 chore: create readme with community examples

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-24 19:14:43 +01:00
Leah Rowe
a4ad3afdbb bump flashprog rev: ffcf92fb, December 2025
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-24 19:02:08 +01:00
Leah Rowe
68e0b5dddc init.sh: Explicitly export UTF-8 locale
C.UTF-8, instead of just C.

This fixes a build issue in GRUB on my Arch Linux test bench.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-24 17:16:10 +01:00
Leah Rowe
b990d54cff grub modules: add more gcry_ ciphers
Since the libgcrypt update in GRUB, which imported
GNU's own Argon2 implementation, other ciphers have
also been introduced.

This patch adds them to lbmk's GRUB build.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-24 02:35:30 +01:00
Leah Rowe
5df6b924d7 bump seabios revision
by the time i'd done this, i'd realised that seabios only
modified some documentation upstream. the code has not
changed since last update, upstream.

no point scrapping the update now. now we have slightly
better documentation for seabios!

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-24 01:58:24 +01:00
Leah Rowe
9228a0c02c update grub again, to 25b7f6b93
i had a build error before, when trying this absolute
most up to dave revision.

i found that it was this patch:

commit 1a5417f39a0ccefcdd5440f2a67f84d2d2e26960
Author: Nicholas Vinson <nvinson234@gmail.com>
Date:   Tue Nov 18 19:38:07 2025 -0500

For now, I just revert it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-24 01:47:28 +01:00
Leah Rowe
512cce0770 GRUB: update to rev 2.14-rc1 December 2025
The argon2 patches were dropped (PHC implementation),
because GRUB has now its own Argon2 KDF implementation
as part of its recent libgcrypt update.

Argon2 support is therefore retained, but GNU's implementation
has replaced the one that Libreboot previously used.

This brings in the following upstream changes:

* 280715ec6 Release 2.14~rc1
* e549317e1 windows: Fix symbol table generation during module conversion from PE to ELF
* a340750f9 windows: Fix relocation sections generation during module conversion from PE to ELF
* c602035a9 loader/efi/linux: Fix compile error with Clang
* f62269767 build: Add tpm2key.asn file for reference to dist archive
* 46be4488f build: Include new zstd test support files in dist archive
* fa79d5ea9 build: Include MAINTAINERS and SECURITY files in dist archive
* 8271bcc13 build: Add appended signatures header file to EXTRA_DIST
* 11845da2b lib/xzembed/xz_dec_stream: Replace grub_memcpy() call with memcpy()
* 7ded35fea bootstrap: Fix patching warnings
* 4129e9ad6 tss2: Always init out buffer before calling tpm2_submit_command_real()
* 000e48b42 fs/ntfs: Correct next_attribute validation
* 5ff9c43cf kern/ieee1275/init: Use net config for boot location instead of firmware bootpath
* c2cae77ab net/tftp: Fix NULL pointer dereference in grub_net_udp_close()
* fadc94b91 net/dns: Prevent UAF and double free
* cd24e2591 net/bootp: Prevent a UAF in network interface unregister
* fca6c0afd docs: Document lsmemregions and memtools commands
* 42c099786 commands/memtools: Add lsmemregions command
* 20211246a tests/file_filter: Add zstd tests
* 092449f63 tests/file_filter: Add zstd test file
* 356dcac9a tests/file_filter: Regenerate gpg keys
* 8ea83c3ee io/zstdio: Implement zstdio decompression
* 7c22c1000 fs/btrfs: Update doc link for bootloader support
* 6435551a6 docs: Add Btrfs env block and special env vars
* b63447748 util/grub.d/00_header.in: Wire grub.cfg to use env_block when present
* e4e177661 fs/btrfs: Add environment block to reserved header area
* d6525f0e6 util/grub-editenv: Add probe call for external envblk
* 4b5ea8dca util/grub-editenv: Wire list_variables() to optional fs_envblk
* 84e2bc2f1 util/grub-editenv: Wire unset_variables() to optional fs_envblk
* c7c901916 util/grub-editenv: Wire set_variables() to optional fs_envblk
* 2abdd8cd2 util/grub-editenv: Add fs_envblk write helper
* e4d684cc4 util/grub-editenv: Add fs_envblk open helper
* 512e33ec7 tests: Add "z" length modifier printf tests
* 3c9762b12 kern/misc: Add the "z" length modifier support
* 91ddada64 disk/cryptodisk: Add --hw-accel to enable hardware acceleration
* f8f68f14a libgcrypt: Add hardware acceleration for gcry_sha512
* 70b2f5f08 libgcrypt: Add hardware acceleration for gcry_sha256
* 2158d8e8a libgcrypt: Declare the sha256 shaext function
* 0ff5faf8c libgcrypt: Implement _gcry_get_hw_features()
* 812356191 libgcrypt: Copy sha512 x86_64 assembly files
* 7f9c590af libgcrypt: Copy sha256 x86_64 assembly files
* 8423176f1 lib/hwfeatures-gcry: Enable SSE and AVX for x86_64 EFI
* 06a5b88ba lib/hwfeatures-gcry: Introduce functions to manage hardware features
* d01abd713 configure: Tweak autoconf/automake files to detect x86_64 features
* a122e0262 lib/pbkdf2: Optimize PBKDF2 by reusing HMAC handle
* 961e38b2b lib/crypto: Introduce new HMAC functions to reuse buffers
* 59304a7b5 docs: Document argon2 and argon2_test modules
* 28dbe8a3b kern/misc: Implement faster grub_memcpy() for aligned buffers
* da01eb0c5 tests/util/grub-fs-tester: Use Argon2id for LUKS2 test
* c1bd9fc82 tests: Integrate Argon2 tests into functional_test
* 6a525ee64 tests: Import Argon2 tests from libgcrypt
* 6052fc2cf disk/luks2: Add Argon2 support
* 66b8718f9 argon2: Introduce grub_crypto_argon2()
* de201105d libgcrypt/kdf: Fix 64-bit modulus on 32-bit platforms
* 93544861b libgcrypt/kdf: Remove unsupported KDFs
* 1ff720641 libgcrypt/kdf: Get rid of gpg_err_code_from_errno()
* 0c06a454f libgcrypt/kdf: Implement hash_buffers() for BLAKE2b-512
* bc94dfd54 crypto: Update crypto.h for libgcrypt KDF functions
* 5b81f490c util/import_gcry: Import kdf.c for Argon2
* 6b5c671d3 commands/menuentry: Fix for out of bound access
* 21cdcb125 tests/tpm2_key_protector_test: Add a test for PCR Capping
* afddba012 tpm2_key_protector: Support PCR capping
* ae7a39900 tss2: Implement grub_tcg2_cap_pcr() for emu
* 7b39970e9 tss2: Implement grub_tcg2_cap_pcr() for ieee1275
* 39f98e471 tss2: Implement grub_tcg2_cap_pcr() for EFI
* d47d261ec tss2: Introduce grub_tcg2_cap_pcr()
* b2549b4d3 tss2: Add TPM2_PCR_Event command
* e1b9d92a8 loader/i386/linux: Transfer EDID information to kernel
* a8379e693 fs/hfsplus: Allow reading files created by Mac OS 9
* c5ff0d616 docs: Fix build warnings in libgcrypt and blsuki doc
* fa93f2412 kern/command,commands/extcmd: Perform explicit NULL check in both the unregister helpers
* 9a725391f commands/efi/tpm: Call get_active_pcr_banks() only with TCG2 1.1 or newer
* 894241c85 kern: Include function name on debug and error print functions
* 75a20cc14 kern: Make grub_error() more verbose
* 8abbafa49 net/tcp: Fix TCP port number reused on reboot
* 3dff10a97 docs/grub: Document appended signature
* 0f2dda8cf docs/grub: Document signing GRUB with an appended signature
* 0b59d379f docs/grub: Document signing GRUB under UEFI
* dbfa3d7d7 appended signatures: Verification tests
* 7f68c7195 appended signatures: GRUB commands to manage the hashes
* 6cb58b1c9 appended signatures: GRUB commands to manage the certificates
* ab7b17717 appended signatures: Using db and dbx lists for signature verification
* 97f7001e1 appended signatures: Create db and dbx lists
* b5e872417 appended signatures: Introducing key management environment variable
* 76158ed1a powerpc/ieee1275: Read the db and dbx secure boot variables
* 069f3614e appended signatures: Support verifying appended signatures
* f8e8779d8 powerpc/ieee1275: Enter lockdown based on /ibm, secure-boot
* e95c52f1f appended signatures: Parse X.509 certificates
* a33754979 appended signatures: Parse PKCS#7 signed data
* 3e4ff6ffb appended signatures: Parse ASN1 node
* 7d28bdb0b appended signatures: Import GNUTLS's ASN.1 description files
* 1fca5f397 grub-install: Support embedding x509 certificates
* aefe0de22 pgp: Rename OBJ_TYPE_PUBKEY to OBJ_TYPE_GPG_PUBKEY
* f826cc8b0 crypto: Move storage for grub_crypto_pk_* to crypto.c
* 31cc7dfe5 powerpc/ieee1275: Add support for signing GRUB with an appended signature
* ee789e1a6 lib/b64dec: Use grub_size_t instead of size_t for _gpgrt_b64dec_proc() function definition
* abb8fb6d1 util/grub-mkimagexx: Fix riscv32 relocation offset
* 1f9092bfd libgcrypt: Allow GRUB to build with Clang
* 1d2ee8f8b tests: Add test ISO files to dist package
* dfa3dbf61 tests: Test dates outside of 32-bit Unix range
* 6837293b8 lib/datetime: Support dates outside of 1901..2038 range
* 02788bfdf bootstrap: Ensure shallow gnulib clone works on newer git
* 4e42199f3 docs: Correct some URLs
* 733cc28eb docs: Update Future section to reflect current release
* 54c8573ef docs: Document new libgrypt modules
* 1562dee69 docs: Clarify section heading and fix wording
* cf1b75a14 BUGS: Update to point to bug tracking system
* 236663dfb INSTALL: Document libtasn1 needed for grub-protect
* 7bfb38627 po: Update translations to build with gettext 0.26
* 49e76ad16 term/efi/console: Treat key.scan_code 0x0102 (suspend) as Enter
* de72f3998 util/bash-completion.d/Makefile.am: s/mkrescure/mkrescue/g
* 14c2966c7 blsuki: Add uki command to load Unified Kernel Image entries
* 5190df851 blsuki: Check for mounted /boot in emu
* 51b960132 util/misc.c: Change offset type for grub_util_write_image_at()
* 8cee1c284 blsuki: Add blscfg command to parse Boot Loader Specification snippets
* e016d6d60 kern/misc: Implement grub_strtok()
* 587db89af kern/xen: Add Xen command line parsing
* b2a975bc5 include/xen/xen.h: Add warning comment for cmd_line
* 19c698d12 zfs: Fix LINUX_ROOT_DEVICE when grub-probe fails
* 6898fcf74 relocator: Switch to own page table while moving chunks
* 67a95527b configure: Generate tar-ustar tarball instead of tar-v7
* 29d515b4c build: Add new libgcrypt and libtasn1 related files to EXTRA_DISTS
* eb76b064d build: Add util/import_gcrypt_inth.sed to EXTRA_DISTS
* eb56a6af9 include/xen/xen.h: Rename MAX_GUEST_CMDLINE to GRUB_XEN_MAX_GUEST_CMDLINE
* 80df5e132 loader/arm64/xen_boot: Set correctly bootargs property for modules
* 6831d242a loader/efi/linux: Return correct size from LoadFile2
* f326c5c47 commands/bli: Set LoaderTpm2ActivePcrBanks runtime variable
* 0e367796c docs: Write how to import new libgcrypt
* b930bfa37 libgcrypt: Fix a memory leak
* d48c277c4 libgcrypt: Don't use 64-bit division on platforms where it's slow
* de49514c9 util/import_gcry: Fix pylint warnings
* 334353a97 util/import_gcry: Make compatible with Python 3.4
* 2a6de4209 libgcrypt: Import blake family of hashes
* e54187912 libgcrypt: Ignore sign-compare warnings
* e3b78e49c libgcrypt: Remove now unneeded compilation flag
* e23704ad4 libgcrypt: Fix Coverity warnings
* d65810b01 keccak: Disable acceleration with SSE asm
* f808ef0d2 tests: Add DSA and RSA SEXP tests
* 0739d24cd libgcrypt: Adjust import script, definitions and API users for libgcrypt 1.11
* 3e1c2890b b64dec: Add harness for compilation in GRUB environment
* 5ca0d5e41 b64dec: Import b64dec from gpg-error
* 3312af6e0 libgcrypt: Import libgcrypt 1.11
* a0d4c94ef loader/efi/linux: Use shim loader image handle where available
* 1b9a84e63 loader/efi/chainloader: Use shim loader image handle where available
* e31d0cd7f efi/sb: Add API for retrieving shim loader image handles
* ed7e053a3 efi/sb: Add support for the shim loader protocol
* 70897d3d3 efi: Provide wrappers for load_image, start_image and unload_image
* 030a70fca loader/arm64/xen_boot: Consider alignment calling grub_arch_efi_linux_boot_image()
* e82609a47 loader/arm64/xen_boot: Use bool instead of int
* d1a470b69 loader/arm64/xen_boot: Remove correctly all modules loaded by xen_module command
* cf5e52fa8 dl: Fix grub_dl_is_persistent() for emu
2025-12-23 22:04:30 +01:00
Leah Rowe
8b338404e8 hp8300cmt and dell 780: use legacy verbs
see patches. coreboot making changes upstream. these
are used in the meantime.

this prevents build errors. (again, see patches, specifically
the 780 one explains rationale)

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-23 18:49:47 +01:00
Leah Rowe
0ff8110a55 fix 3050micro vbt path again
i got the variable wrong, putting the dollar sign inside
the brackets, rather than outside.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-23 12:15:06 +00:00
Leah Rowe
ce302356fc coreboot/dell3050: fix VBT-related build error
During routine build testing, I noticed that the VBT path was
wrong, because this port had been converted into a variant.

This is because of the OptiPlex 5040 port that is under
review on the coreboot Gerrit website.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-23 11:15:43 +00:00
Leah Rowe
2fe3b6ee66 actually enable TBT on T580
lbmk uses make-oldconfig before running a build anyway,
so it would have been fine. however, it's best to just
enable it outright.

this change was generated by doing:

./mk -u coreboot t580_vfsp_16mb

which runs make-oldconfig on the configs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-22 11:58:38 +00:00
Leah Rowe
6e253b3e73 thunderbolt support for thinkpad t580
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-22 11:10:05 +00:00
Leah Rowe
9142c8b419 ThinkPad T580 support.
Yes.

Thank you Johann C. Rode for this excellent coreboot port.

You're a star.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-21 14:49:53 +00:00
Leah Rowe
992b03a383 coreboot/default: use 3rdparty/cmocka by default
this is used by the coreboot build system, for tests.

upstream tries system cmocka by default, but we want the
one in 3rdparty to be used.

i've changed the default to 0 (try 3rdparty cmocka). you
can still override this at runtime.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-21 14:48:30 +00:00
Leah Rowe
e7628421d7 coreboot/default: add cmocka submodule
otherwise, we get the following from coreboot's build
system, when performin operations in it:

tests/Makefile.mk:31: No system cmocka, build from 3rdparty instead...

However, *we* (Libreboot project) patch coreboot's build system,
so as to not download submodules itself, because lbmk handles
them manually. This is because lbmk's submodule handling has some
extra redundancy features.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-21 14:48:30 +00:00
Leah Rowe
946ede9e7d fix ifdtool build on coreboot/default
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-21 14:48:30 +00:00
Leah Rowe
24f25bf7bc update deguard
this adds the recent kaby thinkpads

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-19 08:17:44 +00:00
Leah Rowe
63b527e8ff cb/default: bump to rev def7aa7094, December 2025
latest coreboot revision of of today / right now at the
time of this commit

this brings the following upstream changes:

* def7aa7094 arch/riscv/smp: Fix race condition
* fc37085ddb Documentation/vboot: Update vboot supported boards list
* 5bb7a83a7a acpi/acpi_apic.c: Generate MADT LAPIC entries based on current mode
* 077191641b vendorcode/amd/opensil/Makefile.mk: Add 0x prefix for BIOS address
* 4b353affd4 soc/amd/common/acpi/lpc.asl: Add HPET device
* 0a867b3971 acpi/ivrs: Fill second EFR image value
* 92f03c0c28 mb/google/ocelot/var/kodkod: Config touchpad I2C frequency
* a923470688 drv/intel/mipi_camera: Remove duplicate comments for DSM methods
* 896984e800 mb/google/bluey/quartz: Enable parallel charging support
* de87ea0efa mb/google/bluey: Add parallel charging infrastructure
* cfb0d8a144 mb/google/bluey: Enable PD negotiation when battery is missing
* ddc1b51b43 mb/google/bluey: Enable PD negotiation in charging modes
* c4ee22e267 Reapply "mb/google/bluey: Implement EC-based off-mode detection"
* a225eefd4c drivers/spi: Add Macronix MX77U51250F chip id
* 793c15a866 mb/google/ocelot: Fix Gen4 SSD power sequencing
* b689671e79 include/acpi/acpi_apei.h: Add MCE APEI structs
* 7a41dc416b include/acpi/acpi_apei.h: Add NMI APEI struct
* 5251284e39 include/acpi/acpi_apei.h: Add PCIe APEI structs
* 53350d5c8d include/acpi/acpi_apei.h: Add internal acpi_head_t struct
* 5001b07f9c drivers/intel/mipi_camera: Add validation and remove unused defaults
* 0f1ae4ae5f drivers/gfx/generic: Add support for non-VGA devices
* ae0d232402 drivers/intel/mipi_camera: Add ACPI device type selection
* 1532eb60ee drv/intel/mipi_camera: Add CVF Support DSM function
* a64b93562d drv/intel/mipi_camera: Add I2C V2 DSM function
* c8f89e00e4 drv/intel/mipi_camera: Refactor DSM generator functions
* ea099e8b8c drivers/intel/mipi_camera: Split DSM generation into per-UUID functions
* 6459a2007a mb/{google,intel}: Add ROM type and address for MIPI camera sensors
* 11ea868b02 mb/google/volteer/var/drobit: Update pl2 minimum value
* 8ed87f71ec mb/google/volteer: Make touchpad wake user-selectable via CFR
* 7e1962a3cc mb/google/hatch: Make touchpad wake user-selectable via CFR
* 152914272c device/azalia: Drop spurious read-back of STATESTS
* 6e074550a5 device/azalia: Repurpose azalia_set_bits() for link-reset only
* ecf202b8e4 device/azalia: Add missing 521us delay after RESET# de-assertion
* d5d27badd4 Documentation: Add coreboot release 26.03 template
* 8e23c46beb Docs/releases: Update release notes for 25.12 release
* 01bc527afa soc/qualcomm/common: Add CMD-DB driver support
* 2277edff88 soc/qualcomm/x1p42100: Split dram_aop region to map dram_aop_cmd_db as non-cacheable
* a4cc178486 soc/qualcomm/common: Map AOP CMD-DB region as uncached region in MMU
* 1b5f105595 mb/google/ocelot/var/ocelot: disable ISH UART0 RX pin
* b67725d3f5 Revert "mb/google/bluey: Implement EC-based off-mode detection"
* 1dc3e45f7c mipi: Support passing user data to mipi_cmd_func_t
* 42c1947d99 mb/google/bluey: Implement EC-based off-mode detection
* e54b82b85b mb/google/ocelot/var/kodkod: Enable pcie_rp5 to allow proper enumeration of pcie_rp6
* 4cc830349c mb/google/rex/var/karis: Add fw_config probe to enable all wifi
* 173a32aa55 MAINTAINERS: Add Jayvik Desai to Google Bluey & Qualcomm SoCs
* f28997dcdd soc/qualcomm/common: Add PD negotiation attribute macro
* b70309350f arch/x86/acpi_bert_storage.c: Fix Error Section GUID compare
* 847d91b82e include/acpi/acpi_apei.h: Update APEI structs for better readability
* 679ea61d4d include/acpi/acpi_apei.h: Add APEI definitions
* eb79807bec soc/qualcomm/x1p42100: Add mainboard hook for QcLib override
* 8ece648c30 soc/qualcomm/common: Use bitwise OR for global_attributes
* 22e54a701d soc/qualcomm/x1p42100: Add AOP, QDSS, and QSEE regions to SSRAM layout
* 4d53aa7704 soc/qualcomm/x1p42100: Relocate PRERAM stack to BSRAM memory
* a26b718d5a soc/qc/x1p42100: Define pre- & post-RAM stack regions in linker script
* 1b599a8844 arch/arm64: Add an alternative entry point for ramstage code
* 641f7ac677 arch/arm64: Introduce distinct PRERAM and POSTRAM stack regions
* 2183326306 soc/qualcomm/x1p42100: Rename qcsdi region to aop_sdi in memlayout
* fad9878a3e vc/intel/fsp/fsp2_0/wildcatlake: Update WCL FSP headers to FSP WCL.3393.02
* 71b79018da util/release/genrelnotes: Restore to saved HEAD instead of origin/main
* 9f6e297399 vc/intel/fsp/mtl: Fix license header in MemInfoHob.h
* 2171af0f5f mb/lenovo/sklkbl_x280: Fix build failure
* a5d3c4c119 mb/lenovo/sklkbl: Fix headphone jack
* 0b4d41004d mb/lenovo/sklkbl: Add Lenovo Thinkpad X280 as a variant
* 9a3818f9b6 soc/mediatek/common: Print DRAM calibration status as string
* 1e8cea55a0 soc/mediatek/common/emi: Cache SDRAM size
* 9203cc827f soc/mediatek/mt8196: Add MTE tag memory to bootmem
* 3d5135fdd0 lib/bootmem: Add memory type for Armv9 MTE tag storage
* 2d45723d87 lib/bootmem: Add bootmem_add_range_from function
* 4f78a40f53 mb/google/ocelot/var/ocicat: Update Touchscreen settings
* 510f1950b4 mb/google/ocelot/var/ocicat: Update devicetree
* 35cb6aea50 mb/google/hatch: Fix CFR pointer
* 8f34fdfab3 Remove <swab.h> and swabXX() functions
* d556bc65c2 mb/google/fatcat/var/ruby: Change GPIO pins to fix audio function
* 6b5a872ce8 soc/mediatek: Pass dsi_regs/mipi_tx_regs to DSI API
* 74c13eead4 soc/mediatek/mt8196: Define dsi_regs/mipi_tx_regs structs
* a3317182ff soc/mediatek/common: Move dsi0 definition to dsi_register_v*.h
* 3607024944 soc/mediatek: Move mtk_dsi_init declaration to display_dsi.h
* 7ef424c75e soc/mediatek/common: Rename mipi_tx to mipi_tx0
* cf0b91d774 soc/mediatek: Move dsi_regs/mipi_tx_regs definitions to soc/dsi_reg.h
* 403a42f1f0 soc/mediatek/mt8173: Fix mipi_tx1 address
* 72010408b5 mb/google/eve: Add CFR option menu support
* c36b149392 mb/google/eve/Makefile: Organize and group entries by stage
* f61ecfa154 mb/google/link: Add CFR option menu support
* 75460f531c mb/google/poppy: Add CFR option to enable/disable IPU cameras
* ae8f2d8cee mb/google/poppy: Add CFR option menu support
* 99d67bae63 mb/google/glados: Add CFR option menu support
* 0d81d38a31 mb/google/skyrim: Add CFR option menu support
* c397821cb6 mb/google/guybrush: Add CFR option menu support
* c1f0be39da mb/google/zork: Add CFR option menu support
* d105934073 mb/google/kahlee: Add CFR option menu support
* 46a32a2b56 mb/google/sarien: Add CFR option menu support
* e3bee6397d mb/google/rex: Add CFR option menu support
* d0345005ad mb/google/brox: Add CFR option menu support
* ee599486ac mb/google/dedede/galtic: Add CFR option for touchpad type
* 7a78543eca mb/google/dedede/drawcia: Add CFR option for touchscreen selection
* 1890c6d165 mb/google/dedede: Add CFR option menu support
* bd89858f09 mb/google/brya: Add CFR option menu support
* a58e0704c7 mb/google/volteer: Add CFR option menu support
* 8b34490137 mb/google/drallion: Add CFR option menu support
* 0762c7d6ee mb/google/drallion/Makefile: Organize and group entries by stage
* 89902e8c80 mb/google/hatch: Add CFR option menu support
* 0f93d154b2 mb/google/octopus: Add CFR option menu support
* f0346845cd mb/google/reef: Add CFR option menu support
* 2b959f4560 mb/google/puff: Add CFR option for automatic fan control
* a8a77f9da2 mb/google/fizz: Add CFR option for automatic fan control
* cde4280796 soc/intel/apollolake: Add CFR objects for existing options
* 2e10f75751 mb/google/sarien: Increase size of SMMSTORE to 512KB
* 91c6a0b5e6 mb/google/reef: Increase size of SMMSTORE to 512KB
* 36a345f99e mb/google/octopus: Increase size of SMMSTORE to 512KB
* d7cb2d2bc5 mb/google/drallion: Increase size of SMMSTORE to 512KB
* d32a372846 drivers/smmstore: Increase default size of store to 512KB
* c109fc92ff libpayload: Add API to get physical memory size
* 519332de10 mb/google/fatcat/var/ruby: Modify VCCCORE VR Fast Vmode ICC limit
* 7f93e2fe29 soc/intel/*: Add CFR option to enable/disable the Intel iGPU
* d5ea359347 soc/intel/**/cfr.h: Fix typo of "ACPI" in UI help text
* 02a2fe7907 Merge coreboot and libpayload <endian.h> into commonlib
* 5eb7b8bd34 payloads/external/edk2/Makefile: Set SMBIOS to 3.0.0
* c3afc13a0a soc/qualcomm/x1p42100: Update memlayout for BL31 region and realign TA region
* 04f83ff7dc cpu/x86/mtrr: Simplify MTRR solution calculation on AMD systems
* 6957f84aa7 soc/qualcomm/x1p42100: Define MDSS domain registers for display clock enablement
* 9a95aef482 soc/qualcomm/common: Add API to enable Lucidole PLL for X1P42100
* 5eaf85d19b soc/intel/skylake: Use CSE reset status for reset
* 84a4cdc6a5 soc/intel/*: Only skip PMC fallback on successful CSE reset
* 4f52ca6ba6 soc/intel/common/cse: Return usable error codes
* 8795680828 cpu/x86/lapic/lapic.c: Set spurious interrupt vector to 0xF
* 41348477e3 sb/intel/common/firmware/Makefile.mk: fix INTEL_IFD_SET_TOP_SWAP_BOOTBLOCK_SIZE
* c11faad2bf mb/google/skywalker: Correct MIPI panel power sequence
* 459cdd09f4 mb/google/rauru: Add variant-specific firmware config
* fee2befc82 3rdparty/blobs: Update to upstream main
* 626789b40a mb/siemens/mc_ehl{1..5}: Unify devicetrees SerialIoI2cPadsTermination
* 0513c45a38 mb/google/nissa/var/pujjoga: Generate RAM ID for MT62F1G32D2DS-031RF WT:C
* 4a5d0dee4a soc/mediatek/mt8189: Correct AUX LDO mask bit definition
* db01aa6cb2 commonlib/device_tree.c: Fix skipping NOP tokens
* 29bec62a22 cpu/x86/Kconfig: Remove SOC_SETS_MSRS option
* f4aeac4276 soc/amd/glinda: Set FSP UPDs from devicetree for USB4
* f68450e39b vendorcode/amd/fsp/glinda: Update FSP UPDs
* 244e8edf18 soc/amd/glinda/Kconfig: Add Faegan SoC as Glinda variant
* 9e5c7eb3f8 soc/amd/glinda: Add XGBE devices
* 87475d693a soc/amd/glinda: Remove set_resets_to_cold
* dcd4f07188 soc/amd/common/fsp: Fill in DIMM voltages
* 8929659d93 soc/amd/common/acpi/lpc.asl: Report ESPI1 fixed resource
* 3053cd2dad soc/amd/common/acpi/lpc.asl: Report fixed base addresses
* 7e1aa974bf soc/mediatek/common: Refactor mtk_ddp_mode_set to support dual DSI and DSC for MIPI
* 3aaeca8378 soc/mediatek/common: Refactor mtk_dsi_dphy_timing
* aeee9450a2 mb/google/ocelot/var/matsu: Add fw_config definitions with UFSC
* 67a7e06c38 drivers/tpm: Remove duplicated op
* ac5c57d24a drivers/tpm/ppi: Fix generated ACPI
* d922ad79c6 mb/google/fatcat/var/ruby: Add firmware configuration fields with UFSC
* 980c269643 mb/google/ocelot/var/ojal: Enable Audio Codec and update FW config
* 8e7975edfd mb/google/ocelot/var/ojal: enable CS42L43 driver options
* 9a6d1d4d69 mb/ocelot/var/ocicat: Modify ocicat Kconfig for bring up
* 94fe4c6926 mb/google/ocelot/var/kodkod: Add wake configuration to cnvi_bluetooth
* e3588d82bc mb/google/ocelot/var/kodkod: Enable CNVi Wi-Fi and BT cores
* 36edc2e371 soc/qualcomm/x1p42100: Add Dload mode detection and ramdump packing
* 26a18c674d acpi: Clear whole FACS table before filling it
* 5a6addca4b mb/google/fatcat/var/ruby: Change GPIO pins to fix audio function
* e6a8143d8b drivers/intel/touch: Add support for new Intel touch I2C _DSD entries
* 25c4501223 device/dram/ddr3: Fill in voltage fields for SMBIOS type 17
* 273a41c4d9 commonlib/memory_info: Introduce new fields to memory_info structure
* abe1ac0744 mb/google/brya/var/uldrenite: Add memory MT62F1G32D2DS-031RF WT:C
* 0599f3e1bd mb/google/bluey: Condition slow charging enablement on charger presence
* 8b3ceacd93 ec/google: Check AC charger presence by reading host event register
* 5b544c67eb mb/google/rauru: Add MIPI panel support with BOE NS130069-M00
* ed9239cd85 mb/google/nissa/var/gothrax: Add Samsung parts to RAM ID table
* 445961c604 soc/qualcomm/common: Add support for loading ramdump image
* 3c563669b5 soc/qualcomm/x1p42100: Add support for APDP image packing in CBFS
* 1d70286d4e soc/qualcomm/common: Add support for loading APDP image
* fc9f828ac0 mainboard/google/bluey: Select VBOOT_ALWAYS_ENABLE_DISPLAY
* c77d256886 {mb, security}: Use EC_REBOOT_FLAG_IMMEDIATE for cold reboots
* 1a0d123ec1 ec/google/chromeec: Update EC headers
* 3bd554feb2 soc/mediatek/mt8196: Align the struct for storing DRAM calibration data
* 33fc33c132 soc/amd/common/block/cpu/noncar: Add support for bootblock CRTM init
* 8b97968e53 soc/amd/common/block/pci/amd_pci_mmconf.c: Support 64bit ECAM MMCONF
* 7a98a62f7b drivers/intel/gma: Unify coding style
* 23b00a06da drivers/intel/gma: Fix brightness handling with valid-cache logic
* 4068ba39f8 soc/intel/common/block/rtc/rtc.c: Top Swap: add Slot B selection mechanism
* a65b874472 mb/dell: Convert OptiPlex 3050 into variant
* 2ce1068542 mb/google/ocelot/var/ojal: Decrease display count from 5 to 4
* b31e62ae5c mb/intel/ptlrvp: Add LPCAMM T3 RVP board support
* 58cdf9e668 soc/intel/pantherlake: Add LPCAMM memory support
* 67777b7671 soc/intel/common: Add LPCAMM memory topology support
* bb18e0b91d mb/google/skyrim: Increase size of SMMSTORE to 512KB
* dd1e54efc0 mb/google/zork: Increase size of SMMSTORE to 512KB
* 60e375fae4 mb/google/guybrush: Increase size of SMMSTORE to 512KB
* eb52862132 mb/google/brox/var/caboc: Update SSD port and FPMCU setting
* 85101704ae mb/ocelot/var/ocicat: Create ocicat variant
* 2975d7220a mb/google/ocelot/var/matsu: Update devicetree
* 0e9d85425e mb/google/ocelot/var/matsu: Fix GPP_V3 internal pull-up configuration
* 4f257a28f8 mb/google/ocelot: Add EC_GOOGLE_CHROMEEC_SKUID config
* db2ac42405 soc/mediatek/common: Refactor DDP mode setting
* d51f780515 mb/siemens/mc_rpl: Correct SMBIOS socket type to BGA1744
* 2f95552802 mb/siemens/mc_ehl: Move Kconfig switch to variants
* 3c49c13995 util/ifdtool: fix typo PSL->MSL
* a87e699f04 mb/lenovo/m900_tiny: Enable Vboot
* afc191357f 3rdparty/intel-microcode: Update to upstream main
* cbfa28b06e mb/google/fatcat/var/ruby: Modify power limit configuration
* f13e800a71 mb/amd/crater/Kconfig: Use A/B recovery scheme for renoir
* 416f67f670 vendorcode/amd/fsp/.../fsp_h_c99.h: Use fsp2_0 structs
* b94a84a792 drivers/efi: Exclude verstage from EFI variable store files
* bae5262c69 include/option: Add verstage stub for UEFI variable store backend
* 2d78478345 drivers/intel/gma: Reapply cached brightness once BCLM is valid
* 2ad08f9d72 drivers/intel/gma: Expose full brightness ladder
* 2e96a71e6f drivers/intel/gma: Cache brightness level
* 36632a08a8 soc/qualcomm/x1p42100: Reserve 33 MB DRAM memory for Display requirement
* 5807b59fc5 mb/google/rauru: Report panel ID for sapphire
* 49da58dccf drivers/mipi: Add support for BOE NS130069-M00 panel
* e9ebcb2918 mb/{google,intel}: Fix MIPI camera VCM type and address configuration
* 30b4383944 mb/{google,intel}: Set SSDB platform field for MIPI camera sensors
* 4c025191c7 drivers/intel/mipi_camera: Remove disable_ssdb_defaults option
* c75236d436 drivers/intel/mipi_camera: Set additional SSDB defaults
* 866b79c9fe drivers/intel/mipi_camera: Always generate PLD for camera sensors
* c6ed8c91fb drivers/intel/mipi_camera: Document more SSDB fields
* 423fbcd06b drivers/intel/mipi_camera: Adopt SSDB sensor SKU bitfield
* aa18a6fe8d drivers/intel/mipi_camera: Codify SSDB field enums
* f8d12a0bdb drivers/intel/mipi_camera: Add SSDB platform subtype enum
* 99cb6415ba drivers/intel/mipi_camera: Rename flash enum to match SSDB field
* c91ea7c582 drivers/intel/mipi_camera: Flesh out SSDB platform enum
* 0361e1a865 drivers/intel/mipi_camera: Verify SSDB struct size at build time
* b5d68e41a2 drivers/intel/mipi_camera: Tidy SSDB comment wrapping
* ab4c2fd0e8 drivers/intel/mipi_camera: Extract SSDB definitions into separate header
* d09ea1c351 cpu/intel: Add SMBIOS Socket BGA1744 type
* d97cb61b50 ec/google/chromeec: Add CFR option for RGB keyboard boot color
* e695731399 ec/google/chromeec: Add RGB keyboard helper functions and enum
* 4eb524ee9d spd/ddr4: Add three more parts
* e4a809d441 spd/ddr4: Double packageBusWidth of dual die package parts to 16
* 8753155f71 mb/google/slippy/var/peppy: Add CFR menu option for touchpad type
* 6f6a10df88 mb/google/slippy: Add CFR option menu support
* e366e0ba7d mb/google/slippy/Makefile: Organize and group entries by stage
* 6be83443e5 mb/google/auron/var/lulu: Add CFR option to enable/disable touchscreen
* 88d3f563b3 mb/google/auron: Add CFR option menu support
* 7ed515d1c3 mb/google/auron/Makefile: Organize and group entries by stage
* e15895b5c4 mb/google/poppy/var/nautilus/acpi: Fix CI02 comment
* 4dc03c54fc mb/google/poppy/var/nocturne: Hide FPR device in ACPI
* e85a0b7ff1 mb/google/puff: Remove unsupported EC features
* 3459502e0c mb/starlabs/starfighter: Enable pmc_shared_sram device
* 9b0af48604 mb/starlabs/starbook/mtl: Update GPIO config
* d3d4571411 soc/intel/common/block/graphics: Use Xeon W-11865MRE IGD PCI ID
* 1cfe413f95 soc/intel/common/block/lpc: Support RM590E eSPI
* c195859748 soc/amd: add ACPI code for I3C controller
* 02342b31df soc/amd/*/memmap.c: Report FCH MMIO regions as reserved
* 5078d32ccc mb/google/brya: Enable ACPI S3 sleep state support
* eb504eb49a mb/samsung/lumpy: Fix HDA pin configuration issues
* afd5e5d444 mb/samsung/lumpy: Convert HDA verbs to use AZALIA_PIN_DESC macros
* 109672a9a9 drivers/intel/gma: Guard legacy brightness fallback
* 908c2b54c6 mb/starlabs/starbook/mtl: Fix Card Reader USB Port
* 796d3b37aa mb/google/fatcat/var/moonstone: Update fw_config definitions with UFSC
* 2ce4e09469 drivers/intel/fsp2_0: Add typedef FSP_UPD_HEADER
* 7afe1e9f9d mb/google/fatcat/var/lapis: Adjust touchpanel power on timing
* 36f4341533 mb/starlabs/starfighter: Add Arrow Lake (285H) variant
* 80cf2008a9 spd/lp5: Add SPD for MT62F1G32D2DS-031RF WT:C
* f1d1c825dc mb/siemens/mc_rpl1: Enable IBECC
* 866a0591f7 mb/siemens/mc_rpl1: Set coreboot ready LED
* 801795d4dd mb/siemens/mc_ehl6: Alphabetize Kconfig options
* 1a11dca12d mb/siemens/mc_ehl6: Send POST codes to NC FPGA via PCI
* fceb033372 mb/siemens/mc_ehl6: Limit PCIe RP7 speed to Gen2
* 760c3f6abc mb/siemens/mc_ehl6: Activate SATA interface port 1
* 54f2652bde mb/siemens/mc_ehl6: Enable auto impedance calibration on GbE 0
* b6e7f3e005 mb/siemens/mc_ehl6: Change GbE LED settings
* aad2b715ea mb/siemens/mc_ehl6: Remove PSE GbE 1
* e19f2b313e mb/siemens/mc_ehl6: Enable PCHHOT_N via GPIO
* 43d5f70576 mb/siemens/mc_ehl6: Enable PTM for all enabled PCIe RPs
* 864e3ca661 mb/siemens/mc_ehl6: Adjust I2C setup
* 31f44f5521 mipi: Add DSC configuration and rate control parameters to panel header
* 743e31939c drivers/intel/fsp2_0/.../fsp/upd.h: Fix excess endif
* 2aadfc2b5e soc/amd/common/block/acpi: Add ACPI HEST table
* cc542c15f4 include/acpi: Move Error definitions/declarations into acpi_apei.h
* 2462e3a027 soc/mediatek/mt8188: Adjust memlayout for bootblock
* 804aab3abb mb/google/fatcat/var/ruby: Modify usb3 port setting
* fecf05c4f2 mb/google/trulo/var/kaladin: Mute speaker amp to prevent pop noise on reboot
* f35cb39de5 soc/amd/cezanne: Increase APOB DRAM size for Renoir
* 384e6e1c37 soc/amd/cezanne: Remove set_resets_to_cold
* 97291b5838 soc/amd/cezanne: Optionally propagate UART0 through ACPI
* 149d11d1d8 soc/amd/cezanne/Kconfig: Select Kconfig to program the PSP_ADDR MSR
* 520bc70b57 mb/amd/crater: Configure UART1 GPIOs
* 0ed1529ce3 src/vc/amd/fsp: fix type 17 DMI info
* e8599956dc mb/amd/crater: Make NVMe reset GPIO configurable
* 67bf203e52 mb/google/nissa/var/guren: Add missing settings for WWAN
* 3dabe4f857 mb/google/brox/var/caboc: Increase I2C0 touchpad tHD to 0.53 us
* 12e763eece device/pci_ids: Add DIDs for TGL-H (GT1 and RM590E)
* 01540f036e mb/google/fatcat/var/ruby: Use spd-11 for MT62F1G32D2DS-020 WT:D and K3KL8L80EM-MGCV
* 14e96b4ef1 mb/google/brox/caboc: Mute speaker amp to prevent pop noise on reboot
* 567186a000 mb/google/bluey: Add support for off-mode charging
* 27fcb8617d commonlib: Add CBMEM ID to store boot mode
* d6132c4c03 mb/google/bluey: Use SOC PMIC API to detect off-mode charging event
* 201ebd48ee soc/qc/x1p42100: Add APIs to read PON reason from PMIC
* 293f3a7f5c soc/qc/spmi: Add API to read byte array
* 9f675eb96b soc/qc/common: Update SPMI_ADDR macro for better type safety
* cb1045a8b8 soc/intel/pantherlake: Update GT domain TDC value for PTL_TDC_1 SKU
* b0ee0c4620 soc/intel/pantherlake: Fix IA domain TDC value for PTL_TDC_2 SKU
* 6dbcf903a5 soc/intel/pantherlake: Add ICC Max and TDC settings for SKU_7
* 2148143ae9 soc/intel/pantherlake: Separate TDC configuration for different TDPs
* c7273c8ddc mb/google/fatcat/var/ruby: Add proto touch panel address
* 8575232317 mb/google/ruby: Migrate to UFSC
* 47101fc224 soc/amd/cezanne/Kconfig: Make AMDFW_CONFIG_FILE configurable
* c9f124a8fb mb/amd/crater/ec: Make macro ENABLE_M2_SSD1 a Kconfig option
* 430e34cd0f mb/amd/crater: Move gpio configuration to early_gpio
* 14b5c004f5 mb/amd/crater/ec: Create function to get board revision
* bd858faee8 mb/amd/crater: Add XGBE support
* f61553c9fa vc/amd/fsp/cezanne: Add Renoir FSP
* 87f8d15c87 ec/google/chromeec/cfr: Fix CFR callback signatures
* 7fb0f14ebe libpayload: arm64: Fix asynchronous exception routing in payload
* b584967d04 mb/google/ocelot: Add wake configuration to cnvi_bluetooth
* fc88b62174 mb/siemens/mc_ehl6: Enable PCIe root ports and clocks
* 5a4c749520 mb/siemens/mc_ehl6: Add new board variant based on mc_ehl2
* f5f304a5f3 mb/google/skywalker: Disable CHROMEOS_USE_EC_WATCHDOG_FLAG
* e4b0410946 soc/mediatek/mt8189: Enable MEDIATEK_WDT_RESET_BY_SW
* 1ae0cebff3 soc/mediatek: Add Kconfig option MEDIATEK_WDT_RESET_BY_SW
* 7d3bf767cc soc/mediatek/mt8189: Move WATCHDOG_TOMBSTONE from SRAM to SRAM_L2C
* a64dd410d8 mb/google/fatcat/var/ruby: Update EN_SPK_PA GPIO pin configuration
* 2f9b4ad6a5 soc/qualcomm/x1p42100: Add DFSR table configuration support
* 51e99de558 soc/intel/common/block/rtc/rtc.c: control Top Swap via CMOS option
* 56be23114e mb/google/rauru: Use chromeos-legacy.fmd for Hylia and Navi
* 10802bac16 spd/lp5: Modify SPD for MT62F1G32D2DS-020 WT:D and K3KL8L80EM-MGCV
* e5d10e5d23 mb/lenovo/t480: Fix headphone jack
* 40b2a2b03c soc/mediatek/mt8196/booker: Refactor CMO property clearing with loop
* 1b0f9c5458 mb/google/nissa/var/telith: Add parade touchscreen support
* ddb3f0b17f drivers/hwid_dmi: Populate SMBIOS product name from CBFS hwid file
* 7a1e63308a acpigen_ps2_keybd: map insert
* 607740999d acpigen_ps2_keybd: map capslock
* a7efa40e39 acpigen_ps2_keybd: map KEY_HOMEPAGE to 0xaa scancode and TK_HOME
* fd603e5102 libpayload: Add CBMEM_ID_MEMINFO to sysinfo
* bae3e02662 include: commonlib: Move memory_info and dimm_info to commonlib
* d03799ec3c soc/mediatek/mt8196: Configure registers and parameters required for MTE
* 7521f3ea83 soc/qualcomm/x1p42100: Define pre and post-RAM DMA coherent regions
* d277b35307 soc/qualcomm/x1p42100: Relocate ddr_information and watchdog tombstone
* 958099b114 soc/qualcomm: Map the post-RAM DMA coherent buffer
* 931fa9c01d memlayout: Introduce PRERAM and POSTRAM DMA coherent regions
* af9d809823 soc/qualcomm/x1p42100: Move coreboot stack to SSRAM
* fec1032ee8 arch/arm64: Add timestamps for Secure OS (BL32) loading
* d0177bd102 soc/qualcomm: Add QCLib execution timestamps
* 0145ebe847 commonlib: Add timestamps for Qualcomm QCLib and ARM TFA
* cf2978f4b6 drivers/vpd: Search VPD info at 0x0 first
* a56a97d167 mb/starlabs/common/cfr: Adjust help text for S0IX
* 541fd14fd9 mb/google/nissa/var/uldren: Increase Touch IC enable delay time
* 0c18e7680a mb/google/fatcat/var/ruby: Remove GPP_D16 and GPP_D17 in fw_config.c
* 237944186e mb/google/nissa/pujjolo: update verb table
* cae53bea52 ec/google/chromeec: Add CFR options for keyboard backlight and fan control
* 1ca1dc6c31 ec/google/chromeec: Add ability to enable auto fan control via setup option
* 450389be05 ec/google/chromeec: Add fan presence helper function
* 9d355a39aa mb/amd/crater/ec.c: Enable power/reset for PCIe lanes
* 141fd11d79 mb/amd/crater: Rename ETH_AIC_SLOT_ONLY -> PCIE_DT_SLOT
* 1e28ff6955 src/mb/amd/crater/port_descriptors_renoir.c: Prettify code
* a48fd9ed7f soc/amd/cezanne: Add SOC_AMD_RENOIR as a Cezanne variant
* 760e19e18f mb/lenovo/sklkbl: Use spd_tools infrastructure for SPD binaries
* 8a83b86254 spd/ddr4: add parts
* 0ef4bd807c mb/google/ocelot/var/ocelot: Update DDR5 memory configs
* 7b11254d58 mb/google/ocelot/var/kodkod: Add overridetree
* aa1d44b644 mb/google/ocelot/var/kodkod: Update gpio settings
* a363007c3b ec/dell/mec5035: Route power button event to host
* 18dbeca5f4 util/autoport/azalia.go: Select CONFIG_AZALIA_USE_LEGACY_VERB_TABLE
* e9c47bf99e drivers/intel/fsp2_0: Add 1-bpp monochrome option for VGA mode 12
* f643141728 mb/google/fatcat: Option to enable monochrome VGA mode 12
* e05492cfb4 soc/intel/pantherlake/romstage: Configure VGA mode 12 monochrome buffer
* d3760cdfdf mb/google/bluey: Configure QUP0 SE5 as I2C
* abc87d533d mb/google/bluey: Introduce config to specify absence of USB-A port
* 872e06d60c mb/samsung/stumpy: inline fan thresholds and drop GNVS programming
* 8401bbd2ff mb/google/fatcat/var/ruby: Change touch panel address
* a4242e5c38 ec/starlabs/merlin: Fix get_ec_value_from_option() value validation
* 567470cbb3 payloads/edk2: Add iPXE EFI support for EDK2 payload
* f40de4e162 payloads/ipxe: Default enable serial output only if CONSOLE_SERIAL
* 962edb7e6d payloads/ipxe: Guard PXE_ROM_ID for non-EFI builds
* a907c6fb8d payloads/ipxe: Default to building from master branch
* 4081793ff2 payloads/external/edk2: Replace dependencies on EDK2_REPO_MRCHROMEBOX
* 10d606bfca soc/intel/common/acpi: Add P2SB write functions
* 7436c59875 util/amdtool: Add support for Phoenix AM5 CPUs
* 8f3626c4b5 util/amdtool: Add utility to dump useful information on AMD CPUs
* 3cf976e51a soc/mediatek/mt8196: Add dual display pipe path
* 14595d64de lib/edid_fill_fb: Add dual pipe flag to lb_framebuffer_flags
* 486b1b51af mb/google/bluey: Cache low battery mode check
* 33418b7e68 soc/qc/x1p42100: Disable compression for peripheral firmware binaries
* 5bfc2d23bb soc/qc/x1p42100:: Select Secure OS options in SoC Kconfig
* f5f943c1c3 bluey/kconfig: Consolidate SPI flash driver selection
* ee59936e83 commonlib/device_tree: Add an API to check if a DT is an overlay
* 0416ac9829 mb/google/var/fatcat/lapis: Modify type-A USB3 port0/1 tx_de_emp
* dfe553aebb util/intelvbttool/Makefile: Add install target
* 493e3d182e payloads/external/iPXE: Allow building EFI target
* 62fc93de90 soc/qualcomm/x1p42100: Add NVMe Power Loss Notification GPIO configuration
* 2b7b89ae31 soc/qualcomm/x1p42100: Update PCIE PHY init sequence
* 91594f4894 drivers/option/cfr.c: Replace memcpy() to avoid uninitialized object
* 04ea4724e2 Makefile.mk: separate bootblocks into BOOTBLOCK and TOPSWAP
* f164feba3e ifittool: allow adding files from a separate region
* 91073f37d7 mb/google/brya: Increase RW_SECTION_* by 256KB for 16MiB boards
* a43498e193 util/inteltool: Enable dumping GPIOs from Tiger Lake IoT PCH
* 04778ddd38 drivers/option/cfr: Remove old sm_object from constructor
* b535db8f1e soc/intel/cmn/usb: Add helper macro for USB 3.0 port TX configuration
* c197643d44 drivers/intel/gma/acpi: Add power management methods for GFX0
* 773997c92d drivers/intel/touch: Avoid returning undefined pointer
* 9dc35142ac soc/amd/stoneyridge: Generate SATA ACPI registers at runtime
* d62653749c payloads/libpayload: Support legacy LZ4 compression format
* 29faf77d4a mb/siemens/mc_rpl1: Limit CPU RP1 to PCIe Gen2 speed
* fad0908c5b soc/intel/alderlake: Make CPU RP PCIe speed configurable
* 04d5201426 treewide: Fix include guards
* 971f10d1d7 mb/google/var/fatcat/lapis: set custom SVID/SSID to load fw for CS35L56
* ace2e540d0 soc/intel/pantherlake: Update CONSOLE_UART_BASE_ADDRESS Kconfig value
* a65d9fe589 mb/google/fatcat: Remove FSP_UGOP_EARLY_SIGN_OF_LIFE from Lapis
* 729918628d 3rdparty/blobs: Update to upstream main
* d4bee96484 mb/lenovo/sklkbl: refactor memory_init_params to use gpio_base2_value()
* 2a9deabc35 commonlib/coreboot_tables.h: Fix lb_smmstorev2 alignment
* 0ba4505024 payloads/external/edk2/Makefile: Configure AP wakeup in UEFI payload
* 87c3373925 mb/google/fatcat: Add FW_CONFIG Support for TAS2563
* e08a35f806 drivers/sof: Add support for tas2563 speaker topology
* a3ea128ecf drivers/i2c/tas2563: Add driver for generating device in SSDT
* 240e17025c src/soc/intel/ptl: Add LPSS UART DMA control
* afa6c31ef5 soc/intel/alderlake/romstage/fsp_params.c: Refactor `pcie_rp_init()`
* ec5b5386d4 soc/intel/mtl/romstage/fsp_params.c: Refactor `pcie_rp_init()`
* 4c5c62bc8d mb/google/fatcat/var/ruby: Modify gpio pin for enabling audio function
* 2804a0d771 mb/google/fatcat/var/lapis: Update fw_config definitions with UFSC
* 0e1742a7e2 mb/google/bluey: Control slow battery charging via boot mode
* 113cef70fd soc/intel: Move USB port macros (2.0/3.0/TCSS) to IA common header
* 3c69295ce4 mb/google/fatcat/var/ruby: Add new supported memory part
* d18cc50e6a soc/intel/xeon_sp: Use common smm_relocate
* d0c936eea1 mb/google/nissa/var/guren: Tune SX9324 register for 5G LTE module
* 8851b5b0e7 soc/intel/pantherlake: Program HDA SVID/SSID
* c917ecf21e soc/intel/{adl,mtl}: Fix CLKSRC handling for compliance mode
* 312d455a93 soc/intel/{adl,mtl}/romstage/fsp_params.c: Fix printf specifier
* 786ac14d48 drivers/option/cfr: Add optional override table for default values
* ea84a29a27 mb/google/trulo/var/pujjoquince: Enable Bayhub LV2 driver
* 84e000b88e libpayload: arm64: Fix alignment for exception_state
* 9210f2fd1c mb/google/fatcat/var/lapis: add ILITEK touchscreen support
* b933a554ba mb/google/var/fatcat/lapis: Modify fw_config for audio and touch
* b3b7b7a027 mb/emulation/qemu-q35/Makefile.mk: Use all-y for memmap.c
* bb3e59051a mb/google/brya: Check power state before process _ON method for BT
* 0f7c54d7d1 mb/google/fatcat/var/felino: Disable card reader in coreboot
* 7946d2d65d mb/google/fatcat/var/felino: Add reset_gpio for SSD RTD3 configuration
* 8e2567c7a9 mb/google/fatcat/var/lapis: Adjust touchpad I2C frequency
* f8da2bf9b2 mb/google/fatcat/var/ruby: Modify camera enable gpio pin.
* 45163509cf util/cbfstool/cbfs-payload-linux.c: Remove TODO
* bdcd65bd7f ec/starlabs/merlin: Add battery capacity offsets
* 224ddb85e3 ec/starlabs/merlin: Choose a better default for GPE SCI
* 696344ac01 ec/starlabs/merlin: Optimise Kconfig defaults
* 649a6a591b ec/starlabs/merlin: Correct Kconfig dependancies
* 0d35c3fcc3 mb/starlabs/starbook: Fix inclusion of CPU RP ASPM option
* 87475ef37f mb/starlabs/common: Move power profile enum to common code
* 98e0ff1e4b mb/starlabs/*: Move DMIC disabling code to common dir
* 082ad480d9 mb/starlabs/*: Separate WiFi and Bluetooth controls
* abf630c96b mb/starlabs/byte_adl: Add wireless CFR object
* a58d99575e mb/starlabs/*: Move CFR object defs to common directory
* 74dcb4c679 mb/starlabs/common: Adjust the includes inline with coreboot
* 6b30e1f46b mb/google/dedede/var/pirika: Add support memory for CXMT CXDB5CBAM-MA-B
* d4e8af407c spd/lp4x: Add CXMT CXDB5CBAM-MA-B memory
* 8d7183a904 ec/google/chromeec: Add option to set keyboard backlight level at boot
* 973d0faf65 util/amdfwtool: Move needs_ish and combo_new_rab to data_parse.c
* 8449a15aed soc/qualcomm/x1p42100: Reduce USB OTG state enable timeout to 20ms
* f4af55a008 spd/lp5: Add SPD for MT62F1G32D2DS-020 WT:D and K3KL8L80EM-MGCV
* 9bea3130b5 mb/google/skywalker: Add AW88081 support for beep sound
* d8bcf242c6 Revert "commonlib/endian: Silence GCC -Warray-bounds false positives"
* 66039a61f1 Revert "commonlib/endian: Restore -Warray-bounds at the end of file"
* c27c9db51b mb/samsung/stumpy: Fix thermal configuration issues
* 288889cd98 mb/google/jecht: Fix thermal configuration issues
* 9fa2d55987 mb/google/beltino: Fix thermal configuration issues
* 76a48b5158 mb/google/beltino: Remove unused GNVS fan configuration
* 8cc8f219bf Documentation/drivers: Add ACPI five-level fan control documentation
* 47c4da36c4 util/amdfwtool/data_parse.c: Remove duplicate MP2_CFG_FILE
* fa23504c59 mb/siemens/mc_rpl: Alphabetize Kconfig options
* 8411fef90f mb/siemens/mc_rpl1: Switch from LPSS UART to legacy 8250 I/O UART
* 534fceb36a mb/siemens/mc_rpl1: Set PCI bridge function for NC_FPGA
* 8ce9255f82 mb/samsung/stumpy: Fix ACPI fan control FNP4 power resource
* f12f292d91 mb/google/intel/*: Fix ACPI fan control FNP4 power resource
* b9b95c917a mb/google/guado: Fix ACPI fan control FNP4 power resource
* 8a518b2134 mb/google/beltino: Fix ACPI fan control FNP4 power resource
* 6d751ef987 payloads/edk2: Drop EDK2_PCO_MMIO_EMMC Kconfig option
* 4423a0b390 payloads/edk2: Drop EDK2_UFS_ENABLE Kconfig option
* a86a5ebf7c payloads/edk2: Update default MrChromebox branch from 2502 to 2508
* 40a8466655 mb/google/fatcat: Add option to enable VGA mode 12
* 824992ddef soc/intel/pantherlake/romstage: Configure VGA mode 12 planar buffer
* 74113f5d5e drivers/intel/fsp2_0: Add options to config VGA mode 12
* 75318743c3 commonlib: Add pKVM DRNG related timestamps
* 2646eeffb2 mb/google/skywalker: Create variant Dooku
* 1b2675e4f2 soc/mediatek/mt8189: Require libbl31.a to exist
* 9c0a914192 libpayload: Fix printf edge cases for precision
* ebc2030ff7 soc/intel/pantherlake: Enable HW managed microphone privacy
* 4d9dacae16 mb/google/fatcat/var/ruby: Modify touchpad device setting to enable function
* 2821e8e2ae soc/intel/ptl: Remove redundant HAVE_BMP_LOGO_COMPRESS_LZMA Kconfig
* eadf2ee4a3 ec/starlabs/merlin/cfr: Replace integer literals with named constants
* 2bbc0f1ad3 mb/starlabs/starbook/{kbl,cml,tgl}: Control USB Bluetooth with wireless
* 2c9596555b mb/google/skyrim: Use edge (vs level) triggering for PS2K
* 0c3f304d5a mb/starlabs/byte_adl: Enable Wake On Lan
* ca5b51ef9c mb/google/bluey: Select QTEE firmware dependent Kconfig
* fe7b75d792 mb/google/fatcat/var/moonstone: Add fw_config touchscreen setting
* cfdaff3f70 commonlib/endian: Restore -Warray-bounds at the end of file
* 32ec29a51e mb/google/fatcat/var/kinmen: Disable RT721 clock stop support
* 4b50bc9e5f payloads/external/U-Boot/Makefile: Add custom repo and tag
* 3d41ac370d payloads/external/U-Boot/Makefile: Remove conditional
* c3b5c8723e ec/google/chromeec: Add function to determine keyboard backlight presence
* 7afd731849 ec/google/chromeec/acpi: Fix long battery string reporting for Windows
* bc475414c7 MAINTAINERS: Add Chen-Tsung Hsieh for MediaTek platforms
* 65dc0bdd7e mainboard/fatcat/lapis: Override PMC GPE configuration
* 4ea33e5ffa mb/google/fatcat/var/lapis: Enable THC HID over I2C mode
* 111da2557a mb/google/fatcat: Preserve VGPIO GPE for THC wake on touch
* e167e56883 mb/google/nissa/var/yavilla: Add stop pin for G2 touchscreen
* 1fa24898e2 soc/intel/common/block/pcie: Move speed helper to pcie_helpers.c
* 66f40a86de ec/starlabs/merlin: Move version offsets to ECDEFs
* 82367b8205 mb/google/ocelot/var/matsu: Add overridetree
* 05c0e16593 mb/google/ocelot/var/matsu: Update GPIO table
* 98c7be30ad mb/google/fatcat/var/moonstone: Support new schematic changes
* 5eafe672e3 vc/intel/fsp: Update WCL FSP headers to 3344_03
* 641eeca835 lib/vga_gfx: Fix left-up and right-up orientations
* a4f067c058 Makefile.mk: Align FMAP COREBOOT region to 4k boundary
* 410506b47c Makefile.mk: Print all FMAP region sizes in hexadecimal format
* c189604f43 mb/goog/ocelot/var/ocelot: Enable rp5 if PCIE WiFi detected
* 4a806a6865 ec/starlabs/merlin: Only show EC FW options for ITE EC
* 04d9a0d0f0 ec/starlabs/merlin/Kconfig: Fix typo in description/help text
* 1eda98a16e mb/siemens/mc_rpl1: Document CLKSRC 2 usage for PCIe RP5
* 1815a204b4 src/mainboard/lenovo: Add smbios_slot_desc, fix register types
* da204a92c1 vc/intel/fsp/wildcatlake: Expose PchHdaMicPrivacyMode
* 105598545e soc/intel/pantherlake: Update thermal design current parameters
* a5b51ab285 mb/google/rex/var/kanix: Add H58G66CK8BX147 to RAM ID table
* d7f427a7d2 util/xcompile: Fix compiler detection on newer Linux distros
* 82d90b1f21 Revert "mb/starlabs/*/rpl: Re-enable GpioOverride"
* 784d8f25f9 mb/google/fatcat/var/ruby: Enable panel touch function
* 56a8c40efa mb/starlabs/starlite_adl: Add missing ACPI entry for USB card reader
* 4047a44b68 sio/nuvoton/common/nuvoton.h: Add common Nuvoton SIO LDNs
* 3a1d6d5ded mb/google/brox/var/caboc: Adjust WWAN power off sequence
* b42f74122c Documentation/mb/lenovo: Adjust docs for Thinkpad T470s/T580
* 70e79f43b1 Haswell NRI: Print and fill in memory-related info
* 1730d05ec3 nb/intel/haswell: Factor out `report_memory_config()`
* 3bbfbd37e1 nb/intel/haswell: Factor out `setup_sdram_meminfo()`
* 3ffb01e9cb mb/siemens/mc_rpl1: Disable I2C1 and enable I2C6
* 4563db2807 mb/google/nissa/var/riven: Add H58G66CK8BX147 to RAM ID table
* a748e8b82b mb/google/fatcat/var/ruby: Enable touchpad function using I2C interface
* a92a2ee5d6 mb/starlabs/byte_adl: Expose fan control option in CFR
* bbb895436f mb/nissa/var/pujjoga: Add single ram configuration
* e2cf7f7dc7 soc/mediatek/common: Fix MMU assertion for framebuffer region
* a5ddfa963f mb/starlabs/starlite_adl: Increase ME region size to match IFD
* 7484a887b8 mb/google/ocelot: Fix EC sync IRQ configuration for board variants
* b1ed60b910 mb/google/fatcat/var/ruby: Disable FSP_UGOP_EARLY_SIGN_OF_LIFE temporarily
* fea1b2abbe mb/google/nissa/var/pujjocento: Adjust touch panel timing for stability
* 8f1c54685a drivers/mipi: Fix pixel clock and enable C-PHY for TM_TL121BVMS07_00C
* 979fdee1d9 soc/mediatek/mt8189: Support MIPI C-PHY interface
* 44635f328c soc/mediatek/common: Add C-PHY support for MIPI DSI
* c63e901b99 mipi: Add panel flags to support C-PHY interface
* 385ae6669b mb/gigabyte/ga-h77m-d3h/devicetree.cb: Re-enable IGD and PCIe VGA
* 2c6cf2c2a8 include/cper.h: Update CPER structures with __packed attribute
* d97644dd3f mb/asrock: Add Z77 Extreme4
* a73db6d451 mb/intel/ptlrvp: Add fw_config support for SPD selection
* 3ef1cf9f84 soc/amd/turin_poc: Add Turin SoC structure as a copy of genoa_poc
* 668d643e5c mb/lenovo/sklkbl_thinkpad: Add Lenovo Thinkpad T470s as a variant
* 8a6f9bf731 ec/google/chromeec: Update EC headers
* 745f1312aa include/cper.h: Update comments to UEFI spec version 2.10
* aab8ad98b6 mb/google/ocelot: Create kodkod variant
* 2279ba80e1 .gitignore: Add .clangd as a "Development friendly file"
* cd4af952e7 mb/google/ocelot/var/ocelot: Update DDR5 memory configs
* 1af54d9784 drivers/intel/touch: Change I2C speed type to i2c_speed enum
* 84a348f4bf ec/starlabs/merlin: Remove the fast charge option
* 1699d455e7 vc/intel/fsp: Update PTL FSP headers to FSP 3373_03
* b87a9795de tree: Use boolean for s3resume
* ec1068883f mb/google/nissa/var/guren: Add initial WWAN related settings
* 752d49a4ff mb/google/fatcat/var/moonstone: Disable RT721 clock stop support
* 155041ad4c soc/qualcomm/x1p42100: Add EUSB2 HS repeater support for USB Type-C
* 6e45016610 intel soc,southbridge: Add Kconfig to set TSBS in IFD during build
* f4271cad0a ifdtool: Add set top swap size PCH strap subcommand
* ab4b82fb3c util/lint: Add a license check exception for .gitkeep files
* 03524780ff soc/qualcomm/x1p42100: Support loading QTEE FW config files
* 50adb3f23c mb/google/bluey: Increase FW_MAIN_A/B slot size to 4.5MB
* bbdf2eab6a soc/mediatek: Rename DSI common files for improved readability
* 8a2c04e04d mb/starlabs/*/rpl: Re-enable GpioOverride
* 9ff9f2904b mb/google/bluey/var/quartz: Enable all spi flash drivers
* f6743fba29 mb/google/fatcat/var/moonstone: Enable Intel DPTF support
* fc736de10e ec/starlabs/merlin: Remove the EC_STARLABS_NEED_ITE_BIN option
* 3dee4cd0c0 soc/intel/pantherlake: Correct Touch Controller Speed Configuration
* 7376761bdf mb/nissa/var/pujjoquince: Modify fingerprint configuration
* 6ffbc9a929 soc/mediatek: Move mtk_dsi_reset() to mtk_dsi_common.c for reuse
* 668ea97075 commonlib/endian: Silence GCC -Warray-bounds false positives
* 4a3cc37cbd crossgcc: Upgrade binutils from version 2.44 to 2.45
* 35d4b3f2f4 arch/arm64: Support to load QTEE firmware in x1P42100
* e38056bef8 amdfwtool: Move ISH before PSP L2
* c1c83df3b5 mb/emulation/qemu-riscv: Enable ACPI by default
* 5daf497df4 arch/riscv: Add ACPI support for riscv
* 5c85793d26 mb/google/fatcat/var/lapis: Add cs42l43 and cs35l56 Soundwire links
* 14fc6c3469 crossgcc: Drop nds32le-elf toolchain from default builds
* fce489e9e5 drivers/intel/touch: Check SoC I2C speed function exists before calling
* 249883d5bf mb/starlabs/starlite_adl: Squash SB and non-SB board variants
* 80861a9f69 mb/starlabs/starlite_adl: Add CFR option for USB card reader
* 5c1a9fa809 mb/google/fatcat: Create ruby variant
* 43df7b14ae mb/var/uldrenite: Fix ISH UART port and VR configuration mismatch
* 1a0b7195f9 mb/google/nissa/var/glassway: Removed the flag of DB_1A for pmc_mux
* 9f0f373ff9 mainboard/amd/crater: Select the option to keep the AMD ACP active in S3
* f04c45acee mb/google/fatcat/var/lapis: enable CS35L56_FAMILY and CS42L43 driver options
* 78e7dcb152 drivers/soundwire/cs42l43: Add optional properties for controlling jack and accessory detect
* f1c973bbff drivers/soundwire/cs42l43: Support Cirrus Logic CS42L43 codec
* 35970abcdf mb/google/nissa/var/dirks: Add H58G56CK8BX146 to RAM ID table
* 402ac7cd81 crossgcc: Upgrade acpica from 20250404 to 20250807
* 3aa312e4c9 soc/mediatek/mt8189: Add DSI path support and update mutex
* 6b93516e02 soc/intel/baytrail/acpi: Add missing MMIO window below 4GB
* 321d8c5b21 soc/intel/braswell/acpi: Add missing MMIO window below 4GB
* 74d7a21382 nb/intel/haswell/acpi: Add missing MMIO window below 4GB
* 07f25bef86 mb/google/ocelot/var/ocelot: fix gpio settings
* 10b0697dc3 soc/intel/pantherlake: Update power limits and voltage regulator parameters
* 163e6a502c mb/starlabs/common: Deduplicate Pin Mix
* 7622a57771 mb/starlabs/common: Move the SMBIOS code to common directory
* e7dd184e5f Makefile.mk: Add support for mainboard vendor common code
* dd3d7dcdfa mb/purism/librem_skl: Add CFR option menu support
* 0d50fdf035 mb/purism/librem_l1um_v2: Add CFR option menu support
* e9a01dea32 mb/purism/librem_jsl: Add CFR option menu support
* 08efea5141 mb/purism/librem_cnl: Add CFR option menu support
* 1d02f139d3 mb/google/fatcat: Add wake configuration to cnvi_bluetooth
* cf97e1bc25 mb/intel/ptlrvp: Add power meter acpi changes
* 7e3883633a mb/google/brox/var/jubilant: Apply fw_config to enable/disable I2C1
* 114d24cd7a lib: Generalize BMP_LOGO help text
* e468e32dfb mb/google/*: Update Kconfig.name with actual device names
* 85d7a1c85f drivers/ipmi: add Block Transfer (BT) interface
* fe26234cf2 mb/google/trulo/var/uldrenite: Update DPTF parameters
* 660f71e704 mb/google/trulo/var/uldrenite: Set GPP_E16 to NC for non-WWAN SKU
* 3747b47df1 mb/lenovo/sklkbl_thinkpad: Add Lenovo Thinkpad T580 as a variant
* d23eaa356f util/lint: maintainers-syntax: Add a check to ensure paths exist
* 079c9c47aa soc/amd/cezanne: Add config option to keep ACP running in ACPI S3 state
* f665e189da mb/starlabs/{starbook/mtl,byte_adl}: Select USB4_PCIE_RESOURCES
* a7a49e5f74 mb/starlabs/starfighter: Correct reference for second TBT port
* f22bcc1d42 mb/starlabs/starbook/rpl: Disconnect unused GPIOs
* a8c70f7578 mb/starlabs/starbook/rpl: Reconfigure TBT GPIOs
* 83aa4417cb mb/starlabs/starbook/rpl: Tidy up GPIO config straps
* 7ad632cbc7 mb/starlabs/starbook/adl: Disconnect unused GPIOs
* d7627a39e8 mb/starlabs/starbook/adl: Tidy up GPIO config straps
* 711d49d4ec mb/starlabs/starbook/adl: Configure additional SSD GPIOs
* 90d87c5941 mb/starlabs/starbook/*: Remove comments for unused GPIOs
* f6b5e26fe7 soc/mediatek/mt8196: Add 24MB framebuffer region
* 815f3f7df2 mb/google/rauru: Increase RW firmware sections size to 1756KB
* 193420fe0b soc/mediatek/common: Add bootsplash support
* bdd4561536 soc/mediatek/mt8196: Add mtk_ddp_ovlsys_start for rendering framebuffer
* 0ff213d711 soc/mediatek/common: Conditionally set up framebuffer
* 5271ac7ac5 soc/qualcomm/x1p42100: Reserve DDR carveout region
* 19feafc018 drivers/intel/fsp2_0/ppi/mp_service_ppi: Support CPU_V2_EXTENDED_TOPOLOGY
* 16feb1bb28 mb/google/brya/var/nissa: Add missing device type to gfx device
* f4ecb69314 util/inteltool: Add Twin Lake UHD Graphics PCI IDs
* ed736a47d8 mb/starlabs/byte_adl: Configure additional SSD GPIOs
* 38525716d8 mb/starlabs/starbook/adl: Re-order the config strap GPIOs
* 2c465c0e21 mb/starlabs/starbook/adl: Re-order GPIOs to match other boards
* 115a6ce36a mb/starlabs/starbook/adl: Correct clock request number in comment
* 1b5aaaefd9 soc/intel/meteorlake: Fix IGD IRQ
* 06de11693f mb/starlabs/starfighter: Fix Thunderbolt disabling code
* 5e36d9ba04 mb/starlabs/starbook/mtl: Update the VBT from 256 to 261
* fba8c14c27 mb/google/brya: add cnvi BT recovery mechanism
* 1fb4a7409b soc/intel/pantherlake: Add VR power state current thresholds
* 59ede353c5 soc/intel/pantherlake: Add Thermal Design Current (TDC) configuration
* c54658d200 soc/intel/pantherlake: Add ICC Max configuration support
* 0d1545ffac soc/intel/pantherlake: Add hysteresis window UPDs support
* 8f24546fc4 vc/intel/fsp/fsp2_0/wildcatlake: Expose Thermal current thresholds and mode
* 04affc3354 mb/google/ocelot: Update gpio's for ALC721 sndw
* 3ac1a2b124 MAINTAINERS: Drop non-existant TPM files from VBOOT
* af8b15ae04 Revert "libpayload: Define UCHAR_MAX/CHAR_MIN/CHAR_MAX"
* 5e64ae2554 mb/starlabs/starbook/mtl: Enable PCH Energy
* 375847acfe soc/intel/meteorlake: Configure PmcPchLpmS0ixSubStateEnableMask
* db0faffdb8 mb/starlabs/*: Add comment about not configuring eSPI GPIOs
* 990ad929a0 mb/starlabs/starbook/tgl: Don't configure eSPI GPIOs
* 7ebcd6763f soc/qualcomm/x1p42100: Handle Type-C polarity for USB4/DP PHY init
* f1708cf21a drivers/intel/touch: Enhance Intel touch driver for new devices
* 55bf4ea07e cpu/x86/topology: Add tile and die ID CPU topology fields
* 0c97aed8ac mb/google/fatcat/var/lapis: Modify touchpad and touchpanel configuration
* 9e4a0a6026 mb/starlabs/starbook/mtl: Don't configure eSPI GPIOs
* 3e0457e087 security/vboot/Makefile.mk: Fix building vboot lib with OpenSIL
* 60ef877d93 mb/google/skywalker: Modify the RST pin naming
* d5a8cec748 soc/intel/meteorlake: Rely on FSP_DIMM_INFO
* e168a516e4 soc/intel/pantherlake: Rely on FSP_DIMM_INFO
* 23419df34c drivers/intel/fsp2_0: Implement API to retrieve DIMM info
* 1f328351e6 mb/starlabs/*: Select SPD_READ_BY_WORD
* 88439b4cd3 mb/starlabs/starbook/mtl: Set the VPU default to disabled
* 8ffa58723a soc/qualcomm/x1p42100: Add USB Type-C support
* 45cedbb992 soc/qualcomm/x1p42100: Add HS/SS PHY support for USB Type-C ports
* b18dfde22a soc/qualcomm/x1p42100: Add Clock support for USB Type-C ports
* c7e4ef822d mb/starlabs/{starbook,starfighter}: Remove DRIVER_TPM_SPI_CHIP
* 0c73e45493 ec/starlabs/merlin: Add disabled option for lid switch
* ac7bb7694d mb/starlabs/starbook/mtl: Configure eSPI GPIO Mux
* b37821ac25 mb/starlabs/*: Unify settings across device VBTs
* ac8765c88a mb/starlabs/*: Correct USB Type-C Port Configuration
* f7512c8647 mb/starlabs/starbook/{adl,rpl}: Remove USB OverCurrent Configuration
* bf67771656 mb/google/fatcat/var/lapis: Update gpio GPP_E07 configuration
* ff5daa0581 MAINTAINERS: Remove '/' from the beginning of paths
* 6bfa257eef MAINTAINERS: Correct the path of cbmem_id.h
* d7ae81132b MAINTAINERS: Correct asus/p8z77-series to asus/p8x7x-series
* ef8eb79636 MAINTAINERS: Rename util/ipqheader to util/qualcomm
* 0965bb9f68 MAINTAINERS: Remove non-existant mainboards
* f5d1505c6b mb/google/fatcat/var/moonstone: Add Elan touchpad support
* 24bfeb154e mb/google/fatcat/var/moonstone: Add focaltech touchscreen support
* 1580346fa7 mb/google/fatcat/var/moonstone: correct the Kconfig settting
* 150647a2fb ec/google/chromeec: Fix ACPI _CRS method generation for LPC memory range
* ffa262db59 Documentation/FIT: reference archived copy of Intel TXT lab handout
* f47e6c3905 MAINTAINERS: Fix typo "copperlake_sp" to "cooperlake_sp"
* 1af0497c12 mb/google/dedede: Fix MAINBOARD_FAMILY conditional
* b4b6c3aa55 mb/google/brya/var/{marasov,mithrax,omnigul}: Add SOF chip driver entries
* 738fd2efc9 util/chromeos/extract_blobs: Add support for command line params
* e59c5abd13 ec/google/chromeec: Add EC_GOOGLE_CHROMEEC_FW_CONFIG_FROM_UFSC
* 341b108a71 mb/starlabs/starfighter: Add missing GPP_A5 definition
* 414f1a61dd vc/intel/fsp/fsp2_0/pantherlake: Expose Thermal current thresholds and mode
* 2e92833172 soc/qualcomm/common/usb/qmpv4_usb_phy: Fix delay value in comment to 10 ms
* b48532c694 soc/mediatek: Refactor MMU configuration for DMA region
* 28a8eaa57b soc/mediatek/mt8192: Clean up memlayout.ld
* bca876849a soc/mediatek/common: Add enable parameter for configure_backlight
* 46ce812c1b mb/google/skywalker: Create variant Grogu
* 98a5445328 MAINTAINERS: Correct paths for Dell Latitude mainboards
* 984ee53de8 mb/asus/p8x7x-series: Introduce CFR setup menu
* 830ec89bca mb/google/bluey: Update mainboard part number for QuenbiH
* c2fcf69e41 arch/x86: Use boolean for flag_is_changeable_p()
* 2a791fcd66 mb/imb-1222/hda: Use AZALIA_PIN_CFG_NC() for disabled SPDIF_OUT2 pin
* 217a7962d0 ec/google/chromeec: Update EC headers
* 59cbb073c2 util/chromeos/crosfirmware.sh: Fix download of ninja (baytrail) recovery
* fba92daed3 soc/qualcomm/x1p42100: Clean up DDR and IMEM memory layout
* 5609174786 mb/google/rauru: Create variant Sapphire
* 386feb720e soc/mediatek/mt8196: Add DVFS support for the second SoC SKU
* 4b93b36170 mb/purism: add missing terminators to azalia codec tables
* a927d124be mb/asus: Replace verb tables with reworked implementation
* 9c0c925fe6 mb/siemens/mc_rpl1: Send POST codes to NC FPGA via PCI
* 10361583b3 mb/siemens/mc_rpl: Add code to wait for legacy devices before PCI scan
* d9979ba6a3 mb/siemens/mc_rpl: Sort includes alphabetically
* d9b609b139 nb/intel/haswell: Use boolean for cbmem_was_initted
* 1f2408f573 console: Fix flushing for slow consoles
* 6a016a784b Documentation: Finalize 25.09 release notes
* a0c5669c1b mb/asrock/imb-1222: Use macros for HDA verb table
* c94ca87d40 mb/google/fatcat/var/kinmen: Enable Intel DPTF support
* fe5f8494f6 docs/releases: Remove outdated "Upcoming release" in titles
* aef86a7e89 mb/google/ocelot/var/ocelot: disable HDA GPIOs by default
* 21f6ccf3a4 soc/intel/pantherlake: Use CPU ID mask for all stepping
* 8bc41fc937 mb/google/trulo/var/pujjocento: Update DTT settings for thermal control
* d5f1ecedf7 {device/azalia_codec,mainboard}: Use node ID enums for Realtek ALC887
* 02059c2250 mb/google/trulo/var/pujjoquince: Disable ISH gpio setting by fw_config
* 58459b8210 mb/var/uldrenite,orisa: Include the variant GPIO header
* 88ad238eca mb/google/skywalker: Fix incorrect GPIO_USB3_HUB_RST_L pull-down
* b8a8800152 mb/google/fatcat/var/lapis: Configure gpio of fingerprint sensor
* 4431848ee6 acpi: Move most of HEST ACPI table to common code
* ce1ced7f6a mb/intel/ptlrvp: Fix WIFI driver device settings under root port 4
* 691a23a272 mb/google/fatcat: Fix WIFI driver device settings under root port 4
* 16bf80b9b1 tests/imd: Fix invalid NULL comparison on uintptr_t
* 6d816b3b43 mb/asus/h610i-plus-d4: Add missing AZALIA_USE_LEGACY_VERB_TABLE
* 6f042c6ae4 lib: coreboot_tables: Fix grammar of *These information* in comment
* bcc7fce590 mb/topton/adl: Add TWL variant (X2E_N150)
* f634121fa4 mb/purism: Replace verb tables with reworked implementation
* 20d4042458 mb/asrock: Replace verb tables with reworked implementation
* 2b7dbf80c9 mb/apple: Replace verb tables with reworked implementation
* 970249694f mb/amd: Replace verb tables with reworked implementation
* 94beaa7ab3 mb/acer: Replace verb tables with reworked implementation
* f3db3a19d5 mb/51nb: Replace verb tables with reworked implementation
* bc92d9a666 nb/intel/haswell/minihd.c: Add reworked verb table implementation
* 69781b9806 soc/intel/broadwell/minihd.c: Add reworked verb table implementation
* 31fc5b06a6 device: Introduce reworked azalia verb table
* 50a59d4464 device: Add Kconfig to prepare for reworked verb table implementation
* a3e2073591 lib/vga_gfx: Add API to render text on a bitmap buffer
* ec2875e38f mb/google/ocelot/var/ojal: Enable FPS and update FW config
* beb0951c1c mb/google/ocelot/var/ojal: Update touchpad config
* bd933b641e mb/google/ocelot/var/ojal: Add overridetree
* 82a9e601bd mb/google/ocelot/var/ojal: Add initial GPIOs config
* 622c504a71 mb/emulation/qemu-riscv: Select DRIVERS_EMULATION_QEMU_FW_CFG
* ba3f529681 drivers/emulation/qemu: Adjust fw_cfg driver for Arm and RISCV
* c1e0384367 arch/riscv/include: Cast 'id' to int in OTHER_HLS()
* 67a3fb6abe mb/asus: Add PRIME H610i-PLUS D4 (Alderlake/LGA1700)
* 4f13f72dbc libpayload: Define UCHAR_MAX/CHAR_MIN/CHAR_MAX
* 7f8c442a09 soc/intel/meteorlake: Correct function naming
* 6d265ca31d device/pci_device: Fix typo in comments
* d4b6b55977 payloads/Kconfig: default to Skiboot payload on PPC64
* cb899b0c4d mb/google/brox/var/caboc: Update HDA verb table
* 15b903e1fd soc/intel/pantherlake: Add DDR5 memory type debug message
* a5252bd5b9 drivers/soundwire/cs35l56: Support Cirrus Logic CS35L56 Smart Amplifier Family
* 7d44128b2f mb/asus/p8z77-m_pro: Enable serial port A instead
* 894c8069fc superio/nuvoton: Add NCT5535D
* 69b0541375 sio/nuvoton/nct6779d: Add power loss resume support
* f61ffb68c9 soc/intel/pantherlake: Remove unused TxDqDqs retraining parameter
* 3a84c93b5b soc/intel/pantherlake: Correct function naming and code style
* 3b34079b19 mb/google/trulo/var/kaladin: Enable External bypass config2 settings
* 61488ffd57 mb/google/skywalker: Add CS35L51 support for beep sound for Padme
* 4a7d779ed0 soc/mediatek/mt8196: Set RTC EOSC calibration to 8 seconds
* 07df08836e Docs/releases: Update release notes for 25.09 release
* 8f52c0774e docs/security/vboot: Update supported board list
* 1f08b36f84 Documentation: Add coreboot release 25.12 template
* 02980f0ea6 soc/amd/common/block/psp: Add comments
* a17a41559a soc/amd/common/block/psp: Add BIOS SPI flash semaphore
* 038262155e soc/amd/common/block/psp/psp_smi_flash: Fix flash busy check
* 67e3579d61 sb/intel/lynxpoint: Enable PCIe Relaxed Order
* 865649edc0 util/docker/jenkins-node: Use the correct branch for encapsulate
* 6af7d299b2 mb/google/skywalker: Add MIPI panel support with TM_TL121BVMS07_00C
* 4fc5f7a843 mb/google/fatcat/var/lapis: Modify the gpio order of mem_id
* 2764a508ad mb/google/fatcat/var/lapis: Add 4 DDR modules to RAM id table
* 886bd1d186 spd/lp5: Add Samsung K3KLALA0EM-MGCU memory part
* 0a6f3e3868 mb/google/brox/var/caboc: Add PDC FW hash to hint romstage init
* cbd1529126 mb/google/brox: Update Auxiliary Firmware Version check
* 0d4c0ee7fc ec/google/chromeec: Add API for AP shutdown command
* bbd72abae5 ec/google/chromeec: Update EC headers
* 21ca3c5f3d mb/intel/ptlrvp: Update CKD/QCK mapping parameters
* 3d7b898ff4 mb/google/ocelot/var/ocelot: Disable ALC721 clock stop support
* c822148f2b mb/google/fatcat/var/lapis: Modify dq/dqs setting
* 78fb910fe2 mb/google/fatcat/var/lapis: Update the configuration of fw_config
* eb3497fae4 mb/google/fatcat/var/lapis: Update tpm i2c configuration
* 3a33217349 mb/google/fatcat/var/lapis: Update thermal strategy
* 36d2dc7cb9 mb/google/ocelot: Update wake event mapping for gspi0
* 59bd0e3206 mb/google/ocelot/var/ocelot: Update USB and TCSS port configuration
* c4627e0dda mb/google/ocelot: Remove FP_PRESENT probe from ISH device configuration
* 8e9ec16f45 mb/google/trulo/var/pujjolo: Add tablet mode fw config for ish fw
* e3a2d1cecf soc/qualcomm/qclib: Improve logging on invalid MRC cache data
* 289c01e6fb mb/google/ocelot: implement variant_memory_sku()
* fbb68982c9 mainboard/google/ocelot: Update PCIe root port for SD card interface
* c98155cbcd soc/intel/pantherlake: Generate TME keys only if TME is enabled
* d8ed977358 mb/google/skywalker: Remove space before tabs in gpio.h
* 1e7908fa9f mb/google/skywalker: Set up all output GPIOs
* 14e6c62c10 mb/google/skywalker: Define all GPIO pins
* 2859a5cba5 mb/{google,intel}/{fatcat,ptlrvp}: Prevent access to disconnected camera
* ffae0f7d73 security/vboot: Extend CROS_EC_HASH_TIMEOUT_MS
* d2345e0c60 mb/google/fatcat: Set `SkipExtGfxScan` FSP-M UPD
* 8953c772cf lib: Fix bad whitespace in add_bmp_logo_file_to_cbfs_call
* ef0c650edf soc/intel/cmn/blk/fast_spi: Cancel DMA transfer before locking
* b3ad2aa3e7 mb/google/ocelot: GPIO config for headphone jack detection
* 508c399bc1 mb/goog/ocelot/var/ocelot: add H58G66CK8BX147 memory option
* d8a3f2aedd mb/goog/ocelot/var/ocelot: add H58GE6AK8BX104 memory option
* f4110cebf6 spd/lp5: Add SPD for H58GE6AK8BX104
* 7acc99c3d2 acpi/acpi_pm: Fix compilation without SMBIOS
* c77d3d67cf mb/google/skywalker: Report panel ID and SKU ID for padme
* 6185983028 soc/intel/pantherlake: Standardize macros for core count and SKUs
* 9a8402adf9 mb/google/trulo/var/kaladin: Update HDA verb table
* 9af9e1d1f4 mb/google/trulo/var/kaladin: Add eMMC DLL settings
* 3b4c446fbb mb/google/bluey: Configure QUP0 SE1 as I2C
* ddf5987c1e drivers/mipi: Add support for TM_TL121BVMS07_00C panel
* 0fec287327 mb/google/nissa/var/dirks: Drive GPIO GPP_D2 high to fix noise issue
* 5a9ca2b040 mb/starlabs/starbook/mtl: Set SPD size to 512
* 79119456a2 soc/amd/common/block/iommu: Add missing newline to debug print
* 81bb2663b7 soc/qualcomm/x1p42100: Select HAVE_CBFS_FILE_OPTION_BACKEND
* bf83dd9927 soc/qualcomm/common/qclib: Introduce runtime debug log level control
* cf3af46e50 mb/google/skywalker: Create variant Padme
* 2b1809e026 mb/google/fatcat: Increase Fast VMode I_TRIP threshold to 63A
* 2a7a0e86cd mb/google/fatcat: Configure Acoustic noise mitigation
* 6c06602c75 mb/google/brya/var/uldrenite: Add fw_config probe for touchpad
* a3b73464b5 soc/qualcomm/x1p42100/usb: Fix code comments and debug messages
* e924021e69 mb/google/trulo/var/kaladin: Add GTH1563 and GTH7503
* d1967d927a spd/lp5: Add SPD for MT62F1G32D2DS-031 WT:C and MT62F2G32D4DS-031 WT:C
* 2e10ddb1ee mb/starlabs/starbook/mtl: Make TCSS notify the IGD of changes
* 47fb46e0e4 vc/intel/fsp/mtl: Update the headers to 5124_47 (13.0.228.64)
* bb760bc9f3 Kconfig: Introduce HAVE_CBFS_FILE_OPTION_BACKEND
* f1b83c8759 mb/google/rex/var/kanix: Add K3KL8L80EM-MGCU to RAM ID table
* bcb3263078 mb/goog/ocelot/var/ocelot: add H58G66BK8BX067 memory option
* 751afeb060 mb/google/brox/var/caboc: Update HDA verb table
* 56700713de mb/google/trulo/var/kaladin: Disable eMMC GPIOs via firmware config
* 93c147c5e6 commonlib/device_tree: Add dt_add_iommu_addr_prop function
* d3d2f0f1c8 mb/google/fatcat/var/moonstone: Add to support ALC1320 Smart Amp
* 1da045f6a5 mb/google/skywalker: Add API support for regulator VCN18
* fe70426dd7 soc/mediatek/common: Add support for regulator VCN18
* f4a123f055 tests: Allow specifying using system Cmocka or building from source
* e7d598ba2c Reland "tests: Allow specifying vboot source directory"
* a348ef46db mb/google/trulo/var/pujjolo: Change setting for lite ISH fw
* 16db59ccef mb/google/rex/var/karis: Add K3KL8L80EM-MGCU to RAM ID table
* 3639648f81 mb/google/fatcat/var/felino: Set GPP_A15 and GPP_B23 as not used
* 8585591596 mb/google/fatcat/var/lapis: Set GPP_A15 as not used
* b9af91dfe1 mb/starlabs/starlite_adl: Drop HDMI entries from verb table
* 461c6a7d31 mb/starlabs/starfighter/rpl: Drop HDMI entries from verb table
* fc3a647579 mb/starlabs/starbook/rpl: Drop HDMI entries from verb table
* a88d9e1033 mb/starlabs/starbook/mtl: Drop HDMI entries from verb table
* 90f94287fd mb/starlabs/starbook/adl_n: Drop HDMI entries from verb table
* 684530ebdc mb/starlabs/starbook/adl: Drop HDMI entries from verb table
* 258da6b1ef mb/goog/ocelot/var/ocelot: add H58G66BK7BX067 memory option
* 883103c77f mb/google/ocelot: Disable memory training progress bar
* f3a49c8b3d mb/google/ocelot/var/ocelot: Disable audio for invalid Audio FW_CONFIG
* be3148575e mainboard/google/ocelot: Set OEM footer logo bottom margin
* 092fca3210 mb/google/fatcat/var/kinmen: Add support ALC1320 Smart Amp
* 4ba1b615db mb/starlabs/starlite_adl: Use macros for HDA verb table
* ca8d6a7512 mb/starlabs/starfighter/rpl: Use macros for HDA verb table
* c30163dace mb/starlabs/starbook/tgl: Use macros for HDA verb table
* 15111ebb21 mb/starlabs/starbook/rpl: Use macros for HDA verb table
* 6d6a280ab2 mb/starlabs/starbook/mtl: Use macros for HDA verb table
* 543f6c2a52 mb/starlabs/starbook/kbl: Use macros for HDA verb table
* 6d7c8f5477 mb/starlabs/starbook/cml: Use macros for HDA verb table
* 515f566840 mb/starlabs/starbook/adl_n: Use macros for HDA verb table
* 4b61d4de5f mb/starlabs/starbook/adl: Use macros for HDA verb table
* 8bc0eddf15 soc/intel/pantherlake: Add support for a new Panther Lake B0 SKU
* 2b84d26f55 payloads/edk2: configure capsule updates
* f3211e9639 soc/intel/pantherlake: Add support for Acoustic Noise Mitigation UPDs
* 2c03fd06a9 mb/google/trulo/var/kaladin: Disable ISH via firmware config
* f8574f7145 soc/intel/ptl: Add Wildcat Lake SKU power map
* b1fe32dd9e mb/{intel,google}/{fatcat,ptlrvp}: Update GPP_A15 GPIO configuration
* 6074ca18d3 mb/google/ocelot: Create matsu variant
* 76e0f64035 mb/google/brya: Update GPIO_PCH_WP for trulo variants
* b69e66721d mb/google/brya: Update GPIO_PCH_WP configuration in trulo baseboard
* 17c623277b mb/google/trulo/var/pujjolo: Change stylus settings
* 7f74155aa4 mb/google/trulo/var/uldrenite: Select USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AND_NON_UFS
* f373faa9c8 mb/google/trulo/var/uldrenite: Add fw_config probe for storage
* a262cdbc27 mb/intel/ptlrvp: Add wake configuration to cnvi_bluetooth
* 1c0186f280 soc/intel/common/block/cnvi: Add CNVi chip configuration support
* bdbe8b9b6f util/kconfig: Fix xconfig
* 241b940ac7 mb/google/nissa/var/rull: add RAM ID H58G56CK8BX146
* 599d660c4b mb/google/fatcat: Enable support for Realtek EC
* 89a3ae3d80 mb/google/trulo/var/pujjolo: Update GPP_D15 setting
* b849c9daa1 3rdparty/qc_blobs: Update submodule to upstream main
* 8159b2e06c device/azalia_codec: Add header with enums for Realtek node IDs
* 18ae0c48e1 mb/google/fatcat/var/moonstone: Support new schematic changes
* c1f76dd87e mb/google/brya/var/dochi: Add H58G56CK8BX146 to RAM ID table
* 164b4a1d90 mb/google/nissa/var/craask: Add parade touchscreen support
* 492826771e mb/google/bluey: Enable USB support
* 96eb6a3ac1 soc/qualcomm/x1p42100: Add USB Type-A Host support
* 2908a955e5 mb/google/rex/var/kanix: Add H58G56CK8BX146 to RAM ID table
* 7fc414c886 mb/google/trulo/var/kaladin: Enable EC keyboard backlight
* 859cc31e3a mb/google/brox/jubilant: Generate RAM IDs
* a6c15129a7 mb/google/fatcat/var/moonstone: Generate SPD ID for memory module
* 1028f3e846 soc/intel/pantherlake: Add Bluetooth to PME wake source mapping
* 3f926bc110 commonlib/bsd: Add Bluetooth wake source in ELOG event data
* 84ec1493a3 drivers/wifi/generic: Fix typo in header guard comment
* 2e2490256f soc/qualcomm/x1p42100: Add USB clock support for X1P42100
* 159afbc5d5 lib/lzmadecode: Increase decoding speed by 30%
* 0b8ad35ac1 mb/starlabs/byte_adl: Adjust the VBT
* d3cea61907 mb/starlabs/starlite_adl: Adjust the VBT
* 3507992d1d mb/starlabs/starbook/adl_n: Adjust the VBT
* 05cd5a7ab9 mb/google/nissa/var/telith: Generate RAM IDs for telith
* a0bdf3961c soc/qualcomm/common: Add clock reset function support
* cf11722e68 soc/mediatek/mt8189: Enable tracker debug hardware
* 382a7caff3 soc/mediatek/mt8196: Refactor tracker driver to support new platform
* 97f9ebb5c2 mb/google/ocelot: Create ojal variant
* ef1d48ee1d util/lint: Don't check for Kconfig.name in common directory
* 5cb36eb16c util/lint: Don't check for board_info.txt in common directory
* 46b03e682c util/amdfwtool: Handle address mode properly for Turin
* 97cf4a1919 util/amdfwtool/amdfwread: fix offset decision for PSP/BIOS directory lookup
* 73dd7bb046 util/amdfwtool/amdfwread: add initial parsing for EFW structure
* d4da533473 smbios.h: Update smbios_memory_type
* 183589dcbd smbios.h: Update smbios_memory_form_factor
* 58726e58e4 mb/starlabs/starbook/mtl: Adjust the VBT to fix hot plug
* 80df8c336f mb/intel/ptlrvp: Update Kconfig for ptlrvp_chromeec4s and ptlrvp4es support
* ed59c1de34 soc/qualcomm/x1p42100: Update TF-A memory reservation
* 56dbafcff4 soc/intel/pantherlake: Remove UFS support
* 5b46caef93 mainboard/intel/ptlrvp: Remove UFS support
* 621633af9b mainboard/google/fatcat: Remove UFS support
* 5e2f5050ba mb/starlabs/starbook/kbl: Update HDA verb table
* 4626c053dd mb/starlabs/starbook/adl_n: Update HDA verb table
* 6f11c31354 mb/starlabs/starbook/mtl: Update HDA verb table
* b748a5e10b mb/starlabs/{starbook,starfighter}/rpl: Disable GPIO override
* 29ca9c8bfa mb/google/bluey: Disable charging during normal boot
* e82338b0a2 mb/google/bluey: Add boot mode to coreboot tables
* 893a2b008a libpayload: Add coreboot boot mode table
* a45c8441af lib: Add boot mode information to coreboot tables
* c73f30e74b mb/google/nissa/var/riven: Add H58G56CK8BX146 to RAM ID table
* 8c717df03a soc/intel/ptl: Update Wildcat Lake PCIe root port numbering
* afaef0b904 mainboard/google/ocelot: Update GPIO configuration for SLP_S0_GATE
* 97dbfd3098 cpu/intel/car/non-evict: Improve CAR setup
* cd48dc7d69 mb/google/rex/var/karis: Add H58G66CK8BX147 to RAM ID table
* ffbf40f6c0 ec/google/chromeec: Update EC headers
* 517185eca2 mb/google/bluey: Configure touchpad power GPIO
* baf159a1c8 mb/google/bluey: Configure GSC and EC for Quartz
* f8685bb2ee soc/mediatek/mt8189: Enable lastbus debug hardware
* 6e61ea65a8 mb/google/bluey: Add disable slow charging support
* 45d1f9cce4 mb/google/bluey: Move charging functions to dedicated file
* 9fb306f53c soc/qualcomm/x1p42100: Add SPMI driver to ramstage
* ac5bb861d8 mb/google/brya/var/uldrenite: Update HDA verb table
* f2d3051631 ec/lenovo/h8: Turn on PWR LED
* d8de1c4974 ec/lenovo/h8: Disable POST codes
* d5a92542aa mb/google/fatcat/var/fatcat: Disable ALC721 & ALC722 clock stop support
* 3b2962929b lib/timestamp: Init TSC frequency early on x86
* b0a63052b7 sb/intel/bd82x6x: Fix CPU replaced check
* 9ecf04c2bc mb/google/nissa/var/quandiso: Generate RAM ID for MT62F512M32D1DS-023 WT:E
* 16318a32ce spd/lp5x: Generate initial SPD for MT62F512M32D1DS-023 WT:E
* 283c25beec mb/google/trulo/var/kaladin: Select Strauss keyboard to show G icon
* 2709ae443b cpu/x86/entry16.S: Move reset vector to this file
* 53810448fc cpu/x86/reset16.S: Remove handcoded reset vector
* a1b7f5e1b8 mb/siemens/mc_rpl: Disable EIST to improve deterministic behavior
* e6f8900c2d mb/siemens/mc_rpl: Disable S0ix power states
* c71071397f soc/intel/common/fast_spi: Add static bus scanning
* e73b4579c6 mb/siemens/mc_rpl: Disable DPTF
* 77061d8427 mb/google/bluey: Add Quartz board (Qualcomm Hamoa)
* ee1446a791 mainboard/emulation/qemu-q35: Do not compile memmap into SMM
* a7b6590aca  mb/google/dedede/var/dexi: Add and use VBT
* 70ce81c86f mb/google/dedede/var/dita: Add and use VBT
* 87f5d4c54a tree: use boolean for PcieRpLtrEnable[]
* 725ab7b066 soc/mediatek/common: Increase WAIT_AUX_READY_TIME_MS
* f02e755364 config/builder/mitac: Hook up public FSP repo and microcode
* fc62ffab48 soc/amd/common/fsp/dmi: Skip parsing when memory type UNKNOWN
* c3071b7150 soc/amd/cezanne/fsp_m_params: add UPD pointer parameter to mb callback
* eb9a673a8e soc/amd/cezanne: Add a Kconfig option for SERIRQ_CONTINUOUS_MODE
* c590e8e75c mb/brya/var/uldrenite: Increase Touch IC enable delay time
* 9996fc58fd mb/siemens/mc_rpl: Disable C1E state via MSR_POWER_CTL
* c58c988b8e mb/siemens/mc_rpl: Remove unused code and power limit functionality
* 8e5e87a1cf mb/siemens/mc_rpl1: Configure CPU power limits to 28W TDP
* 4853f16a59 mb/google/fatcat/var/kinmen: Support new schematic changes
* 9d67120078 mb/google/moonstone: Create moonstone variant
* 00d954977c util/smmstoretool: Support other block sizes
* 4fd3cb35c2 util/cbmem: Change abort() to exit(1) in die()
* 62b6d1e336 mb/siemens/mc_rpl: Enable master bit in PCI config space if allowed
* a8bce33b82 mb/siemens/mc_rpl: Disable Intel Turbo Boost
* 1a9008b261 device/azalia: Use clrsetbits32() and friends
* cbf8527345 device/azalia: Amend the mistake of codec_is_operative()
* 0a328282ec device/azalia: Add enums for HDA verb and parameter IDs
* c15006eb0c soc/intel/alderlake: Add 28W TDP support for RPL-P ID 8 (0xa716)
* d7a996cf44 mb/siemens/mc_rpl1: Enable 4 P-Cores, disable E-Cores
* 2f9273f1f4 mb/siemens/mc_rpl: Select FSP_TYPE_IOT
* 1b14664311 mb/siemens/mc_rpl: Remove unused DPTF settings
* 66a3f2a1b1 mb/siemens/mc_rpl: Disable SaGv
* 993a9c9e14 mb/siemens/mc_rpl1: Configure SATA Ports
* e03f50bf5f mb/siemens/mc_rpl: Enable Siemens NC_FPGA driver
* 699c28c01d sb/intel/bd82x6x: Fix replay issues
* c2110e3161 tree: Use true, false for PcieRpClkReqSupport
* ebab858d92 soc/intel/pantherlake: Enable memory bandwidth compression for IGD
* ad10d4a977 soc/intel/cmn/blk/graphics: Reserve memory compression region
* 8a52418e9a commonlib/device_tree: Fix memory leak in fdt_unflatten()
* 7896f4950c mb/google/skywalker: Turn off UFS power for eMMC SKUs
* 22fe08c04b soc/mediatek/mt8189: Implement UFS power-off API for non-UFS SKUs
* 5f0225a7b5 drivers/intel/fsp2_0: Refactor for earlier graphics memory WC MTRR
* 1c571446ec soc/intel/common/block/systemagent: Increase MTRR region size to 32 MiB
* 67afbf5f96 soc/intel/pantherlake: Add TDP mappings for Panther Lake-U SKUs
* ec69479bdb mb/google/ocelot: Drop redundant SNDW GPIO mapping
* 5f168e9441 mb/google/ocelot/var/ocelot: Conditionally init ALC256 HDA using fw_config
* 152b584167 mb/goog/ocelot/var/ocelot: Add AUDIO_MAX98360_ALC5682I_I2S
* 8f2633cd60 soc/power9/rom_media.c: find CBFS in PNOR
* 44ec090551 ppc64: Kconfig switch for bootblock in SEEPROM, zero HRMOR
* 921027e09b src/lib/cbmem_common: Delete a space(' ') in the source code
* acb86babdf mb/protectli/vault_kbl/mainboard.c: bring back the beep
* 76d45a8219 soc/amd/genoa_poc/root_complex.c: Explain the order of IOHCs
* 8dcfa915f2 soc/amd/common/block/psp: Probe SPI flash early
* 00217275b2 soc/amd/common/block: Don't clobber SPI registers
* c13eadeadb soc/amd/common/block/psp/psp_smi_flash: Fix busy check
* fbcf031181 mb/qemu-riscv: set PCI_IOBASE
* bf0ee592f5 soc/intel/alderlake: Make SATA speed limit configurable
* 482a2d6548 nb/intel/sandybridge/northbridge.c: Disable non-active PEG devices
* 7e73d4ef30 Documentation: mb/erying/tgl: Update documentation
* 73cba1fdea mb/erying/tgl: Introduce CFR
* 23cf7c64f9 mb/erying/tgl: Use booleans in devicetree
* 261b6b4fd1 soc/intel/skylake: Allow generating USB ACPI code
* 23e92a5ac0 mb/erying/tgl: Map remaining USB ports
* 762a535551 mb/erying/tgl: Clean up the GPIO table
* 179b8444c3 soc/intel/xeon-sp/gnr: Hook up public FSP bin and headers
* 42ba7a9e48 soc/intel/xeon_sp/gnr: Add Kconfig symbols for SKUs GNR-AP and GNR-SP
* c732f406c7 mb/google/ocelot: ec.h: Disable sync IRQ, sync IRQ wake capable for OCELOT4ES
* 73961bf680 mb/google/ocelot: Use same mainboard part number for all ocelot variants
* 691d5e84cd mainboard/google/oceot: Drop redundant logo_valignment selection
* b67d88aecb mb/google/bluey: Enable PMIC based slow charging in romstage
* dcb7c317c2 mb/siemens/mc_rpl1: Enable Intel I210 MACPHY driver
* 2b26ea0eda mb/siemens/mc_rpl1: Configure SPI and implement TPM support
* 2bcd7f1522 mb/siemens/mc_rpl1: Adjust UART settings and enable LPSS UART
* 524fd18bd6 mb/siemens/mc_rpl1: Create variant specific Kconfig file
* c7cd4e3305 mb/siemens/mc_rpl: Move SOC selection to baseboard
* 6427e51c4f mb/siemens/mc_rpl1: Adjust USB port settings in devicetree
* 71c4619045 mb/siemens/mc_rpl: Remove unused devices from devicetree and Kconfig
* 296f5968d3 mb/siemens/mc_rpl1: Adjust I2C bus enablement in devicetree
* a1dd6bfc22 mb/siemens/mc_rpl1: Adjust PCIe settings in devicetree
* f94469c2a9 mb/google/nissa/var/pujjolo/pujjoquince: Add wifi sar table
* 6781f458ee mb/google/trulo/var/pujjolo: Enable fivr settings
* 17a88540fd soc/qualcomm/x1p42100: Use SPMI driver
* c1128ae649 soc/qualcomm/cmn: Add SPMI driver
* 0eebd5596b mb/google/fatcat: Create lapis variant
* 4931b978d9 soc/mediatek: Increase CBFS cache to 8MB in memlayout.ld
* 234eb53ed9 nb/intel/sandybridge/raminit: Speed up reading SPD EEPROMs
* 7d57333529 ec/starlabs/merlin: Add a "off" mode for the power LED
* 36624072a6 mb/google/trulo/var/pujjolo: Update wlan rtd3 settings
* 42a5c189b2 mb/lenovo/X220: Add CFR support
* 8509798006 sb/intel/common/smbus: Use proper delay instruction
* 5f7b5fcb19 mb/starlabs/byte: Lower the PL4 value to 65W
* 4a6a0de029 3rdparty/fsp: Update to upstream master
* de98da43fa 3rdparty/intel-microcode: Update to upstream main
* bdee19ba87 soc/qualcomm/x1p42100: Add ASCII memory map diagram to memlayout.ld
* 51a8e238b0 lib: Correct logo bottom margin handling for all panel orientations
* 9999a4aebb mb/google/nissa/var/pujjocento: Change touchscreen properties
* 8d2df573a8 soc/qualcomm/x1p42100/qclib: Support to pack and load CPR binary in CBFS
* a484a6529c soc/qualcomm/common/qclib: Support to declare cpr_settings region
* dc04ee827b mb/google/fatcat/var/kinmen: Generate SPD ID for memory modules
* e7cdf035fb mb/google/brox/var/caboc: Enable RTD3 for SSD to resolve S0ix issue
* cec34128d0 soc/qualcomm/x1p42100: Support to load CPUCP firmware in x1p42100
* a2b6e20509 soc/mediatek/common: Increase per-channel SPMI max byte count to 2
* 6ba2df9be5 soc/mediatek/common: Use polling to reduce eDP HPD wait time
* ee347d8812 soc/qualcomm/common/qclib: Support to load AOP config and meta in CBFS
* 3f4c84513d soc/qualcomm/x1p42100/qclib: Support to pack AOP config and meta in CBFS
* 5de5b519ca mb/prodrive/atlas/vpd.c: Replace union {0} initializers with {} for C23 compliance
* 48207895af lint: Warn about using change IDs for merged changes
* 6acf07022d Doc/contributing: Add clarification on how to reference other commits
* 40d0ec0fa4 Revert "soc/mediatek/common: Remove 200 ms delay from eDP init path"
* 244a34b3d0 cpu/x86/mp_init: Refactor ICR wait logic
* eee5be070a cpu/intel: Use mtrr_use_temp_range()
* e37a53a2fc arch/x86/memcpy: Fix undefined behaviour
* 7c0f7e0b3f vc/intel/fsp: Update PTL FSP headers to FSP 3272_04
* d315f26217 payload/seabios: Update from 1.16.3 to 1.17.0
* c61a762a47 mb/google/bluey: Add QuenbiH board
* 9edf49b008 mb/google/bluey: Add BlueyH board
* 9868417d5e mb/google/bluey: Refactor Kconfig for Hamoa SoC
* 74d91d0b76 mb/google/nissa/var/glassway: Support Memory MICRON MT62F512M32D2DR-031WT:B
* 7eb832b1dc mb/google/skywalker: Configure GPIO GPIO_AP_EDP_BKLTEN as output
* cdd42ccde8 soc/qualcomm/x1p42100: Use 4K for memory region alignment
* 2146ecc8e1 mb/google/brox/caboc: Enable PEG60 with PEG62
* 6925fd69f8 soc/qualcomm: Move common region macros to `soc/memlayout.h`
* d220b65b8f soc/qualcomm/qcs405: Add common include path
* b25939786d soc/qualcomm/x1p42100: Refactor CBMEM top address to use linker symbols
* d6ec4f108d soc/qualcomm/x1p42100: Mark additional reserved memory ranges
* 1b760645b9 soc/qc/x1p42100: Dynamically configure DRAM resources in ramstage
* 276432faf7 soc/qualcomm/common: Add MMU configuration for fragmented DRAM regions
* b4347f11d9 include: Make DRAM an explicit region
* 11c8d423d1 soc/qc/common: Remove ddr_base from qc_mmu_dram_config_post_dram_init
* 73de3f95ac mb/google/bluey: Support hardware watchdog logging
* 25e0a4642c mb/google/brox/var/caboc: Update LAN LED behavior
* e5ff7cb186 mb/google/ocelot/var/ocelot: Update DDI port Configuration
* 8df079c609 mb/lattepanda/mu: Enable CRB TPM (Intel fTPM)
* 6e9c0a26e3 device/device_util: Fix format specifier for DEVICE_PATH_GICC_V3
* 4a82f37525 mb/google/nissa/var/quandiso: Generate new RAM ID
* 17a7c351b8 mb/google/brya/var/kaladin/hda_verb.c: Correct number of entries to 21
* b65b98ace6 mb/goog/ocelot/var/ocelot: switch to H58G56BK8BX068 memory part
* 8097809c8a libpayload: Fix strsep() edge cases
* e38a216368 soc/intel/pantherlake: Rearm and clear only for valid crashlog in PMC
* 510686add4 soc/intel/pantherlake: Rearm crashlog using watcher
* 609eb4c5f1 mb/google/ocelot/var/ocelot:  Remove unused I2C controllers
* df7bf9404d soc/mediatek/common: Remove 200 ms delay from eDP init path
* a70bf82036 soc/mediatek/common: Measure eDP initialization time
* 6bb1ba95e1 soc/mediatek/common/dp: Move mtk_edp_init to dptx_common.c
* e49e8c6355 soc/qc/x1p42100: Add memory layouts for CPUCP and TZ regions
* c418a3b843 mb/google/brox/var/caboc: Update WWAN gpio
* 77b52ed3cc mb/google/brox/var/caboc: HDA: Correct number of jacks to 35
* e31fbc493d soc/qualcomm/cmn/qclib: Support reuse of existing DDR training data
* bdcf19f404 mb/google/trulo/var/pujjolo: Add fw config for PDC
* 13897bde9a mb/google/trulo/var/pujjolo: Add wlan rtd3 setting
* 90589d44d2 soc/qualcomm/x1p42100: Reserve DDR memory regions for AOP and BL31
* 2e61995b2f soc/qualcomm/x1p42100: Add support for Hamoa SoC
* 281b01ce5e soc/qualcomm/x1p42100: Remove unused PMIC file from CBFS
* ecbca16bf4 tree: Replace union {0} initializers with {} for C23 compliance
* b74d2b77d2 mb/google/trulo/var/kaladin: Add WIFI SAR table
* 4b46a0690e mb/hp: Add HP ProDesk 600 G1 SFF Business PC (Haswell / NPCD379 SIO)
* 2339508b6c mb/google/trulo/var/pujjolo: Update P-sensor parameters
* cd2a969c82 soc/intel/pantherlake: Remove storage-off related code
* fe6fa36504 mb/asrock: Add SPR 1S server board ASRock Rack SPC741D8-2L2T/BCM
* b486c84b23 mb/google/trulo/var/pujjolo: Update DTT settings for thermal control
* ece0072d1c mb/google/trulo/var/pujjolo: Update verb table to fix pop noise
* 795157a606 mb/google/bluey: Increase MRC cache size
* 34d9305dcc soc/qc/x1p42100: Pack QcLib DTB into CBFS
* 8f09629fb1 spi_flash: Fix initialization of `flags` field in lb_spi_flash
* ab2ef8878c mb/google/trulo/var/pujjocento: Update touchscreen information
* 0bedce05d8 mb/google/nissa/var/pujjocento: Change touchpanel sequence to meet spec
* 543fb60ec4 mb/google/brox/var/lotso: Set slew rate to 1/8
* c114906239 mb/google/trulo/var/pujjocento: Update DTT settings for thermal control
* b603f23088 mb/google/bluey: Avoid using function call table
* dc64b9659d soc/qc/cmn: Refactor qclib_load_and_run function
* e290bb6750 mb/baseboard/ptlrvp: Disable memory training progress bar
* 05a38e2af3 mb/google/fatcat: Disable memory training progress bar
* f789899dac sb/intel/common/gpio: Move register defines
* d6ceaf72da mb/samsung/lumpy: Use gpio_base2_value
* 21639c3771 mb/getac/p470: Use common gpio functions
* 8d4bb94663 sb/intel/common/gpio: Add and use gpio_invert()
* 85306062d8 mb/google/skywalker: Create variant Tarkin
* 1da2f46db8 soc/intel/alderlake: Restore mem_init_override_channel_mask()
* f0d5b25e02 mb/google/trulo/var/kaladin: Add firmware name and gpio for ISH
* 0b3fc8ce2d mb/google/nissa/var/pujjoniru: Decrease cpu power limits
* f01cc9258b mb/google/rex/var/screebo: Use ACPI for touchscreen power sequencing
* ef11f95125 soc/qualcomm/x1p42100: Set 1ms TX delay
* 2c8d157ea4 {drivers, soc/qualcomm/common}: Add configurable delay for UART bitbang
* b0d2d522ea soc/qualcomm/x1p42100: Enable bootblock compression
* 1e11bda5d0 soc/intel/cmn/smbus: Drop use of update_spd_len()
* 910f111891 soc/intel/mtl: Fill in SPD data on both channels of DDR5 memory
* 0da943ed99 soc/intel/meteorlake: Fix DDR5 channel mapping
* 87c9bb3994 soc/intel/adl: Fill in SPD data on both channels of DDR5 memory
* a23be7a6fe mb/google/fatcat/var/francka: Disable ALC721 & ALC722 clock stop support
* 227d434e2d drivers/soundwire/alc711: Support clock stop flag from devicetree
* 49219f1ce1 Docs: Use markdown autolinks instead of Sphinx doc directive
* 6afc1ff9ac soc/mediatek/mt8189: Disable 8189G APU power to reduce power consumption
* 965131e40f soc/mediatek/common: Fix build error by including stdint.h in cpu_id.h
* e49743755d mb/google/ocelot: Select EC_GOOGLE_CHROMEEC_MEC for MCHP variants
* 32b944b77a mb/google/brox/var/caboc: Update hda_verb table
* ba228d160f mb/google/fatcat: Create new kinmen4es variant
* 6a42eb9134 soc/intel/pantherlake: Disable memory training progress bar
* e9cb352706 soc/common/smbus: Support reading SPD5 hubs for DDR5
* cba46a41b7 mainboard/{hardkernel,protectli}: Drop use of DRAM_SUPPORT_DDR5
* a79f341d29 mb/google/trulo/var/pujjolo: Disable mipi camera dmic LED
* 9411c6e7c7 util/amdfwtool: Fix NULL pointer dereference in fill_dir_header
* 280d3a25e8 util/lint/kconfig_lint: Fix operator precedence issue
* fbc2d76ab3 soc/intel/*: Select 'DRAM_SUPPORT_DDRx' as appropriate
* 008f0ec078 util/smmstoretool: Alias EfiImageSecurityDatabaseGuid to "secureboot"
* 88aeb8b7cd util/smmstoretool: Allow setting authenticated variable
* e977560e72 payloads/edk2: Increase non-full-screen menu size
* ac7487d766 mb/google/fatcat: Use same MAINBOARD_PART_NUMBER for felino variants
* 0f84878c89 mb/google/brox: Handle NULL return value in variant_get_auxfw_version_file
* 749fd1a8d8 soc/intel/pantherlake: Use macro for VGA Init Control
* 3c4fb7b729 mb/google/trulo/var/pujjolo: Update verb table
* 2ae0f6cdb9 mb/google/trulo/var/kaladin: Add fw config for ELAN touchscreen
* 53dd93ff14 libpayload/drivers/pci_qcom: Fix address during ATU config
* 54016e273e util/cbmem/sysfs_drv: Fix incompatible pointer type for 'size'
* a9997f2d7f soc/intel/cmn/block: Request bus master in final op for DSP and HDA
* fea789ed63 mb/google/fatcat/var/francka: Use ACPI for touchscreen power sequencing
* 211526ff38 Revert "mb/google/brya: Fix mux_conn index used by ec/google/chromeec"
* 7b91339e55 Revert "mb/google/brya: Fix pmc_mux port mapping for mithrax and felwinter"
* 8a45e505b9 soc/mediatek/common/dp: Change dptx_hal_phy_wait_aux_ldo_ready to static
* 350c977fef soc/intel/pantherlake: Clear crashlog record using watcher
* ae942a70b8 mb/google/trulo/var/kaladin: Update GPIOs table
* 0a4bc79685 mb/google/trulo/var/kaladin: Update USB2 driving settings
* f34bc61ca7 mb/google/trulo/var/pujjolo: Correct the Goodix touchpad description
* d4b735f9f1 mb/google/ocelot: Turn off unused I2C ports
* 190c27d08b mb/google/brya/var/marasov: Add SPD ID for K3KL6L60GM-MGCT and K3KL8L80EM-MGCU
* d79febf356 soc/qc/x1p42100: Enable QcLib, SHRM and AOP firmware load
* db10b681b4 soc/qc/x1p42100: Load and populate QcLib interface table entries
* eee3ea0346 mb/google/bluey: Enable PCIE Feature for bluey
* 6f115f7bf0 soc/qualcomm/x1p42100: Configure Gen4 PHY link for x1p42100
* 823fa6b8f6 soc/qualcomm/common: Integrate QMP PCIe 4.0 PHY 2x2/1x4
* 6bb199d258 mb/google/fatcat/var/fatcat: Move `ISH_GP_x` pads to fw_config.c
* a5212f15ce mb/google/fatcat/var/fatcat: Remove unused GPP_B06 GPIO configuration
* d7415f5d9a mb/google/trulo/var/kaladin: Remove external bypass settings
* 479b39c3e9 mb/google/ocelot: Update wake on touch GPIO
* 7095c99a87 util/cbmem: Add support for CBMEM in sysfs
* eeb15e83cb mb/gigabyte: Add ga-h81m-d2w (ITE8620E superio)
* 5537ce7c2f mb/google/fatcat: Fix GPIO config for headphone jack detection
* 953957e961 mb/google/trulo/var/pujjolo: Change ICCmax at VCCIN_AUX from 25A to 27A
* 87d5c7224b mb/google/trulo/var/pujjolo: Select Strauss keyboard to show G icon
* eb005f5f5c mb/google/brya/var: Clarify comment for 'tcss_aux_ori'
* 85b26f75d2 soc/intel/xeon_sp: Remove fast_spi_cache_bios_region
* fc4911ec35 soc/qualcomm/x1p42100: Add CPU Clock boost support for X1P42100
* 1a9fb29a53 soc/qualcomm/common: Add API to enable Zondaole PLL for X1P42100
* e272b20c85 sb/intel/common: Remove unused function prototype
* c54fde5040 sb/inte/common/gpio: Implement gpio_input() and gpio_output()
* 55bed620a4 mb/dell: Use gpio_base2_value
* 84899e6fb7 sb/intel: Convert set_gpio to gpio_set
* 0c79443ca9 sb/intel/*/gpio: Convert get_gpios to gpio_base2_value
* 69364fc9e0 sb/intel: Convert get_gpio() to gpio_get()
* 2d7891abe2 sb/intel: Add soc/gpio.h
* 6a20caea01 drivers/lenovo/hybrid_graphics: Add missing header
* 04cc15feb4 sb/intel/common/pmutil: Drop unused header
* b44c0ab25b ec/lenovo/pmh7: Include stdbool.h
* b20f6d27e2 device/dram: Rename 'USE_DDRx' config options
* 1ade8247ce mb/google/trulo/var/pujjocento: update hda_verb table for ALC257
* 28848dc4fb mb/google/trulo/var/kaladin: Add elan touchscreen support
* 9a89e3b4c6 mb/google/trulo/var/kaladin: Select USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AND_NON_UFS
* f84934a203 mb/google/trulo/var/kaladin: Add DRAM part H58G56CK8BX146
* dd76bcc4c3 soc/qc/sc7280: Relocate SHRM firmware load to common Qualcomm path
* 88b10e09b6 mb/google/ocelot: Set TPM_TIS_ACPI_INTERRUPT for all ocelot variants
* c2dfe61016 mb/google/ocelot: Disable CNVi bluetooth core in the baseboard code
* 69e6d96aad mb/google/fatcat: Configure host command ranges for FATCAT4ES variant
* 8bdc170901 mb/google/brox/var/lotso: Update VR domain config
* a6842184ab mb/google/fatcat/var/kinmen: Use ACPI for touchscreen power sequencing
* 712aac780f mb/google/rex/kanix: Use ACPI for touchscreen power sequencing
* 26e6d0be00 mb/google/rex/var/karis: Use ACPI for touchscreen power sequencing
* 00d99a6e9b mb/google/brox/var/lotso: Configure Acoustic noise mitigation
* 4b6ebbdd94 mb/google/skywalker: Initialize clkbuf and srclken in romstage
* f131f0e336 soc/mediatek/mt8189: Add clk_buf and srclken_rc drivers
* 2de0158eec soc/intel/pantherlake: Add asynchronous CBFS file loading support
* eb1b5ee116 soc/intel/cmn/block/fast_spi: Introduce a DMA transfer queue
* 182ba52792 soc/intel/pantherlake: Remove mailbox interface offset
* 2ee78458be soc/intel/pantherlake: Use CONSUMED_BIOS bit
* 9a8ba5b39a {lib, drivers/intel}: Move BMP rendering logic out of SoC code
* a617317775 mb/google/fatcat/var/kinmen: Support SAR table selection via FW_CONFIG
* 92dd8cea59 mb/google/nissa/var/riven: Add parade touchscreen support
* b98f786375 mb/google/fatcat/var/francka: Increase reset delay to 100ms for ILTK0001
* 5f0177ac5d mb/google/trulo/var/pujjolo: Update Stylus IRQ wakeup group
* 5b1a8b53b6 soc/amd/common/i23c_pad_ctrl: add I3C pad config options
* 4b58ec5ac2 soc/amd/common/block/psp: Add fTPM specific bits
* 15bf25de78 Documentation/soc/intel: Update the referenced linuxboot_defconfig
* debfac6352 mb/google/ocelot/var/ocelot: Add wake support for touchpad
* b6425a9a78 soc/amd/common: Add comments about bootblock
* 69888bc7fc util/cbfstool/amdcompress: Bail out on invalid ELF
* 3b008bde8c soc/mediatek/mt8196: Fix intermittent black screen issue
* da33feeb51 soc/mediatek/mt8189: Correct thermal SRAM base address and length

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-19 07:47:18 +00:00
Leah Rowe
aa0e4205d6 re-base the T480 thunderbolt patch
i noticed that the enablement patch came first,
before the actual driver. while this functioned
overall, it was obviously flawed in terms of
the resulting git history. the person who sent
the patch previously had 0046- on both patch
names, which meant that alphabetical sorting
caused the enablement patch to be applied
before the driver patch.

furthermore:

it seems that the submitted had manually re-applied
the same Kconfig changes in the enablement patch,
adding their own name - since Kconfig is not
copyrightable anyway, in this specific example, or
otherwise trivial, it's probably fine, but the
original author on the gerrit patch is actually
Matt DeVillier:

https://review.coreboot.org/c/coreboot/+/88490

I have therefore simply re-based by checking out
Matt's patch, on patchset 1.

However, patchset 1 of Matt's patch uses patch
set 16 of:

https://review.coreboot.org/c/coreboot/+/75286

HustlerOne's lbmk merge uses patchset 18:

https://review.coreboot.org/c/coreboot/+/75286/18

The differences between the two can be observed, thus:

https://review.coreboot.org/c/coreboot/+/75286/16..18

It should be clarified that these patches are not
upstreamed yet, but under heavy review on gerrit.
However, testing has revealed that the patch is
mostly stable.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-15 14:06:12 +00:00
Leah Rowe
f3dc54432e Merge pull request 'T480: Add Thunderbolt support' (#387) from hustlerone/lbmk-alpine_ridge:master into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/387
2025-12-15 14:57:52 +01:00
Hustler One
809e5d29a4 T480(s): Add Thunderbolt support 2025-12-11 14:58:33 +01:00
Leah Rowe
ec8617f27a coreboot/t480s: fix headphone jack detection
this is merged from a patch sent to coreboot by
Matt DeVillier, based upon the work done by
Arthur Heymans for the regular T480

https://review.coreboot.org/c/coreboot/+/90450/2

yes

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-12-10 22:30:09 +00:00
Leah Rowe
724f905aaf Merge pull request 'T480: Fix headphone jack detection' (#385) from Riku_V/lbmk:t480verbfix into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/385
2025-12-02 22:17:21 +01:00
Riku Viitanen
2dea4b79b2 T480: Fix headphone jack detection
Recently, a HDA verb bugfix was merged to coreboot:
https://review.coreboot.org/c/coreboot/+/90023

Tested on a T480. Before the fix, detection *never* worked.
After fix, it seems to reliably work.

TODO: update docs to reflect this.

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
2025-12-02 21:58:53 +02:00
Leah Rowe
9d740e9512 grub: add a keyboard layout for norway
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-11-22 21:26:40 +00:00
Leah Rowe
7a9977af72 rebase recent dell thermal safety patch
it didn't apply. i will soon update the coreboot revisions
ready for Libreboot 25.12

just rebase this patch for now

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-11-18 18:47:23 +00:00
Leah Rowe
efd17fde19 Merge pull request 'removed duplicate "payload_uboot" for e6230_12mb' (#374) from honzo/lbmk:e6230_12mb_deduplicated into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/374
2025-11-18 15:13:22 +01:00
Leah Rowe
d1606ef11f Merge pull request 'fixed typo in "grub_scan_disk" for macbook11_16mb' (#375) from honzo/lbmk:macbook11_16mb_fixed_typo into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/375
2025-11-18 15:12:48 +01:00
Leah Rowe
48b00ce3c8 Merge pull request 'config/coreboot/default: Disable Latitude early thermal shutdown' (#376) from nic3-14159/lbmk:mec5035-updates into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/376
2025-11-18 15:12:28 +01:00
Nicholas Chin
c0dab33972 config/coreboot/default: Disable Latitude early thermal shutdown
Disable the sudden EC initiated shutdown on the Sandy Bridge/Ivy Bridge
Dell Latitude laptops as soon as the reaches 87 degrees, allowing the
standard CPU thermal throttling mechanisms to work.

Fixes: https://codeberg.org/libreboot/lbmk/issues/202

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2025-11-18 06:48:38 -07:00
libreboot Contributor
fda3ac975a removed duplicate "payload_uboot" for e6230_12mb 2025-11-16 00:19:36 +00:00
libreboot Contributor
831fa657de fixed typo in "grub_scan_disk" for macbook11_16mb 2025-11-16 00:18:31 +00:00
Leah Rowe
1b10c072d3 tree.sh: tidy up check_gnu_path
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-11-15 16:57:48 +00:00
Leah Rowe
7ef7e02f73 lib.sh: reduce indentation in setvars
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-11-15 16:55:27 +00:00
Leah Rowe
214ed3efd2 get.sh: reduce indendation in fetch_targets
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-11-15 16:51:59 +00:00
Leah Rowe
9d6af0063b get.sh: reduce indentation in clone_project
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-11-15 16:51:10 +00:00
Leah Rowe
d7869a56f5 WIP: chromebook integration script
I intend to merge every Chromebook that Mrchromebox supports,
into Libreboot, ready for the Libreboot 25.12 release. Work
is still ongoing, and several changes need to happen in lbmk.

I started working on it a few weeks ago (today is
14 November 2025 as I push this).

Still TODO:

* Automatically create lbmk coreboot targets, based
  on the configs present in MrChromebox git
* Re-work git repository management in lbmk, such that
  a list of upstreams is used, instead of a hardcoded
  list per configuration; this will allow us to use
  different remotes across the same project, even where
  they diverge. This would then allow us to use the
  MrChromebook repository directly, instead of cherry-picking
  patches into upstream coreboot
* The note above about remotes would also mean that we can
  use MrChromebox's own edk2 repository directly. All of this
  would reduce the burden on lbmk.git
* Support building edk2 payloads, exactly mirroring the
  setups used on MrChromebox builds

There are some things that need to be checked first, for
boards that use MMC-based or eMMC-based storage, for the
GRUB and SeaBIOS payloads, also U-Boot, because I will
also be using these.

As such, this current script shall sit in lbmk master, but
it is not yet finished.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-11-14 18:22:51 +00:00
Leah Rowe
25f523bbac get.sh: return clone_project if multi-tree
this is the true fix, replacing the fixes previously
reverted.

the problem with the old fix was that it was a hack,
and could result in the archived backup of a code repo
being the wrong one; the destination was the one for
the main repo, but what if we were cloning the backup?

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-17 22:40:29 +01:00
Leah Rowe
bec7e6d4cb Revert "get.sh: don't frivolously copy tmp git clones"
This reverts commit b840cf3a83.
2025-10-17 22:32:43 +01:00
Leah Rowe
f632b8aed7 Revert "get.sh: remove a redundant check"
This reverts commit e2a97455cc.
2025-10-17 22:32:35 +01:00
Leah Rowe
e2a97455cc get.sh: remove a redundant check
loc is never empty.

if it is, it's a bug. don't hide bugs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-17 21:01:31 +01:00
Leah Rowe
b840cf3a83 get.sh: don't frivolously copy tmp git clones
this fixes a regression in a previous patch, this time
also taking account for the different cache locations.

all of get.sh needs to be purged, and re-written clean.
it looks clean. but it's years of hacks.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-17 20:57:18 +01:00
Leah Rowe
2aea7f6229 Revert "get.sh: make forcepull a macro"
This reverts commit b3232a7c4a.
2025-10-17 16:07:16 +01:00
Leah Rowe
b3232a7c4a get.sh: make forcepull a macro
:

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-17 14:02:55 +01:00
Leah Rowe
54aa5b7d32 tree.sh: unify -f/-F in case/switch handling
they're the same commands, but -F does forcepull

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-17 13:57:14 +01:00
Leah Rowe
96f786b962 tree.sh: convert do_make into a macro
use it similarly to if_dry_build/if_not_dry_build

there is nothing cooler than an sh macro

:

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-17 13:29:56 +01:00
Leah Rowe
47f08e2e6d git: don't use review.coreboot.org as main
where backup links are available, use those as main instead.

this is because of the new XBMK_CACHE_MIRROR variable, which
makes --mirror be used

when performed on review.coreboot.org, this also pulls down
all changes from gerrit code review; the github backups for
example only contain the official branches, but gerrit creates
a new ref per merge request.

a user can still run ./mk -F to force pulling all repos,
including the coreboot.org ones, but use of -f will skip the
coreboot.org ones if the backup links worked and contain the
local commit needed, by a given project used in xbmk.

this patch won't change any real-world behaviour for xbmk
users, but it is done as a courtesy to the coreboot project,
in that it largely avoids a sudden surge in coreboot.org's
traffic if lots of users start doing XBMK_CACHE_MIRROR=y

if XBMK_CACHE_MIRROR is not set, or set to anything other
than y, a regular clone is performed, saving cached sources
to cache/clone/ - otherwise, cache/mirror/ is used.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-16 15:57:31 +01:00
Leah Rowe
e1b6ccf69e xbmk: sort global variables alphabetically
also separate some of the special ones.

this makes the variables easier to read/find.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-16 15:46:44 +01:00
Leah Rowe
d84a556bf0 get.sh: use the same directory map as --mirror
Don't hardcode the cache directory, and don't store
remotes anymore. This change retains compatibility
in practice, with the older directory location, because
it's extremely unlikely that newly generated locations
would conflict with old ones.

With this new change, non-mirror git clone caches are
now done twice; one directory per remote, rather than
one directory with two remotes.

This is just inherently much more reliable.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-16 14:22:06 +01:00
Leah Rowe
b333ddfe73 get.sh: use --keep-cr on git-am
Some repositories might use CR-LF line endings. This option
keeps Git from mangling patches when merging.

Repositories that don't do this, such as ALL repositories
currently used by xbmk, will be unaffected by this change.

This is being done in preparation for importing MrChromebox
edk2, as Intel's own edk2 repository on GitHub uses these.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-16 13:30:55 +01:00
Leah Rowe
d83dd506c2 get.sh: More reliable git remote caching
Don't do one repository for all remotes. Do one *clone* per
remote.

This also means that users no longer download information twice,
in practice, because the backup repository will only be downloaded
if the main one didn't work.

Theoretically, this change is makes the process less efficient, but
in practise it's more reliable now.

We do now use --mirror on the git clone command for caches, but we
already did git pull --all before.

This just ensures that we absolutely have all local code.

NOTE:

The new code isn't used by default. To use it, you must do:

export XBMK_CACHE_MIRROR="y"

Otherwise, the old behaviour will continue to be used. This is
because the new code, while correct, puts more strain on upstream
servers (more code being downloaded), and can result in higher amounts
of disk space being used. The old behaviour wasn't broken, so we'll
also support that method.

TODO: perhaps also have a check in place to re-use both caches,
where available, regardless of XBMK_CACHE_MIRROR?

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-16 13:29:59 +01:00
Leah Rowe
18c63682e7 Merge pull request 'Add Fedora 43 to dependencies' (#364) from bauduser/lbmk:fedora43dependency into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/364
2025-10-09 12:07:15 +02:00
bauduser
7b42779912 Add Fedora 43 to dependencies 2025-10-09 02:56:09 -07:00
Leah Rowe
11a3e9d887 xbmk: minor code cleanup (79 character rule)
recent re-factoring lead to certain code lines that
exceeded 79 characters in length.

we like to avoid this, whenever possible.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-07 05:52:36 +01:00
Leah Rowe
fb95e4ad68 tree.sh: add missing -F flag
i support -F, but didn't include it in the
actual getopt string.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-07 03:02:01 +01:00
Leah Rowe
ca5f0a5edd get.sh: use git-show instead, for rev checks
whatchanged is deprecated, and results in an error
on modern git versions, prompting you to include
the --i-still-use-this argument

what absolute, utter fucking arrogance. i use the
whatchanged feature every fucking day.

i will be complaining to git-scm.com about this.

but that's what we do in libreboot. we adapt.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-07 01:25:19 +01:00
Leah Rowe
8636d7497c rom.sh/tree.sh: clean up if_not_dry_build
the way it was used is messy, and a relic of the
old chained command coding style, from before when
i recently loosened that requirement.

the new focus is simple, readable code, regardless
of size.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-06 13:28:34 +01:00
Leah Rowe
1b54c7a744 rom.sh: use if_dry_build macro
instead of checking if_not_dry_build.

use it here the same way.

yes. shell script macros. it's how i roll.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-06 12:43:04 +01:00
Leah Rowe
afccecbde0 rom.sh: don't run add_cbfs_option on dry builds
i added this in an earlier version of the patch, but
for some reason removed it.

this is necessary, or the build system will fail.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-06 07:44:38 +01:00
Leah Rowe
7d597bc4a1 disable stack overflow debug on alderlake
see patch

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-06 04:48:48 +01:00
Leah Rowe
c716341c13 cb/kabylake: don't hardcode power_on_after_fail
I realised that the Dell OptiPlex 3050 Micro has NVRAM available.
Use that backend, and hardcode power_on_after_fail to Disable,
which is already done in cmos.default.

The Lenovo ThinkPad T480 currently has no option table in coreboot,
besides the CBFS one. For this, the CBFS option table has been
enabled, and the build system has been modified to insert
a relevant config for power_on_after_fail.

Nicholas Chin informs me that Kabylake generally has legacy NVRAM,
so enabling it for the T480/T480s should work, but we'll need
to use it in the future anyway; better to just use CBFS now.

I *could* use the CBFS backend on 3050micro as well.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-06 04:03:36 +01:00
Leah Rowe
b5ad829ffe Merge pull request 'config/coreboot/default: Add Haswell NRI SMBIOS type 16/17 patch' (#363) from noisytoot/haswell-nri-smbios-memory into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/363
2025-10-06 03:22:07 +02:00
Ron Nazarov
e82e2a1332 config/coreboot/default: Add Haswell NRI SMBIOS type 16/17 patch
This patch implements SMBIOS type 16 and 17 for Haswell NRI, making
`dmidecode -t memory` work.

From https://review.coreboot.org/c/coreboot/+/89385
2025-10-06 01:12:25 +01:00
Leah Rowe
9b104fca44 init.sh: only create cache/ here
also, the check is -e, not -d, because we
might be operating on a symlink.

it's a bit hacky but this should work.

the previous change (now reverted) broke
re-use of the main cache/ in release work
directories.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-05 01:23:32 +01:00
Leah Rowe
ee2bca65f6 Revert "init.sh: explicitly create cache/"
This reverts commit 23f98c2958.
2025-10-05 01:21:26 +01:00
Leah Rowe
23f98c2958 init.sh: explicitly create cache/
otherwise, an error occurs when doing ./mk release

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-05 01:04:25 +01:00
Leah Rowe
1e488aae78 Revert "remove unar from dependencies"
This reverts commit e8a3cd8cd0.

We still need this for extracting the CAB files containing
KBC1126 EC firmware.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 23:57:08 +01:00
Leah Rowe
c1d6cd22c2 xbmk: don't call mkdir. use xbmkdir (new function)
xbmkdir checks if a directory exists, before running
mkdir, and then still uses -p

i was testing xbmk on arch linux today, and noticed
that it errored out when a directory already exists.

i'm mitigating against buggy or differently behaving
mkdir implementations this way, by wrapping around
it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 22:42:42 +01:00
Leah Rowe
f358cfaa55 coreboot/x2e_n150: fix the alderlake n fsp link
this fixes ./mk inject

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 22:23:52 +01:00
Leah Rowe
6a00b7a584 coreboot/default: don't require alderlake fsp repo
we need the full fd path to be automatically set. this
patch prevents it from being removed by ./mk -u coreboot

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 22:21:23 +01:00
Leah Rowe
247cb85489 don't compress alderlake fsp
for reproducibility, we must not compress it

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 22:02:03 +01:00
Leah Rowe
183f378150 coreboot/x2e_n150: unset CONFIG_FSP_FULL_FD
otherwise, ./mk -u screws up the FSP path

we were still using the correct path for downloading
in ./mk inject, and in practise, the file used by
coreboot would have been the same, but without our
hash verification after splitting up the FSP.

that's the main reason we split FSP in lbmk, rather
than relying on coreboot's logic for this.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 20:11:17 +01:00
Leah Rowe
31fa7ea591 vendor.sh: re-do the previously reverted change
but do it better. this time, the change won't cause any
behavioural differences.

the reason for the change is we don't want "$@" inside
an eval statement, if such calamity can be avoided.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 16:57:36 +01:00
Leah Rowe
2956fcc051 vendor.sh: fix setvfile
this reverts change made to this function in:

commit 4f01dc704a
Author: Leah Rowe <leah@libreboot.org>
Date:   Sat Oct 4 06:13:15 2025 +0100

    xbmk: remove even more eval statements

for some reason, the new code caused sch5545 ec firmware
to never download.

the old code wasn't horribly broken, so just use that.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 16:14:36 +01:00
Leah Rowe
8334c93dac release.sh: preserve clean sbase before building
this way, the clean version can be placed inside the
release tarball.

there is a make clean option in sbase, but we should
not really on this.

the design of xbmk is that a clean src tarball is
created. there must not be build artifications in it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 10:09:24 +01:00
Leah Rowe
8969cc734f xbmk: use sbase sha512sum, not host sha512sum
the --status flag seems to be a GNUism

as stated in the previous commit, i import sbase
suckless now, so as to have a consistent implementation
of sha512sum.

this ensures that its output is reliable, when i'm using
the output of this command within backticks.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 09:58:24 +01:00
Leah Rowe
e9a910b33c config/git: import suckless sbase
i currently use the output of sha512sum in several
places of xbmk, which is a bit unreliable in case
output changes.

other cases where i use util outputs in variables
are probably reliable, because i'm using mostly
posix utilities in those.

to mitigate this, i now import suckless sbase, which
has a reasonable sha512sum implementation.

*every* binary it builds is being placed in build.list,
because i'll probably start using more of them.

for example, i may start modifying the "date"
implementation, adding the GNU-specific options that
i need as mentioned on init.sh

i'm importing it in util/ because the sha512sum
util is needed for verifying project sources, so
if sbase itself is a "project source", that means
we can into a chicken and egg bootstrapping problem.

this is sbase at revision:
055cc1ae1b3a13c3d8f25af0a4a3316590efcd48

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 09:20:12 +01:00
Leah Rowe
2cfaba181b xbmk: rename cv variables, for clarity
the new names are still a bit crap, but a bit better.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 08:41:25 +01:00
Leah Rowe
1943dba608 tree.sh: rename xtree to xgcctree, for clarity
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 08:37:41 +01:00
Leah Rowe
51e424c7d1 tree.sh: rename btype to buildtype, for clarity
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 08:36:18 +01:00
Leah Rowe
d95af9ba44 vendor.sh: rename _t to blobtype, for code clarity
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 08:33:26 +01:00
Leah Rowe
63002732f5 tree.sh: rename _f to flag, for code clarity
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 08:29:33 +01:00
Leah Rowe
b7a9aad9fc get.sh: delete tmp patch list when done
yet another oversight

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 08:20:27 +01:00
Leah Rowe
a115679c57 get.sh: sort patches when applying
this was an oversight in my recent patch unrolling
the condensed code lines, to remove eval statements.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 08:17:53 +01:00
Leah Rowe
0776eb414c vendor.sh: make the fsp hack a bit cleaner
it's still a dirty hack. i really should make
a better check here.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 08:12:24 +01:00
Leah Rowe
70cdb03f7f vendor.sh: correction to fsp hack
i unrolled these lines earlier, but this line was
incorrect; dl was already handled. it's dl_bkup
that we have to handle here.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 08:08:34 +01:00
Leah Rowe
1eafcf9029 vendor.sh: minor cleanup
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 08:07:07 +01:00
Leah Rowe
efd1db1ca3 release.sh: remove eval statement in nuke()
the symlink check is what made me use eval, but the
symlink check is not required, since i check every
entry that goes in nuke.list anyway.

not having that symlink check is safer than having
an eval statement on that line.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 08:03:12 +01:00
Leah Rowe
b4c7cac8a2 xbmk: rename the "dry" variable to if_not_dry_run
and add a line break where it is used

now it is essentially a macro of sorts, used in
terms of syntax, to mean the same as:

if [ "$dry" != ":" ]; do
	thing
fi

in this case, we say:

$if_not_dry_build \
	thing

yes. macros in sh are a thing.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 07:50:34 +01:00
Leah Rowe
9f84bd4f34 coreboot/mkhelper: don't use eval
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 07:36:19 +01:00
Leah Rowe
4f01dc704a xbmk: remove even more eval statements
in one or two cases, the use of eval is retained, but
modified so as to be safer.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 07:17:42 +01:00
Leah Rowe
7f8d85140f xbmk: remove the setcfg function
this allows me to remove several eval calls, and the
errors relating to configs can now show exactly which
function they occured in, allowing for easier debugging.

once again, eval should be used sparingly if at all.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 05:23:47 +01:00
Leah Rowe
0a74cc8ec6 xbmk: clean up a few err calls
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 03:05:23 +01:00
Leah Rowe
a09ec1d02b xbmk: remove more eval statements
i will eventually find a way to remove them all,
while still leaving the code completely clean.

in practise, i never use the contents of a file
for eval and the inputs are carefully checked.

however, over-use of eval is always a bad idea
in shell scripting.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 02:55:52 +01:00
Leah Rowe
0605fbe720 xbmk: general cleanup: unroll condensed code lines
i overlooked a number of lines, during previous cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-04 02:43:24 +01:00
Leah Rowe
e1c70f4319 vendor.sh: remove superfluous AND
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-03 22:43:06 +01:00
Leah Rowe
e1c580f6bc grub/xhci_nvme: fix target.cfg
it still said tree="xhci"

it should say  xhci_nvme

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-03 00:04:23 +01:00
Leah Rowe
093606784a add fedora42 dependencies from bauduser
this was sent by bauduser, who messed up the pull
request (number 362). i'm simply merging the
change manually.

once again, i instructed this contributor to
properly learn git vcs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-02 23:59:57 +01:00
Leah Rowe
5e35b0684d dependency/debian: libstdc++-arm-none-eabi-newlib
this is needed to make pico-serprog compile.

this change is submitted by "bauduser" in lbmk pull
request #362, but the PR was messed up. for such
a trivial change, I simply  merged this change
manually, instructing the contributor to properly
learn git vcs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-02 23:57:49 +01:00
Leah Rowe
af88a066d0 grub/xhci: rename to grub/xhci_nvme
we have the "default" tree, then the "nvme" tree which adds
nvme support.

the "xhci" tree adds xhci patches, *and* nvme patches.

riku suggested that i rename it accordingly, and his advice
was quite correct, indeed wise.

this will reduce confusion for contributors, including *myself*.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-02 23:48:48 +01:00
Leah Rowe
d90defeae3 mrc.sh: remove superfluous eval statement
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-02 07:09:37 +01:00
Leah Rowe
a74af6aa05 tree.sh: remove superfluous eval statements
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-02 06:55:29 +01:00
Leah Rowe
15cefca84b rom.sh: remove superfluous eval statement
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-02 06:53:36 +01:00
Leah Rowe
2b4b5bf82e inject: remove superfluous use of eval
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-02 06:52:10 +01:00
Leah Rowe
85b10a674b init.sh: reduce the use of eval statements
also remove the unused _nogit variable

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-02 06:51:03 +01:00
Leah Rowe
99f2c0fcf9 get.sh: reduce the number of eval statements
also split up try_fetch()

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-02 06:27:39 +01:00
Leah Rowe
be1f4ebb9c get.sh: allow force-pull via -F instead of -f
use of ./mk -F behaves the same as -f before the
previous commit.

this can be useful, during development when we want
to update revisions.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-01 16:51:00 +01:00
Leah Rowe
24f120d1b8 get.sh: only pull if the local revision is missing
we pull from upstream in cached git repos, before performing
an operation, and we run from the cache, but we do this every
time, even if a local revision exists, defeating the purpose
of the caching; on unreliable/intermittent internet connections,
this can cause a problem.

this also causes us problems with gnulib.git and grub.cfg, which
for *some reason* are really slow, even when doing a pull.

this change improves the efficiency of the build system, during
release builds, on a development repository where we already
have lots of caches.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-01 16:28:04 +01:00
Leah Rowe
084b8b65c6 u-boot: make the libreboot logo rainbow again
i like the rainbow

removing it was a mistake

this patch brings it back

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-01 09:26:46 +01:00
Leah Rowe
2ac51f442b init.sh: break up xbmk_set_env
what this function does will differ wildly,
depending on whether it's a child instance
or a parent instance of xbmk.

break up this function accordingly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-01 07:57:39 +01:00
Leah Rowe
8b351e51aa tree.sh: break up check_gnu_path to subfunctions
this whole check could probably be removed, honestly.

it was only put in place during the debian trixie testing
release cycle, before they finally updated gnat just before
the stable release of trixie came out.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-01 07:43:12 +01:00
Leah Rowe
3b6d2b799c vendor.sh: break up the extract_kbc1126 subshell
stick it in a new function, for easier reading.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-10-01 07:19:04 +01:00
Leah Rowe
347330a611 coreboot/x2e_n150: rename config to fspgop
because it's using fspgop init code, not libgfxinit

this is enabled by the previous patch, which now properly
handles seabios payloads when dealing with this.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-28 23:20:25 +01:00
Leah Rowe
f272c4d1c4 rom.sh: support "fspgop" init mode
for all intents and purposes, this functions like libgfxinit
corebootfb, but uses intel fsp's video initialisation instead
of coreboot's native initialisation code

this is currently in use on the x2e n150 mainboard, whose
config is dubiously named "libgfxinit_corebootfb"

now the config can be renamed, and will be, in the next commit.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-28 23:18:50 +01:00
Leah Rowe
aa3ccf0433 fix up old comment in vendor/x2e_n150
theu current comment is for an old version of the n150
patch, before it was actually merged. the comment has
been adjusted, to match the actual implementation that
was merged.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-28 22:09:58 +01:00
Leah Rowe
b786918b2b vendor.sh: use bsdunzip, not unzip
most implementations of unzip are info-zip

we already compile libarchive for bsdtar, to extract
rar archives in vendor.sh

now we also use bsdunzip

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-28 11:27:16 +01:00
Leah Rowe
c6939cf390 libarchive: also copy bsdunzip and bsdcpio
bsdunzip in particular, can be used instead of relying
on the host to provide unzip.

most linux hosts use info-zip as the implementation,
which bsdzip is compatible with.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-28 11:23:52 +01:00
Leah Rowe
06c1ed009d add -p flag to old me_cleaner too
this lets you skip fptr checks

not currently used on this version, but i want this
patch here so that it can be in the future

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-28 03:20:07 +01:00
Leah Rowe
e8a3cd8cd0 remove unar from dependencies
we use bsdtar now

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-28 02:31:43 +01:00
Leah Rowe
8e8f29c2e5 vendor.sh: remove false error message
mkdst cycles through a bunch of outputted files
when running an extract function, to find the
right file as per defined checksums; if one is
found, it can still show errors for the others,
leading the user to think something is wrong.

remove their fear by removing this benign error.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-28 02:29:04 +01:00
Leah Rowe
4075c8be38 vendor.sh: use bsdtar, not unar
unar is buggy and crap

and bsdtar has superior licensing

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-28 01:56:05 +01:00
Leah Rowe
e527820ceb vendor.sh: don't use unrar
the only practical way to use it is to to use
the non-free version; currently used as a
fallback if unar fails.

however, i'm also going to scrap unar and
use bsdtar instead.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-28 01:45:36 +01:00
Leah Rowe
7b297a44ce config/git: Support building libarchive
This is for bsdtar, which we will use in place
of unar, because unar is not available on all
of the distros, and we had some recent problems
with it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-28 01:45:36 +01:00
Leah Rowe
d4f5fdec06 Merge pull request 'New mainboard: X2E_N150' (#361) from Riku_V/lbmk:x2en150 into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/361
2025-09-28 01:25:27 +02:00
Riku Viitanen
b4c3bafb0e New mainboard: X2E_N150
Patch in Gerrit: https://review.coreboot.org/c/coreboot/+/89281
Not working: USB3 ports only work at USB2 speeds.

IFD:
Modified the original by:
- Removing Device Exp2 region (empty anyway)
- Enlarging the BIOS region to use this freed space
- Setting the HAP bit in PCHSTRP55 using a fork of
  me_cleaner: https://github.com/XutaxKamay/me_cleaner

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-28 02:21:15 +03:00
Leah Rowe
9da4fa64a6 coreboot/default: allow alderlake fsp in releases
i delete unneeded fsp modules in releases, to cut down
on the tarball size. so, currently, only kabylake fsp
is distributed.

i'm now also allowing alderlake fsp, because riku has
sent a patch adding an alderlake machine to libreboot.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-27 15:56:39 +01:00
Leah Rowe
c9d6143e20 gru bob/kevin: make u-boot bootflow timeout 8secs
not 30secs

it's 8 seconds on x86

8 is more reasonable. 30 feels too long.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-26 13:33:36 +01:00
Leah Rowe
fa6c3512d6 rom.sh: remove TODO note
the return is necessary when release=n while doing
release builds, because it prevents a build error
since the given images don't exist in that scenario.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-26 00:25:13 +01:00
Leah Rowe
574fd30cde inject.sh: don't exit from patch_release
return instead. xbmk's coding style specifically
prohibits anything other than x_ or err from
running "exit".

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-26 00:21:40 +01:00
Leah Rowe
4fbafaaa46 init.sh: remove comment in pybin
the following checks on the path mitigates the
lack of error handling in the findpath command
that sets pypath.

this was all thought of when i initially wrote
this code. it's perfectly fine.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-26 00:14:45 +01:00
Leah Rowe
204e310f5a get.sh: remove unnecessary check in try_copy
the check for whether a file is present is unnecessary,
because the following cp command would also print the
file name if it doesn't exist, and exit with the same
non-zero status.

let cp do the work.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-26 00:13:17 +01:00
Leah Rowe
b4fbdb448d get.sh: rename try_file to try_fetch
the previous function name was misleading, because
this tries multiple methods including git and curl.

therefore, this was renamed to match what it dose.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-26 00:12:21 +01:00
Leah Rowe
e42cb4f4cd xbmk: tidy up some if statements
this is an extension of the previous work to unroll
most of the condensed code lines.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-26 00:09:46 +01:00
Leah Rowe
f5060232e1 init.sh: remove TODO note
on further inspection, the following check ensures that the
python version number is 3.

if anything went wrong, the possibility alluded to in the
comment wouldn't actually matter in practise.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-25 23:54:16 +01:00
Leah Rowe
0303167e25 init.sh: create TMPDIR *after* suid check
otherwise, it may get created as the root user, disabling
further use of lbmk until manual user intervention.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-25 02:26:48 +01:00
Leah Rowe
1a74172a17 release.sh: use cache src on release builds
use what's in cache/clone/ from the main directory

this speeds up the build process

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-25 02:25:59 +01:00
Leah Rowe
6bb4e2c72a init.sh: remove symlink check on XBMK_CACHE
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-24 23:34:12 +01:00
Leah Rowe
dc722b5bb8 init.sh: switch back to old TMPDIR checks
the new check is still retained, to the extent that
the lock file still contains the TMPDIR string, and
it's checked whether this changed during execution.

however, the current TMPDIR handling is over-engineered
and prevents the re-use of project source caches when
doing release builds; this means that the release builds
happen much more slowly, especially for slow internet
connections.

this change *fixes* that bug. now release builds once
again re-use the main cache/ directory.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-24 23:26:11 +01:00
Leah Rowe
4686ba8a4a make notices a bit more readable
add line breaks, so that the license and author are
visually separated. this makes it easier to read.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-24 20:14:51 +01:00
Leah Rowe
5a8f350bc7 release.sh: fix typo in script: ./mk, not ./mx
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-24 18:19:48 +01:00
Leah Rowe
8347e2c85d xbmk: cleanup of recent code refactoring
be a bit less pedantic about if else clauses. leave the
big ones still with then on separate lines, where else
is specified.

also unroll a few condensed code lines where i missed
a few.

sloccount 2303 in lbmk. that's still only slightly bigger
than libreboot 20260907 which was 2180, and still much
smaller than libreboot 20230625 which was 3322.

this is *without* the condensed codelines, so now the only
thing that's reduced is the overall amount of logic present
in the build system.

and i should clarify that lbmk is presently much more powerful
than both of those two versions (20160907/20230625).

the 2016 one is useful for comparison historically, since that
was the last major version of libreboot prior to the great
second coming of leah in 2021; and the 2023 june release was
basically the last one before the great audits of 2023 to
2025 began.

not to brag (not much anyway), but all of this means that lbmk
is an insanely efficient build system, considering all the
features it has and what it does.

i unrolled the condensed code style in lbmk, making the scripts
a lot easier to read, because i received complainst about the
condensed style previously used; nicholas chin and alper nebi
yasak both told me that it sucked, and riku viitanen had hinted
at that same fact several months prior.

so hopefully now, lbmk is a bit nicer. those and other people
often find it challenging to challenge me because for reason
they assume i'll get upset and fly off the handle, but it's the
opposite. i want constant criticism, so that i know to improve!

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-24 13:19:23 +01:00
Leah Rowe
03bf6c185b mk: unroll condensed code lines
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-24 08:53:24 +01:00
Leah Rowe
0275c60111 get.sh: unroll condensed code lines
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-24 08:40:45 +01:00
Leah Rowe
193001bc71 init.sh: unroll condensed code lines
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-24 06:54:36 +01:00
Leah Rowe
ace167445f inject.sh: unroll condensed code lines
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-24 03:13:42 +01:00
Leah Rowe
94ab695457 lib.sh: unroll condensed code lines
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-24 02:15:41 +01:00
Leah Rowe
8d5d6a3e2a mrc.sh: unroll condensed code lines
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-23 12:19:47 +01:00
Leah Rowe
45c4d4045c release.sh: unroll condensed code lines
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-23 12:18:15 +01:00
Leah Rowe
f5c91ff0ee rom.sh: unroll condensed code lines
ditto to last commit

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-23 11:47:25 +01:00
Leah Rowe
e282586427 tree.sh: unroll condensed commands
i went further than in the previosu commit. in this
commit, i also provide indentation inside subshells,
to make it clearer that soomething is being done
inside a subshell.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-23 05:55:18 +01:00
Leah Rowe
8b3f476b57 vendor.sh: unroll condensed code lines
this is part of a general effort to make lbmk
easier for novices to understand.

more commits to follow (one for every script).

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-23 02:34:00 +01:00
Leah Rowe
6b796e2b4c init.sh: make TMPDIR *after* calling xbmkpkg
otherwise, running ./mk dependencies as root will
create xbmkwd/ (temporary directories) as root,
which will then prevent non-root instances of lbmk
from being able to make temporary files.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-21 19:52:14 +01:00
Leah Rowe
2c02b17810 lenovo/t440p: add a target with 4mb cbfs
this is exactly the same as the normal t440p config,
except that cbfs is 4mb instead of 8mb.

this is useful when externally updating libreboot,
or unbricking; it could also be used for lazier
installation, where you only flash the 2nd chip
without doing a disassembly to get at the other one,
if the user didn't care about neutering the ME.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-19 16:48:05 +01:00
Leah Rowe
c11c5a7a14 Revert "xbmk: don't use backticks for command substitution"
This reverts commit 4999a49de3.
2025-09-18 23:35:12 +01:00
Leah Rowe
14bcb3a6fa config/dependencies: cleanup
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-18 14:55:52 +01:00
Leah Rowe
fe301a019b vendor.sh: add missing error handle on sha512sum
it's still outputting to a file, with an error handle
there, but use of x_ on the sha512sum command itself
adds further assurance of reliability.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-17 17:27:39 +01:00
Leah Rowe
c734a6e757 tree.sh: fix bad variable reference
we didn't want to say a variable name here.
we only wanted to say "trees".

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-14 19:23:40 +01:00
Leah Rowe
995963baf4 xbmk: much more verbose error messages
use the new functionality in err(), whereby a given
function name and arguments can be provided, for
debugging purposes.

something similar was already done in a few places,
and replaced with this unified functionality.

this patch will make xbmk much easier to debug, under
fault conditions.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-13 13:27:47 +01:00
Leah Rowe
7bed68f5b7 lib.sh: use xprintf in err()
if more than one argument is provided, it is interpreted
as a command, and the command is outputted.

this means that now for example, where you have:

ls -l foo | err "could not list directory"

you could do:

ls -l foo | err "could not list directory" "$@"

this would show all the arguments given to the calling
function that tried to run "ls"

let's say that function was called bar, you might do:

ls -l foo | err "could not list directory" bar "$@"

right now, it's not easy to provide good debug info
where err is used, unless it was called with x_, which
provides the command/arguments that was bugging out.

with this, we now have an easy and readable/maintainable
way to do the same thing everywhere in xbmk.

this will now be done, in a follow-up commit.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-13 12:09:55 +01:00
Leah Rowe
edcf8cead8 lib.sh: use xprintf in x_
don't echo the arguments

this new logic shows quotes, in error outputs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-13 11:50:44 +01:00
Leah Rowe
333739961a lib.sh: check args for errors in fx_ and dx_
check that there are at least two arguments, and ensure that
they are not empty.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-13 11:47:10 +01:00
Leah Rowe
ce5127e46b inject.sh: add missing semicolon in case
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-11 12:16:33 +01:00
Leah Rowe
0deac58e41 vendor.sh: tidy up apply_deguard_hack()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-11 11:26:19 +01:00
Leah Rowe
c738698cca vendor.sh: tidy up extract_intel_me()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-11 11:20:35 +01:00
Leah Rowe
e9c7338cda vendor.sh: clean out 7ztest on startup
otherwise, some files from a previous me.bin scan
might still be there, which could lead to the wrong
me.bin being found.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-11 10:55:18 +01:00
Leah Rowe
07cda7fa12 vendor.sh: remove unnecessary rm -Rf command
this file being deleted was never created.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-11 10:53:38 +01:00
Leah Rowe
4999a49de3 xbmk: don't use backticks for command substitution
the newer way handles escaped characters better, and it
can be nested more easily. it's also more readable.

personally, i prefer the old way, because it's more
minimalist, but it occurs to me that a lot of people
nowadays don't know about backticks, but they do know
of the modern way.

to make the code more readable, i have modernised it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-11 10:29:59 +01:00
Leah Rowe
5cfe54b06d Revert "inject.sh: put tmpromdel in xbtmp, not cache/"
This reverts commit a444910bf2.
2025-09-09 19:59:46 +01:00
Polarian
9d32af58eb Update arch dependencies
* unifont was split into pcf-unifont and psf-unifont
* mipsel packages have dropped the cross prefix

Signed-off-by: Polarian <polarian@polarian.dev>
2025-09-09 14:01:52 +01:00
Leah Rowe
269fa65b93 init.sh: write-protect the lock file on startup
you can still remove it with the -f flag on rm, but
xbmk only does that on exit from the main parent
instance, or after each build stage in release.sh

because of this, the user could still manually override
the lock file; this would cause running instances of lbmk
to restart wrongly as parent instances.

there's no way to fix any of this, but users don't normally
put -f in their rm commands.

however, this is also a preventative bug fix. if a bug
is ever caused in the future, where the lock file is
created erroneously, the write protection will prevent that,
so long as *it* is still done.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-09 11:56:36 +01:00
Leah Rowe
dea587a16f Revert "git/grub: use codeberg as the main mirror"
This reverts commit d06d6a1905.
2025-09-07 19:43:08 +01:00
Leah Rowe
c3e52bc2ee Revert "change grub git again"
This reverts commit 1e07c4eb02.
2025-09-07 19:37:23 +01:00
Leah Rowe
a00f4153c6 Revert "vendor.sh: put _pre_dest in xbtmp, not cache/"
This reverts commit 69934d18cc.
2025-09-07 19:13:50 +01:00
Leah Rowe
2873ed5e7e Revert "vendor.sh: put appdir in xbtmp"
This reverts commit 4c74311eae.
2025-09-07 19:13:36 +01:00
Leah Rowe
1e07c4eb02 change grub git again
this time to source hut.

for some reason, *grub* is slow no matter what repo
provider i host it on??

i tested srht just now, and it seems ok. let's use that.

i'm *paying* for this sourcehut account, so it better be
good!

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-07 18:33:21 +01:00
Leah Rowe
53491bdca2 tree.sh: don't combine remkdir/cd gnupath
it's stupid. separate them, to make the code readable.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-07 17:49:12 +01:00
Leah Rowe
c4cd9c08df release.sh: delete xbmkwd on src tarballs
the previously deleted tmp/ directory was a relic
from prior to recent tmpdir changes.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-07 17:45:36 +01:00
Leah Rowe
4c74311eae vendor.sh: put appdir in xbtmp
do away with redundant variable "vendir"

the "appdir" directory is for files extracted from
vendor updates, which are then further processed to
create the real files that we need, such as me.bin
images processed via me_cleaner.

thus, appdir should go in xbtmp.

the appdir currently clutters vendorfiles/, which is
not ideal.

we want it to be that the vendorfiles/ directory only
contains the final firmwares.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-07 17:34:24 +01:00
Leah Rowe
a444910bf2 inject.sh: put tmpromdel in xbtmp, not cache/
cache/ is meant for permanent cached files, not for
temporary files.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-07 17:28:19 +01:00
Leah Rowe
23fb10c3f5 mk: include mrc.sh before inject.sh
and vendor.sh before mrc.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-07 17:04:58 +01:00
Leah Rowe
69934d18cc vendor.sh: put _pre_dest in xbtmp, not cache/
XBMK_CACHE (cache/) is meant for permanently cached
files, not temporary files.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-07 15:26:35 +01:00
Leah Rowe
4475b4db4b init.sh/tree.sh: put PATH dirs in xbtmp
e.g. gnupath, xbmkpath

these currently go in XBMK_CACHE/, which is bad
because they're meant to be temporary.

XBMK_CACHE is for permanent files.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-07 15:24:02 +01:00
Leah Rowe
f5e8483f41 init.sh: bail if date is non-GNU (for now)
We currently use GNU-only options in the date command,
when initialising a Git repository.

This isn't a problem in practise, on non-GNU implementations
if not initialising a Git repository, because it's only
used in that situation.

In practise, only those systems with GNU coreutils and libc
are used to compile releases, so this is OK for me at least.

Future portability improvements will correct the issue, and
then this error check can be removed.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-07 14:20:21 +01:00
Leah Rowe
882a6917bc lib/init.sh: sanitize the version string
the release functions in release.sh rely on the
version string *not* being a path containing slashes.
just a single string e.g. "foo", not e.g. "foo/bar"

this is because several checks there make that
assumption. in practise, we always ensure that tags
and such do not contain these characters.

however, someone else working on their own version
of xbmk might not know of this design flaw, so let's
try to correct it in code.

we can add more filtering as designed, in the relevant
function (xbmk_sanitize_version).

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-07 14:06:57 +01:00
Leah Rowe
1c02f2a770 release.sh: put vdir in xmtmp, not XBMK_CACHE
XBMK_CACHE is meant for permanent cached files, not
temporarily files.

the temporary release files are copied upon successful
return, to their rightful place under release/

this new change also reduces the chance of race
conditions, if multiple xbmk instances are used; while
not yet supported as a use-case, this is a goal for a
future design change.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-07 13:37:02 +01:00
Leah Rowe
5096e0040f mk: hardened PWD check (deny symlinks)
we check if the first argument is "./mk" and bail if not,
which forces you to be in the xbmk work directory.

however, this check is flawed because symlinks were still
possible.

this patch prevents a same-named symlink "mk" pointing to
the real mk from being used.

this hardening is necessary, due to several built-in
assumptions inherent within the design of xbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-05 11:46:16 +01:00
Leah Rowe
d06d6a1905 git/grub: use codeberg as the main mirror
the gnu one is often really slow, for some reason.

use the official gnu mirror only as a backup.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-05 11:16:51 +01:00
Leah Rowe
92ecf145fa get.sh: put tmpgit in xbtmp
similar to the previous failed patch, which tried to
also generate it each time, but that led to issues.

this version of the same change merely maintains the
current hardcoding logic, while putting it in xbtmp.

that way, it's more robustly cleared upon exit from
the parent instance of xbmk.

this also reduces the chance of race conditions,
since it's in a unique place each time, rather than
going in XBMK_CACHE.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-05 03:59:50 +01:00
Leah Rowe
ddbefea475 Revert "get.sh: put tmpclone dirs in xbtmp"
This reverts commit 01a779d4eb.

This commit broke ./mk -d coreboot for vendor files in lbmk.
2025-09-04 15:27:20 +01:00
Leah Rowe
aa38608bff Revert "tree.sh: add missing colon at the end of trees()"
This reverts commit 568887cd5e.

This commit broke ./mk -d coreboot for vendor files in lbmk.
2025-09-04 15:27:07 +01:00
Leah Rowe
f6d5b44757 Revert "vendor.sh: looser error handling on find_me"
This reverts commit c9a81292e5.

This never caused actual issues. Keep it strict.
2025-09-04 15:26:56 +01:00
Leah Rowe
c9a81292e5 vendor.sh: looser error handling on find_me
i added a stricter check recently, but this broke
extraction on fresh lbmk clones, tested when doing
a release-build test.

loosen it up again, but only for find_me

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-02 07:37:32 +01:00
Leah Rowe
769d645c2a init.sh: create separate lock in release dirs
this removes the current hackiness, preventing
build errors since xbtmp is now based on xbmkpwd,
which changes when we're in the release dir.

XBMK_RELEASE is still set accordingly, so this
will still work the same way.

this is also cleaner in general.

XBMK_CACHE is still the same, so the release work
directory still re-uses files from the main work
directory, rather than re-creating them.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-02 07:01:24 +01:00
Leah Rowe
568887cd5e tree.sh: add missing colon at the end of trees()
this is because when using chained commands at the end
of functions, sometimes you have to explicitly terminate
the line.

the way i do it in this patch is common across the
build system, to mitigate this sh quirk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-02 06:49:38 +01:00
Leah Rowe
01a779d4eb get.sh: put tmpclone dirs in xbtmp
and generate them, don't hardcode them - this reduces
the chance of race conditions, which we have seen in
the past and which current execution flow in xbmk even
mitigates in a few places, by doing things in a certain
order.

this change makes the code more robust and easier to
maintain.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-02 06:33:31 +01:00
Leah Rowe
0d107ad872 xbmk: remove xbloc, re-use xbtmp instead
we no longer separate them. xbloc was the on-disk
tmp directory, whereas xbtmp used to be in /tmp
which we assumed to be tmpfs (it may not be, but
often is on many workstation setups - and our
documentation recommended doing this).

as mentioned in the previous commit, benchmarking
shows little speed difference using tmpfs /tmp
versus on-disk /tmp, for our purposes at least.
therefore, the handling of tmp files is being
greatly simplified.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-02 06:29:20 +01:00
Leah Rowe
64b69907ab init.sh: put TMPDIR inside xbmkpwd, not /tmp
This way, all operations will be done inside the xbmk
work directory. This is being done, so that I can then
reliably sandybox certain commands in future commits,
for example the "rm" command.

This will also allow me to unify the location of all
temporary files, in future commits. I previously used
the /tmp directory because it's tmpfs-based on many
setups, and this is great for performance. However, in
practise, I never noticed any difference in performance
when benchmarking it (testing /tmp on-disk versus tmpfs).

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-02 06:02:57 +01:00
Leah Rowe
8a8be1dec9 get.sh: remove unnecessary variable, repofail
it is entirely unused

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-02 04:02:49 +01:00
Leah Rowe
3af4c7bcb1 rom.sh: simplify rmodtool copy handling
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-02 03:35:48 +01:00
Leah Rowe
bec4c63b25 release.sh: remove support for the -d flag
this lets you change the directory for outputted
release files, versus the default "release" directory.

this code is buggy, because it could let you overwrite
a part of xbmk or worse - and checking for such bad
usage would require a lot more code.

knobs are for nobs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-02 03:31:34 +01:00
Leah Rowe
e059614589 get.sh xbget: don't use eval for file/dir checks
the actual code works fine, but it's quite hacky.

there are times when use of eval is acceptable; this
is not one of those times, but i'd used it in this
instance when i was being a bit crazy about code size
reductions during my audits.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-02 03:26:26 +01:00
Leah Rowe
934e89510e vendor.sh: remove unnecessary error check
setting a variable in this way will never result in
an error. this is a relic from a prior re-factoring
versus older versions of the code.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-02 00:19:37 +01:00
Leah Rowe
b1f485d0f2 release.sh: fix broken release lock file handling
we need to copy the main lock file, rather than creating
a new, empty one. this is because the new lock file
handling requires it, and the release lock file will
be used during release builds.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-01 08:46:20 +01:00
Leah Rowe
ed84d33e59 lib.sh and rom.sh: stricter mktemp usage
error out under fault condition

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-01 08:14:49 +01:00
Leah Rowe
40f064ae33 inject/vendor.sh: stricter set + usage
set - as soon as possible, for example in the extract_me
function.

we only turn off error handling when certain error-prone
tasks are performed, and mitigations are in place after
these commands run to make sure that the result was valid.

this is because in some cases, we want certain buggy behaviours
to be permitted, with errors handled in a more fine-tuned way,
because sh can sometimes be much stricter depending on the
implementation; otherwise, we almost always rely on -e -u in
most of the build system.

this mainly affects the vendorfile insertion logic.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-09-01 07:08:47 +01:00
Leah Rowe
24a8226fee init.sh: tidy up xbmk_set_env
this is a general function that sets variables,
but there are many types of variables to be set.

rather than have all the logic inside this function,
handle it in subfunctions called by xbmk_set_env.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-31 21:37:30 +01:00
Leah Rowe
7c04cd37b5 init.sh: tidy up xbmk_child_set_tmp
the checks of xbmk cache/threads is unrelated.

this has been moved back to the calling function.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-31 21:33:00 +01:00
Leah Rowe
2d20be3d99 init.sh: remove unnecessary lockfile checks
we don't need these anymore, because we now know
whether or not the lock file exists in these cases.

this is because child/parent instance determination
is now done based on the presence of that file, rather
than how TMPDIR is set; and TMPDIR is now set accordingly,
via more robust logic as in previous patching.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-31 21:30:29 +01:00
Leah Rowe
c148b220d8 init.sh: move TMPDIR handling to own functions
this makes xbmk_set_env easier to read

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-31 21:28:12 +01:00
Leah Rowe
f96bf2b2cd init.sh: prevent race condition with TMPDIR
it is extremely unlikely to occur, but this patch reduces
the likelihood even further. that unlikely occurance is:

when creating a TMPDIR, it's possible that it was already
created before. this is OK on child instances, where that
is the intended behaviour (unified TMPDIR), but not for
parent instances.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-31 20:39:07 +01:00
Leah Rowe
bbce74d78a init.sh: MUCH safer TMPDIR handling
we previously checked whether xbmk was running a child
instance, based on the initialisation of TMPDIR, but
this relied on unreliable string substitutions, which
could not be made inherently reliable. there were also
no checks on whether the given TMPDIR, even if correct,
was a directory or whether it was a symlink; there were
also no checks on whether it changed.

now with this change, child instances are detected by
the presence of the lock file. the parent instance
writes the generated TMPDIR location in that file, and
this is checked again in the child instance, to ensure
that the TMPDIR didn't change; it also errors out if
the TMPDIR doesn't exist or if it is a symlink.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-31 20:25:00 +01:00
Leah Rowe
ad58364e18 mk: simplify the main script check
it's still not perfect, but now it's unambiguous.

the previous generic check was written based on the
fact that xbmk's main script used to also be called
via several symlinks, which is no longer the case.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-31 18:27:09 +01:00
Leah Rowe
09646783a5 config/dependencies: add --no-install-recommends
use this on the debian dependencies, otherwise it installs
a bunch of extra crap e.g. xorg crap, in some circumstances,
which someone probably won't want when they're in a minimal
chroot or something.

reported by ron nazarov. thank you ron!

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-30 07:22:38 +01:00
Leah Rowe
d9011da0eb inject.sh: redirect stderer to /dev/null FIRST
for the grep command, we must ensure that errors are
suppressed *BEFORE* outputting to a file. depending
on the sh implementation, the previous code might
have begun outputting to a file before suppressing
errors.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-29 04:44:52 +01:00
Leah Rowe
50a0bac01c vendor.sh: tidy up extract_intel_me
too many chained commands. break it out a bit.

this makes it more readable, without changing behaviour.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-26 07:01:35 +01:00
Leah Rowe
9fb707b49b rom.sh: safer use of cat in copyps1bios
the output to a file also has its own error handling,
but x_ can be used safely to provide additional assurance
that the script will break if an error occurs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-23 18:31:33 +01:00
Leah Rowe
89238c0579 tree.sh: tidy up check_cross_compiler
group related operations together, without whitespace.

declare all variables at the start of the function.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-23 17:38:29 +01:00
Leah Rowe
07562e3f28 tree.sh: don't re-check xgcc needlessly
instead, create a file indicating that a given xgcc
target had already been built successfully, within a
given coreboot tree.

this will considerably speed up the building of release
archives, especially when there are a lot of boards.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-23 16:02:40 +01:00
Leah Rowe
66f1be1ba7 tree.sh: check xgcc AFTER checking elfdir
if e.g. elf/coreboot/default/w500_16mb contains readied
images from before, crossgcc is still being checked.

if you already built all the coreboot images, and wanted
to just modify all the payloads for example, this would
result in a much slower re-build process, because it is
needlessly re-checking crossgcc every time.

by doing it this way, we need up the testing of payloads
quite considerably, during xbmk development.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-23 15:49:10 +01:00
Leah Rowe
c12965f8e4 lib.sh: safer pad_one_byte function
instead of copying to a temp file and then
concatenating with padding back to the main
file, we concatenate and create the temp file,
then move the temp file back to the main file.

this is because cat can be quite error prone,
more so than mv, so this will reduce the chance
of corrupt files being left behind depending
on the context (of course, the latter is often
avoided due to xbmk's design, which emphasises
use of temporary files first).

this matches the same design used in the function
unpad_one_byte, which creates the deconcatenated
output in a temporary file first, moving it back.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-23 15:38:29 +01:00
Leah Rowe
7e6f52ec0a vendor.sh: use pad/unpad functions
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-23 03:59:35 +01:00
Leah Rowe
616ef52a6f lib.sh: additional error handling on cat
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-23 03:48:27 +01:00
Leah Rowe
41945a2220 tree.sh: Delete files *before* updating hashes
The current logic deletes old project files e.g. sources,
but *after* updating the project hash.

This means that if a deletion fails, and the directory
is still there (e.g. src/coreboot/default/) afterward, it's
now a tainted archive, yet the hash has been updated, so
subsequent runs of the build system will cause unknown
errors.

This patch fixes that, by first copying the new hash to
a temporary file. *Then*, deletions are handled, and the
final hash file is updated afterward.

The code is now a bit more bloated as a result, but this will
reduce the risk of tainted sources being handled under fault
conditions.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-10 14:50:32 +01:00
Leah Rowe
d44c143846 tree.sh: rename hashtype to hashname
since it's the name, e.g. "default", referring to a
project tree (in this example, coreboot/default).

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-10 14:17:57 +01:00
Leah Rowe
289c4e1c2f tree.sh: rename hashname to hashdir
since it's only ever used as a directory name

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-10 14:15:55 +01:00
Leah Rowe
b31f2387ee tree.sh: rename hashvar to badhashvar
now the code that uses it makes a bit more sense
to the casual reader.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-10 14:13:47 +01:00
Leah Rowe
2c24b94d80 tree.sh: rename function and remove comments
the new function names make the comments redundant. the
code is now self-explanatory.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-10 14:12:48 +01:00
Leah Rowe
ef79b11082 tree.sh: don't delete builds if tree==target
in that case, the previous tree-wide check will cover
it, so the current logic wastes computational time.

this patch therefore somewhat optimises the code.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-04 09:33:33 +01:00
Leah Rowe
1c5c28f2cb tree.sh: re-add comments to check_hashes
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-04 09:16:58 +01:00
Leah Rowe
3d5a6bccae tree.sh: unified project hash handling
the target/project hash checks are basically identical,
so let's unify them under a single function.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-02 11:31:28 +01:00
Leah Rowe
a499d5bba2 rom.sh: Don't run mkhelpers if release=n
This fixes the following error on ./mk release:

cp: cannot stat 'elf/coreboot/default/d510mo/libgfxinit_txtmode/coreboot.rom': No such file or directory

I recently re-wrote the handling of coreboot images, and
I overlooked this entirely. When a given target specifies
release=n, it has to be skipped, so builds are not done.

The "release" variable is already checked, in mkcoreboottar.

Let's also put it in the other mkhelper functions, to make sure
there are no errors.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-08-01 05:32:25 +01:00
Leah Rowe
84a1ff85b0 coreboot/default: rev 9e41c7cec7, 18 July 2025
T480/T480s patches were dropped since they're included as
part of the upstream code now.

This update brings the following upstream changes:

* 9e41c7cec7 soc/intel/cmn/block/fast_spi: Lock DMA before exiting coreboot
* c1d45ef93b mb/google/trulo/var/kaladin: Update touchpad settings
* f13f980e03 mb/google/trulo/var/kaladin: Add fw_config probe for storage
* 50c39b3a22 mb/google/trulo/var/kaladin: Fix Type C function
* f0d50aa404 commonlib/include/commonlib: Add volatile qualifier
* 3828153ea5 soc/intel/xeon_sp/gnr: Use official microcodes
* a87cbcd3c9 soc/intel/xeon_sp/ibl: Config ACPI base using PMC device
* 480ac15044 util/cbfstool: Prevent overflow when sorting fit table entries
* bf4f08f3b6 mb/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff: early VGA output
* dd19f6bc5a util/cbmem: Extract devmem and common code to separate files
* def945f3ba soc/intel/apollolake: Measure the IBBL, IBB and OBB from the bootblock
* fbb0738272 mb/google/brox/var/lotso: Decrease cpu power limits
* ce88b12420 mb/google/ocelot: Set correct TPM I2C bus for all ocelot model variants
* e050e2fbfc mb/google/ocelot/var/ocelot: Remove irrelevant comment
* b66c8ea3d3 mb/google/ocelot/var/ocelot: Remove Bluetooth Audio offload
* d5d633f607 mb/google/ocelot/var/ocelot: Update variant.c
* 3b069d320c cbfs: Add a function to wait for all CBFS preload operations to complete
* a7710ed8fd Documentation: coding_style: Add *long* to long multi-line comment example
* 19d7104d85 drivers/intel/touch: Use recommended short multi-line comment style
* 451988d015 mb/google/trulo/var/pujjolo: Fix Goodix touchscreen function
* 542e52c126 soc/qualcomm/x1p42100: Optimize memory layout for X1P42100
* 2e47bd50f2 mb/google/trulo/var/pujjocento: Add 6W and 15W DPTF parameters
* 6e4f4538bb soc/intel/{tgl,adl,mtl,ptl}: Default to Software Connection Manager
* 1b8dd662a9 soc/qualcomm/x1p42100: Add PCIE Clock support for x1p42100
* 4d3def7514 soc/mediatek/mt8189: Fix timer reset in BL31 by using time_prepare_v2
* d898653b0e soc/meidatek/mt8196: Extract common timer code for reuse
* d1c096a5b9 src/soc/mt8196: Correct systimer register offset
* edaa67d0c9 mb/google/skywalker: Add thermal init flow in romstage
* 6aec09875b soc/mediatek/mt8189: Add thermal driver
* 5cc4b9e6ce soc/amd/common/cpu/noncar: Add bootblock overlap detection
* 67cd138df9 soc/intel/apollolake: Add missing header in measured_boot.h
* a428481574 mb/google/nissa/var/dirks: Update power limits
* 55ae0d8a37 mb/google/nissa/var/baseboard/nissa: Add power limits functions
* 82163aedc6 soc/amd/common/block/cpu/noncar: Move BSS and DATA out of PT_LOAD
* 6405641647 mb/google/fatcat: Use same mainboard part number for all fatcat variants
* c5613469ae device: Make a note that SeaBIOS doesn't support above 4G MMIO
* ced4c09359 soc/intel/xeon_sp/gnr: Implement get_mmio_high_base_size
* 7100f226ca vc/intel/fsp/fsp2_0/wcl: Add FSP headers for WCL FSP
* 5171098814 drivers/qemu/bochs: Allow building for non-x86 architectures
* d233b6c903 payloads/external/LinuxBoot/Makefile: Fix build prerequisite
* 502d19be89 payloads/external/LinuxBoot/targets/u-root.mk: Add missing prerequisite
* cba0f0b8b9 payloads/external/LinuxBoot: Rename build target
* 43a54e3b1b util/amdfwtool: Add binary parsing
* 85da3954d0 .gitmodules: Ignore changes make by what-jenkins-does
* 397c5fe420 Documentation: Add a mainboard entry for the Lenovo T480/T480s
* 6768586353 Documentation: Add information about the deguard utility
* ad8b738af0 mb/lenovo: Add ThinkPad T480 and ThinkPad T480s
* 96e381766e ec/lenovo: Add support for MEC1653 EC
* 2181b02765 util/smmstoretool: Properly initialise the authenticated variable header
* 3058464263 util/smmstoretool: Add support for creating variable from file contents
* b49f567e45 util/smmstoretool: Ensure that the FVB header isn't too large
* a6fbaa47ea util/smmstoretool: Clarify the `auth_vars` field
* 3698517d82 mb/amd: Use mec152x tool
* 5a0953614b util/amdtools: Add ec_usb_pd_fw
* e63620012c util: Add Microchip EC FW tool
* 0b5ce9d9f0 soc/intel/apollolake: Add support for IFWI Measured Boot
* 289cff3423 soc/intel/apollolake: Load the IBB into CAR
* 2408695dd3 soc/intel/apollolake: Add a loader for the IBB
* 61b66e9a81 soc/intel/apollolake: Add function to clear MCA in Bank 4
* 138402e7ff soc/intel/apollolake: Create IBB, IBBL and OBB
* 61b4e1983c mb/google/fatcat: Update PCH reset power cycle duration to 1 second
* e9af95d5ab soc/intel/pantherlake: Configure FSP UPDs for minimum assertion widths
* 79bd154b49 drivers/genesyslogic/gl9763e: Mask replay timer timeout of AER
* a775bfc2b2 soc/mediatek/mt8189: Specify MTKLIB_PATH for building BL31
* e583b2ffb7 soc/meidatek/mt8196: Extract common thermal code for reuse
* f62734976c mb/dell: Convert E6400 into a variant
* 8d60bf9975 mb/google/fatcat: select MIPI pre-prod if PTL pre-prod SoC is set
* 2f978ecab3 mb/google/fatcat: Choose platforms with pre-prod Panther Lake SoC
* eb1483ba17 soc/mediatek/mt8189: Increase SCP clock frequency from 26MHz to 416MHz
* 9c5557f982 util/abuild: Add --sequential-boards option
* 9e5234feee payloads/external/edk2: Drop our toolchain override
* 8d9e18a122 payloads/edk2: Indicate whether edk2-platforms is available
* 626fd50a94 mb/google/fatcat/var/kinmen: Enable ISH
* e7cefe4f41 soc/mediatek/mt8196: Move srclken_rc related code to common
* e9731f8925 soc/intel/pantherlake: Add configs for pre-production silicon
* 8687b3d108 mb/google/trulo/var/pujjolo: Add ISH firmware config
* 722c9314c7 mb/google/dedede/var/awasuki: Add 2 HYNIX modules to RAM id table
* 6082bd7711 ec/lenovo/h8: Rework invalid temperature reporting
* 621b1061d0 ec/lenovo/h8: Add Kconfig to select use of Thermal Zone 1
* bc116b8797 ec/lenovo/h8: Replace chip regs for BT/WWAN detect with Kconfig options
* d9169ef617 ec/lenovo/pmh7: Add CFR objects for existing options
* 45d9973a6d ec/lenovo/h8: Add CFR objects for existing options
* ce5a1e8a51 mb/google/brox: Create caboc variant
* d745d38393 soc/intel/cmn/block/fast_spi: Add DMA support
* 8e666c367d soc/qualcomm/x1p42100: Update boot critical firmware memory layout
* e35c784847 Doc/gfx/libgfxinit.md: Fix file names in source code references
* 0e682859e7 payloads/external/U-Boot: Upgrade from 2024.07 to v2025.07
* 8b52167a9f arch/x86: Add support for cooperative multitasking on x86_64
* 569b7a8861 Docs/releases: Finalize 25.06 release notes
* 5db8bf0cfa mb/trulo/var/pujjolo: Enable USB3 WWAN device
* e013c9586c mb/trulo/var/pujjolo: Modify mipi camera parameters
* 7b8520ab69 mb/trulo/var/pujjolo: Update fingerprint enable pin status
* f74027d5ae mb/google/nissa/var/craask: Add elan touchscreen support
* 396a883a0c mb/hp/snb_ivb_desktops: Include PS/2 controller ASL code for MS Windows
* 18c067d392 mb/google/fatcat/var/kinmen: Add Synaptics touchpad
* 2f5b384ba5 soc/mediatek/mt8189: Enable EARLY_MMU_INIT to improve boot time
* d5bce8c420 mb/hp: Add HP 260 G1 DM Business PC (Haswell)
* 48c6f66fa4 mb/google/ocelot: Update TPM_TIS_ACPI_INTERRUPT value in Kconfig
* 0660fe50de mb/google/ocelot: Update GPE configuration
* 5b3063802e mb/google/fatcat/var/kinmen: Fix touchscreen IRQ setting
* 6c4e502fdd mb/google/nissa/var/pujjocento: Reduce PL4 to 38W with no battery
* 6e92554ab6 mb/trulo/var/pujjolo: Modify FW_CONFIG for mipi camera
* 4f5f75da34 mb/trulo/var/pujjolo: Correct USB3 Type-A OC pins
* a1dfd39e04 mb/google/fatcat/var/kinmen: Add AUDIO_UNKNOWN and probe for ALC721
* 306544b427 mb/google/fatcat/var/francka: Add AUDIO_UNKNOWN and audio probes
* edf47d44cd mb/google/fatcat/var/fatcat: Disable Audio for invalid Audio FW_CONFIG
* 454079c3bc lib/cbfs: Ensure cache buffer alignment in ramstage
* 0ef670a66a mb/google/ocelot/var/ocelot: Configure FPS related changes
* 6ab37f0e0e mb/google/ocelot/var/ocelot: Add FW_CONFIG for Finger Print
* 3f61df24d5 mb/google/ocelot/var/ocelot: Add FW_CONFIG for Storage
* bb95a26cda mb/google/ocelot/var/ocelot: Add FW_CONFIG for WiFi
* 410b3c697f mb/google/ocelot/var/ocelot: Add FW_CONIG for ISH
* afaf4c3d7b mb/google/brya/variants/pujjolo: Update ISH GPIOs and add ISH firmware name
* f6de6f8933 mb/google/fatcat: Drop redundant SNDW GPIO mapping
* 584fdd6572 soc/mediatek/mt8196: Remove redundant bootblock.c from Makefile.mk
* 24ea6937f2 soc/intel/apollolake: Add the Kconfig options for IFWI Boot Profile
* c68645cd88 util/supermicro: Fix mem leak in get_line_as_int error conditions
* 05396238da libpayload/drivers: Fix mem-leak in cbmem_console error condition
* 1219981177 drivers/emu/qemu: Add a comment about fw_cfg assumptions
* d866e72b3a mb/google/fatcat/var/kinmen: Set CRFP to use GPIO for status
* 4367daae20 drivers/spi: Add option to generate proper PowerResource _STA
* 03c331399c mb/google/nissa/var/craask: Add focaltech touchscreen support
* b3d7c40fb5 mb/siemens/mc_rpl: Remove code for board_id
* 5de16ed1b8 mb/siemens/mc_rpl: Remove unused embedded controller code
* a1067ec6de mb/siemens/mc_rpl: Remove unneeded code to select a VBT name in CBFS
* 463cda84d2 mb/siemens/mc_rpl: Remove unused Type-C data definition
* dcbe591201 mb/siemens/mc_rpl: Use SPD data from HWInfo instead of from CBFS
* 6c059f8af3 IVB mainboards: Drop 1024M option for gfx_uma_size
* 3b61dbaa06 mb/asus/p8z77-m_pro: Remove incorrect gfx_uma_size options
* 2b7115b139 mb/hp/snb_ivb_desktops: Add gfx_uma_size options up to 512MB
* d99769bbde mb/hp/snb_ivb_desktops/variants: enable 4th sata port on tested models
* 95784dbafb mb/google/ocelot/var/ocelot: Add FW_CONFIG for Audio
* f323adb19f soc/mediatek/mt8189: Increase SPI NOR clock rate from 26MHz to 52MHz
* 689af47b52 commonlib: Add pvmfw related timestamps
* f1d06a5ad4 soc/intel/common/block/memory: Provide a way to use SPD data from memory
* 11b1dc0a97 Reapply "util/cbmem: Consolidate CBMEM and coreboot table access"
* 13f1c6118e Documentation: Update cbmem.md with more information
* 07267d19ce arch/x86/postcar_loader: Add comment line for reloc_params assignment
* e94ac6e655 mb/google/nissa/var/pujjocento: Reduce PL4 to 38 W with no battery
* 2eaec1b53a sbom: Fix build with merged bootblock and romstage
* 267f08dafd MAINTAINERS: Add KunYi Chen as maintainer for LattePanda Mu

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-23 04:09:47 +01:00
Leah Rowe
cc2f08e7bb Revert "coreboot: rev 8b52167a9f 13 July 2025, rebase t480"
This reverts commit 32dfdfbb01.

The update caused an issue on T480:

Backlight comes on, then off, then on, then off, repeatedly, and
never gets to the payload. Will have to investigate further.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-14 11:26:58 +01:00
Leah Rowe
32dfdfbb01 coreboot: rev 8b52167a9f 13 July 2025, rebase t480
coreboot/default: update t480 patches to set 38

see: https://review.coreboot.org/c/coreboot/+/83274/38

I was previously using:
https://review.coreboot.org/c/coreboot/+/83274/25

Matt DeViller aka MrChromeBox, recently took over the
patch set, tidying up and re-factoring the code so that
it's more suitable for upstream. Several hacky behaviours
were removed, for example the MEC1663 code is now its own
code in coreboot, rather than being bolted onto the H8s code.

Certain T480-specific changes made to global parts of the
coreboot code are now done only on the tree itself.

Mate Kukri has also tested Matt's recent updates. More
testing still needed on Nvidia dGPU models, which never
worked before anyway; Intel GPU models should still work.

Thermas zone handling is also improved. See patch:
https://review.coreboot.org/c/coreboot/+/88415/1
https://review.coreboot.org/c/coreboot/+/88416/2

Functionally, this is mostly the same as before. As I said,
Matt has focused on code cleanup, so that the board can be
properly upstreamed. Hopefully this will be merged soon,
in coreboot-main.

Besides this, the following upstream changes were imported:

* 8b52167a9f arch/x86: Add support for cooperative multitasking on x86_64
* 569b7a8861 Docs/releases: Finalize 25.06 release notes
* 5db8bf0cfa mb/trulo/var/pujjolo: Enable USB3 WWAN device
* e013c9586c mb/trulo/var/pujjolo: Modify mipi camera parameters
* 7b8520ab69 mb/trulo/var/pujjolo: Update fingerprint enable pin status
* f74027d5ae mb/google/nissa/var/craask: Add elan touchscreen support
* 396a883a0c mb/hp/snb_ivb_desktops: Include PS/2 controller ASL code for MS Windows
* 18c067d392 mb/google/fatcat/var/kinmen: Add Synaptics touchpad
* 2f5b384ba5 soc/mediatek/mt8189: Enable EARLY_MMU_INIT to improve boot time
* d5bce8c420 mb/hp: Add HP 260 G1 DM Business PC (Haswell)
* 48c6f66fa4 mb/google/ocelot: Update TPM_TIS_ACPI_INTERRUPT value in Kconfig
* 0660fe50de mb/google/ocelot: Update GPE configuration
* 5b3063802e mb/google/fatcat/var/kinmen: Fix touchscreen IRQ setting
* 6c4e502fdd mb/google/nissa/var/pujjocento: Reduce PL4 to 38W with no battery
* 6e92554ab6 mb/trulo/var/pujjolo: Modify FW_CONFIG for mipi camera
* 4f5f75da34 mb/trulo/var/pujjolo: Correct USB3 Type-A OC pins
* a1dfd39e04 mb/google/fatcat/var/kinmen: Add AUDIO_UNKNOWN and probe for ALC721
* 306544b427 mb/google/fatcat/var/francka: Add AUDIO_UNKNOWN and audio probes
* edf47d44cd mb/google/fatcat/var/fatcat: Disable Audio for invalid Audio FW_CONFIG
* 454079c3bc lib/cbfs: Ensure cache buffer alignment in ramstage
* 0ef670a66a mb/google/ocelot/var/ocelot: Configure FPS related changes
* 6ab37f0e0e mb/google/ocelot/var/ocelot: Add FW_CONFIG for Finger Print
* 3f61df24d5 mb/google/ocelot/var/ocelot: Add FW_CONFIG for Storage
* bb95a26cda mb/google/ocelot/var/ocelot: Add FW_CONFIG for WiFi
* 410b3c697f mb/google/ocelot/var/ocelot: Add FW_CONIG for ISH
* afaf4c3d7b mb/google/brya/variants/pujjolo: Update ISH GPIOs and add ISH firmware name
* f6de6f8933 mb/google/fatcat: Drop redundant SNDW GPIO mapping
* 584fdd6572 soc/mediatek/mt8196: Remove redundant bootblock.c from Makefile.mk
* 24ea6937f2 soc/intel/apollolake: Add the Kconfig options for IFWI Boot Profile
* c68645cd88 util/supermicro: Fix mem leak in get_line_as_int error conditions
* 05396238da libpayload/drivers: Fix mem-leak in cbmem_console error condition
* 1219981177 drivers/emu/qemu: Add a comment about fw_cfg assumptions
* d866e72b3a mb/google/fatcat/var/kinmen: Set CRFP to use GPIO for status
* 4367daae20 drivers/spi: Add option to generate proper PowerResource _STA
* 03c331399c mb/google/nissa/var/craask: Add focaltech touchscreen support
* b3d7c40fb5 mb/siemens/mc_rpl: Remove code for board_id
* 5de16ed1b8 mb/siemens/mc_rpl: Remove unused embedded controller code
* a1067ec6de mb/siemens/mc_rpl: Remove unneeded code to select a VBT name in CBFS
* 463cda84d2 mb/siemens/mc_rpl: Remove unused Type-C data definition
* dcbe591201 mb/siemens/mc_rpl: Use SPD data from HWInfo instead of from CBFS
* 6c059f8af3 IVB mainboards: Drop 1024M option for gfx_uma_size
* 3b61dbaa06 mb/asus/p8z77-m_pro: Remove incorrect gfx_uma_size options
* 2b7115b139 mb/hp/snb_ivb_desktops: Add gfx_uma_size options up to 512MB
* d99769bbde mb/hp/snb_ivb_desktops/variants: enable 4th sata port on tested models
* 95784dbafb mb/google/ocelot/var/ocelot: Add FW_CONFIG for Audio
* f323adb19f soc/mediatek/mt8189: Increase SPI NOR clock rate from 26MHz to 52MHz
* 689af47b52 commonlib: Add pvmfw related timestamps
* f1d06a5ad4 soc/intel/common/block/memory: Provide a way to use SPD data from memory
* 11b1dc0a97 Reapply "util/cbmem: Consolidate CBMEM and coreboot table access"
* 13f1c6118e Documentation: Update cbmem.md with more information
* 07267d19ce arch/x86/postcar_loader: Add comment line for reloc_params assignment
* e94ac6e655 mb/google/nissa/var/pujjocento: Reduce PL4 to 38 W with no battery
* 2eaec1b53a sbom: Fix build with merged bootblock and romstage
* 267f08dafd MAINTAINERS: Add KunYi Chen as maintainer for LattePanda Mu

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-14 03:19:31 +01:00
Leah Rowe
122d009af1 coreboot/default: probe EDID twice in libgfxinit
this mitigates buggy video converters e.g. displayport
to hdmi, where sometimes the display doesn't come up.

sometimes you have to probe them twice. this is apparently
what linux does, according to nicholas chin's interpretation.

this is a really quick and dirty patch that worked for
Noisytoot on IRC, tested on their Dell OptiPlex 5050 SFF
which they are porting; the port otherwise works, and this
patch enables them to use their displayport adapter.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-13 15:21:46 +01:00
Leah Rowe
dac3d6d06a rom.sh: Don't build coreboot utils if dry=":"
This fixes a build error when doing ./mk release, after
a regression caused by the last few commits.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-10 10:43:53 +01:00
Leah Rowe
6f7525a5b3 cache coreboot builds in elf/ again
This was a problem when I did it before, because individual
target builds weren't automatically re-compiled when needed.

The recent design improvements in lbmk enable this to be
done again.

Cached images in elf/ have no payloads, so they are a liability,
therefore they are padded by one byte to prevent flashing. This
solves the problem that the previous caching had.

With this change, modifying payloads can be tested without
needing to re-build coreboot each time.

The cached coreboot builds are also automatically re-built when
needed, which is another improvement this time, compared to
the last time coreboot builds were cached in this manner.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-10 04:26:31 +01:00
Leah Rowe
7c6c9ff547 tree.sh: delete individual target builds if needed
Detect when a config changes. This is done even if the
entire tree doesn't change.

This is already done per-tree if files change, but
individual project files don't change.

For example, if a grub.cfg changes, the given cached
build for that GRUB tree isn't deleted. Same thing if
a given U-Boot config doesn't change.

This patch fixes a longstanding design flaw of lbmk,
making auto-re-builds more reliable. This complements
another recent change, that deletes all target builds
of a given tree when the tree changes.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-10 02:00:13 +01:00
Leah Rowe
fb95230a4c tree.sh: Remove redundant deletion
Target builds go inside a common directory for
the given tree now, which gets deleted, thus
deleting all target builds of that given tree.

Therefore, the deletion being removed is redundant.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-10 01:07:55 +01:00
Leah Rowe
e25bca2ef7 T480/T480: Drop redundant PcieRpEnable from dt
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-08 17:57:53 +01:00
Leah Rowe
cc82b733d3 tree.sh: Place target builds under tree/target/
as opposed to target/

for example:

image the command:

./mk -b u-boot amd64coreboot

This would put the U-Boot binaries here:
elf/u-boot/amd64coreboot/default/

With this change, they now go here:

elf/u-boot/x86_64/amd64coreboot/default/

This solves a problem that existed previously, where
you could modify a given tree in a multi-tree project,
but cached builds for targets branching separately off
of each tree would not be deleted, and thus not re-built.

This accomplishes such a result, without needing to
further check hashes of individual targets.

The latter will still be done, in a future change, because
this change doesn't fix another problem:

If you change a given config, e.g. targetname "foo" which
uses tree "bar", elf/foo/ would not be removed automatically
for re-build.

So this change only deletes individual target builds when
their master tree changes.

Where the target and tree are the same, this also means
elf/tree/target/

for example: seabios/default would create binaries in:

elf/seabios/default/default/

not:

elf/seabios/default/

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-08 13:38:59 +01:00
Leah Rowe
9541dfcefa rom.sh: bump pcsx-redux copyright date to 2025
it's 2019-2025 now, not 2019-2024, because i recently imported
new pcsx-redux upstream changes that go up to June 2025.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-08 10:39:54 +01:00
Leah Rowe
91a63ccd1f hppro3500: enlarge CBFS to match the BIOS region
i enlarged the BIOS region in a previos commit, but I forgot
to enlarge CBFS. it's the policy of lbmk to enlarge CBFS when
possible, after applying a truncated ME configuration.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-08 01:59:13 +01:00
Leah Rowe
ed839db0a0 pcsx-redux: bump rev 8f8cc3d5, 20 June 2025
Many other changes were imported into the wider pcsx-redux
tree, but we're mainly concerned with the OpenBIOS diffs.

This update brings in the following upstream changes, for
PCSX-Redux OpenBIOS:

* 35de25bb Fixing realloc's edge case.
* b8a9080d OpenBIOS: Annotate sio0/driver.c with enums
* c7cec91e OpenBIOS: Refactor card driver
* 4e42a6b6 Move OpenBIOS SIO to a seperate header and add enums
* a50434c5 Remove OpenBIOS dead sio1 code
* 9c3d3a1e Renaming readAligned to load32Aligned.
* 1b8312e5 [Chores] Format code
* 8b9df484 Simplifying openbios allocation scenario.
* a658a18d Brand new memory allocator.
* ba48f01b Bumped copyright date to 2025
* 64b63a13 Bumped copyright date to 2025
* 3ada28e3 [Chores] Format code
* d25af104 Fixing setjmp/longjmp attributes.
* e51ffafa Assign _bu_init alias to 0x55.
* ae1dd51e Split out the common thread structures to its own file.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-06 21:07:19 +01:00
Leah Rowe
dd65f55b29 coreboot/default: bump rev 812d0e2f62, 5 Apr 2025
There are *many* excellent changes. These changes are of note,
for Haswell mainboards (raminit improvements, courtesy Angel Pons):

* d5854e4139 Haswell NRI: Implement COMP offset optimisation
* f14880934b Haswell NRI: Use final timings after basic training
* ab29f52ee2 Haswell NRI: Measure per-task execution time
* 4ae9a79d8d Haswell NRI: Remove unused `SPD_LEN` define
* 0c5286ba34 Haswell NRI: Tidy up REUT subsequence programming
* 7766228798 Haswell NRI: Deduplicate PCODE mailbox functions

My GMP fixes have been removed, because upstream did
similar fixes which accomplish the same result.

This brings in the following upstream changes:

* 812d0e2f62 Documentation/lib: Update Timestamp documentation
* d461627668 payloads/Kconfig: Allow compression for Linux payloads
* f3ca3aa16b util/cbfstool/cbfs-payload-linux: Copy segments when compression fails
* 29440057b0 mb/starlabs/{adl_n,twl}: Don't use the IOT FSP
* eaf76d2dd1 vc/intel/fsp2_0/twinlake: Update FSP headers
* d5854e4139 Haswell NRI: Implement COMP offset optimisation
* 2739c4b773 SBOM: Change makefile to get versions from build.h
* a4156f99ff soc/intel/ptl: Add Wildcat Lake CPU ID to platform reporting
* 9f73b04074 soc/intel/pantherlake: Add new MCH ID for Wildcat Lake
* 167c771bc5 mb/google/fatcat/var/francka: Enable audio codec ALC722/ALC1320
* d8455dfbf6 mb/trulo/var/pujjolo: Change wifi SAR id fw config bits
* a9e97268fe crossgcc: Fix acpica base url version
* dabc200abb mb/lenovo/m900_tiny: enable power LED blink in S3 and S4
* cb86b9a089 mb/lenovo/m900_tiny: Put options in CFR cbtable
* 26d6da4533 mb/lattepanda/mu: Correct UART1 pinmux for native mode
* 2ec9a9f17d mb/lattepanda/mu: Update eDP/HDMI in devicetree
* 3cfa24c1bf mb/lattepanda/mu: Enable PMC drivers
* c3dba4da2b mb/lattepanda/mu: Add flashmap definition
* b5db9bcc9d soc/intel/alderlake: Enable USB3 HSIO related parameters for USB3 GEN2 support
* da49da6c82 soc/intel: Add Arrow Lake-S/HX IDs
* 8cec500968 mb/google/skywalker: Configure firmware display for eDP panel
* 78a89d4d70 soc/mediatek/mt8189: Extract code to disable secure mode from DDP driver
* 8d8d0f9746 soc/qualcomm/x1p42100: Add Clock support for x1p42100
* 20c2813891 soc/qualcomm/common: Update QUP register structure for QUP v3.2
* d24c4086e1 Documentation: Add Ramstage Bootstates
* 10d01fc2de Documentation: Add Threads
* faf0f29f8d mb/google/ocelot: Update EC host command range for variants
* ac4dfa5762 mb/hp/snb_ivb_desktops: Add Compaq Pro 6300 MT/SFF variant
* 984c64295b drivers/crb/tpm: Add new method to retrieve base address
* 1e8e5d902a mb/starlabs/starlite_adl: Add support for MXC6655 accelerometer
* 5993dd6ef5 Documentation: Add Timers, Stopwatch, and Delays
* 4f1f502fd5 soc/mediatek/mt8189: Add PI image loader in ramstage
* e3ffa3c14f soc/meidatek/mt8196: Move PI image related code to common
* e96bf7e094 soc/qc/x1p42100: Support to generate Bootblock as multi ELF
* ae5810e358 util/qualcomm: Add MBN v7 format support
* 626c5364b8 tree: Use boolean for PcieRpSlotImplemented[]
* a90a7e0aed mb/google/bluey: Specify ROM size per board variant
* 0c9204046a mb/google/bluey: Update SPI flash vendor selection
* d636b38577 soc/qualcomm/x1p42100: Select ARM64_USE_ARM_TRUSTED_FIRMWARE
* 17abedaef6 include/smp/node: Drop unused is_smp_boot
* c0413336bc acpi/acpi.h: Use boolean
* 9be383b855 drivers/lenovo/hybrid_graphics/chip: Use boolean when appropriate
* f33507c1d8 mb/{google/zork,novacustom/mtl-h}: Use true/false for boolean
* ae282fe502 drivers/generic/bayhub: Use boolean for power_saving
* 0a94fcd2db crossgcc: upgrade binutils from version 2.43 to 2.44
* 316f76635f soc/mediatek/mt8189: Use pmif_spmi_v2 for MT8189
* f3bd8b7a07 soc/mediatek/pmif_spmi: Move pmif_spmi_force_normal_mode() to common
* ef10e93e0a tree: Replace scan-build by clang-tidy
* 6707e9281c mb/google/brox: Update cpu power limits
* f1aa0a175b util/crossgcc: Build compiler-rt using runtimes
* b0e0c688c8 buildgcc: Use -d to check libstdc++ include directory
* f2fed71533 crossgcc: Upgrade acpica from 20241212 to 20250404
* 07a8737cbd crossgcc:Initialize OPT_LDFLAGS to avoid unset variable in IASL build
* ad9bfd4243 crossgcc: Always update HOSTCFLAGS from GMP headers if already built
* c3f5d7c1ee crossgcc: Upgrade MPFR from 4.2.1 to 4.2.2
* a3ea1cb542 util/crossgcc: Upgrade CMake from 3.31.3 to 4.0.3
* f9cde87f5a crossgcc/buildgcc: Fix GMP-6.3.0 build with GCC 15 using proper prototypes
* 35d6ee9223 crossgcc/buildgcc: Remove invalid option for CMake
* bd36a4a465 util/lint: Remove missing dirs from checkpatch linter
* a0f2e42879 util/lint: Improve final newline check
* 6cb9efa19a util/lint: Ignore opensil for Kconfig linter
* 5228b3ef7b util/lint: Ignore binary files for cb lowercase linter
* 58d450d2dc util/crossgcc/buildgcc: Reorganize toolchain version variables
* baf28f8668 mb/trulo/var/pujjolo: Add GPE configuration
* eb749f2416 spd/lp5: Add SPD for MT62F2G32D4DS-023 WT:C
* 731bea2fc1 mb/lattepanda/mu: Make VBT compatible with ADL-N FSP IPU25.3
* 6b7f697309 util/amdfwtool/amdfwread.c: Properly error out in relative_offset()
* 4a99023e0f util/amdfwtool/amdfwread.c: Remove APOB_NV special case
* 000ac2cc38 util/amdfwtool/amdfwtool.c: Use physical address for APOB_NV
* d0355cb647 util/amdfwtool: Move APOB_NV quirk to amdfwtool.c
* 6fa44461e7 mb/google/fatcat/var/kinmen: Add Fn key scancode
* dd7956bfc5 mb/google/ocelot: Update GPIO table
* 1222c704b5 mb/google/fatcat/var/felino: Add pull high setting on GPP_V12 and NC_LOCK GPP_F09
* 61d74dc8f7 payloads: Propagate SPI flash address mode flag to libpayload
* 8dec5fcaf8 drivers/spi: Add 4-byte address mode flag to lb_spi_flash
* a01c368a8a drivers/spi: Refactor 4-byte addressing mode handling in SPI flash
* 30e7e604fb mb/google/fatcat/var/fatcat Align I2S and DMIC pad configuration
* 9fe1546ffe Docs/releases: Update 25.06 release notes
* 5c281529ea mb/trulo/var/pujjolo: Add FW_CONFIG for mipi camera
* e5e79de8cc mb/trulo/var/pujjoquince: Add Fingerprint function
* 0dcea61e7c cbfstool: Add multi ELF support
* 6a02f2d4a7 util/qualcomm: Add script to concatenate ELF images
* 3a0b6f625a mb/google/trulo/var/pujjocento: Enable WiFi SAR table
* 64a79d23e8 mb/trulo/var/pujjoquince: Add SD card function
* b726a9c7e9 mb/google/fatcat: Create new fatcatite4es variant
* e7984f39eb mb/google/fatcat: Create new fatcatnuvo4es variant
* cdf0c76dc8 mb/google/fatcat: Create new fatcat4es variant
* 8e5bdde028 mb/intel/ptlrvp: Add support for H58G66BK7BX067 memory
* 110aebb4d2 mb/google/nissa/var/riven: Add focaltech touchscreen support
* bc8876d56d Revert "soc/intel/xeon_sp/uncore.c: mark TSEG/SMM region as reserved"
* 64d4888349 mb/google/dedede/var/magolor: Generate SPD ID for CXMT CXDB4CBAM-ML-A
* cc116e08aa mb/google/nissa/var/quandiso: Add touchscreen FTSC1000 support
* 35648dc37b acpi: Add _func suffix for callback functions
* 03be570994 mb/google/rauru: Remove unused get_oled_description
* cc0a410ff5 soc/mediatek/dp: Correct eDP register settings for dptx_v2
* 056405a10d mb/google/ocelot: convert variants for use with ES silicon
* 4ef51ffbd7 mb/google/skywalker: Add panel driver in mainboard
* cdb49c4d2e soc/mediatek/mt8189: Add ddp driver to support eDP output
* d8fc5eba2d soc/mediatek/mt8189: Add eDP driver
* cfd0b4dd20 soc/mediatek/mt8189: Change msdcpll default freq to 384MHz
* a60c5d205b mb/google/nissa/var/meliks: Initialize display signals on user mode
* f846ec1e37 mainboard/google/fatcat: Set OEM footer logo bottom margin
* 97f92d5c69 drivers/intel: Add support for configurable footer logo bottom margin
* 3e0d8a2f2c mb/google/bluey: Enable 4-byte addressing mode
* 5568bee055 drivers/spi: Support forced 4-byte address mode via 0xB7 command
* a66d2d41f5 mb/lenovo/m900/devicetree.cb: Use OC6 enum
* f14880934b Haswell NRI: Use final timings after basic training
* 0e5d1d29bd soc/intel/skylake: Expand USB OC pins enum to OC7
* 1f28803dcd mb/trulo/var/kaladin: Create kaladin variant
* 1c2978dba6 mb/google/dedede/var/awasuki: Add ChangXin modules to RAM id table
* 912161e52d spd/lp4x: Modify parameters of SPD for NT6AP1024F32BL-J1
* 47f1b798e4 util/amdfwtool/amdfwtool.c: Remove APOB_NV src address check
* c7fe471482 mb/novacustom/mtl-h/var/dgpu: Add NVIDIA dGPU ASL code
* 24d8e6f35e Revert "mb/google/brox: Handle GPI_INT pin lower to GPI_WAKE"
* cf7159af64 mb/siemens/mc_ehl3: Limit eMMC speed mode to DDR50
* 68ede7b860 mb/google/nissa/var/meliks: Configure Acoustic noise mitigation
* ea3cc3231c mb/intel/ptlrvp: Remove power limit constraints
* cae47dfd44 soc/intel/pantherlake: Correct DRHC and SATC in DMAR table
* e58883aace soc/intel/pantherlake: Refactor VR Fast Vmode I_TRIP threshold settings
* abbf549558 mb/google/fatcat: Add support for new Panther Lake IDs
* 57bffed893 soc/intel/pantherlake: Add new PCI and CPU IDs
* 59fce656b1 soc/intel/pantherlake: Enable Thermal Design Current for various SKUs
* 5a2de49baa soc/intel/cmn/blk/power_limit: Add helper functions to romstage
* 2207a4b59a vc/intel/fsp/fsp2_0/pantherlake: Add TDC current limit configuration
* efa24540b0 drivers/wifi/generic: Implement Bluetooth PRR DSM functions
* d92b6163e7 drivers/wifi/generic: Implement Wi-Fi PRR DSM functions
* 81d7bc386e soc/intel/cmn/blk/cnvi: Set WFDL default value to 50 ms
* 1be1ccb42e soc/intel/cmn/blk/cnvi: Use WFDL field for Wi-Fi PLDR reset delay
* ff46501d6d soc/intel/cmn/blk/cnvi: Correct generated ACPI code in comments
* 782ae11bc7 soc/intel/cmn/blk/cnvi: Add _PRR method for Bluetooth CNVi Reset
* 23f5df6eae mb/google/nissa/var/yavilla: Add H58G66CK8BX147 to RAM ID table
* 4a2c61a8a0 soc/qc/x1p42100: Allow building QC platform without upstream blobs
* 2a09db3c29 drivers/intel: Refactor logo rendering with helper functions
* 57d29ebd74 vc/google/chromeos: Don't pack `cb_plus_logo.bmp` if footer is present
* ef051256dc mainboard/google/fatcat: Drop logo_valignment selection
* dfeaead9f2 drivers/intel: Add horizontal logo alignment for splash screen
* ced9f91ae9 soc/intel/cmn: Improve comments for fw_splash_vertical_alignment enum
* d309a9dfa8 drivers/intel/fsp2_0: Suppress OEM footer in low-battery mode
* 4373eea5d8 {lib, drivers/intel}: Add splash screen footer
* be5609bdaf lib: Introduce a new function `bmp_load_logo_by_type()`
* a1dbb4076c lib: Add support for different bootsplash types
* f48865ab9a drivers/intel/fsp2_0: Refactor bitmap loading and GOP BLT conversion
* f3f9c0bd8e soc/intel/ptl: Add PCIe ACPI support for Wildcat Lake SoC
* ba715b3d25 mb/google/nissa/var/guren: Add SPD ID for MT62F512M32D2DR-031 WT:B
* 43b6f44e22 soc/mediatek/mt8189: Remove ulposc1 hardware calibration
* f63016c36f soc/mediatek: Unify DPTX swing/preemphasis API
* df91698b11 soc/mediatek/mt8196: Refactor mt8196 eDP driver for better code sharing
* 03fca0f0b4 mb/google/brox: Enable support for Realtek EC
* c8eb52c10c ec/google/chromeec: Modify Realtek EC initialization timing
* e2ac46bcc7 spd/lp5: Add SPD for hynix H58G66CK8BX147
* 812379f500 soc/mediatek/common: Move map_to_lpddr_dram_type() to common for reuse
* 7c19b1fa58 mb/google/skywalker: Run MTK FSP binary in ramstage
* 89e4fff2d3 crossgcc/buildgcc: introduce RISCV_ISA_SPEC for RISC-V ISA specification
* 620c8d9f71 mb/google/brask/var/constitution: Generate RAM ID for B3221XM3BDGVI
* 57b12d2171 spd/lp4x: Generate initial SPD for B3221XM3BDGVI
* 7c0da94aeb mb/google/brya/var/pujjoga: Add and select VBT
* bcd569faf1 mb/google/skywalker: Create variant Baze
* fb2c834f7c mb/trulo/var/pujjolo: Fix p-sensor function
* a7cd5c8c6b mb/trulo/var/pujjolo: Enable USB3 functions
* 2c53151c0c mb/trulo/var/pujjolo: Enable Ax211 wifi function
* ad78fc535a mb/trulo/var/pujjolo: Add single ram configuration
* f941b51e0e soc/mediatek/mt8189: Correct MFG MUX OPP init setting
* a1d9b69f47 soc/qc/x1p42100: Add metadata files for shrm and cpucp
* b369756680 util/qualcomm: Add script to extract a segment from ELF
* 19d1604fd7 mb/google/bluey: Update flash layout
* b9aae6180b mb/google/nissa/var/meliks: Link touchscreen device with display panel
* 6e58c0148b Reland "libpayload: arm64: Reduce DMA allocator space to 1MB"
* f18420b6a9 mb/google/fatcat: Create new felino4es variant
* 992ba78142 mb/google/fatcat: Create `felino` model for easier variant integration
* afbc9126f9 mb/trulo/var/pujjolo: Update GPIOs and probe SD card to fix S0ix suspend
* b3b1809764 mb/google/octopus: Correct channel count for DMIC
* 9accaa7238 mb/google/poppy: Correct channel count for DMIC
* 41e09a5c59 mb/google/fizz/var/karma: Correct channel count for DMIC
* fed7ad967a mb/google/reef: Correct channel count for DMIC
* 686dea9883 mb/google/glados: Correct channel count for DMIC
* ea6f150d9d soc/intel/cmd/blk/cnvi: Correct conditional logic for CNVI readiness
* 29dd511628 soc/intel: Move CNVI sideband definitions to SoC-specific files
* ea8a3e685f soc/intel/cmn/blk/cnvi: Add descriptive comments for PRRS and RSTT
* d17ace2c1b soc/intel/cmn/blk/cnvi: Remove hardcoded offset in OperationRegion
* bb3a484e36 soc/intel/*/acpi: Move the BASE ACPI method to northbridge
* 3c88e629d9 mb/google/brox/var/lotso: Generate RAM IDs for lotso
* 1bdf89d78c device/device_util.c: Complete function documentation
* bc84e1ba42 soc/intel/cmn/acpi: Refactor `SPCO` ASL method
* 4bf0f4fab3 mb/google/fatcat/var/felino: Add PIXART touchpad to devicetree
* 8269a89d32 mb/google/fatcat/var/felino: Add Synaptics touchpad to devicetree
* 4d9dfb63bd Documentation: fix broken flashrom.org link
* 3696fea4e0 mb/google/ocelot: add BOARD_GOOGLE_OCELOTMCHP
* 6ebd30bf7d mb/google/ocelot: add BOARD_GOOGLE_OCELOTITE
* da122fe8f5 mb/starlabs/*: Use PLTRST for PCH Strap GPIOs
* 7f03e3bd6c drivers/efi/efivars: Change printk level from ERROR to DEBUG
* c740786f12 drivers/gfx/generic: Use 'noop_read_resources'
* b1759c9bd6 mb/starlabs/starlite: Adjust the Flash Map to match the Twin Lake IFD
* cc1f0e5c90 mb/starlabs/starbook: Disable TME_KEY_REGENERATION_ON_WARM_BOOT
* 9381dd0cbf soc/intel/meteorlake: Make TME_KEY_REGENERATION_ON_WARM_BOOT selectable
* 9b91d50fc1 mb/siemens/mc_rpl1: Add GPIO configuration
* f44b19f2dc soc/intel/pantherlake: Fix ACPI can't tag data node error
* fad0064377 soc/intel/ptl: Add UFS support for Wildcat Lake SOC
* 3a065dbbfc mb/google/nissa/var/yavilla: Add H58G56CK8BX146 to RAM ID table
* 98f1886c89 mb/google/nissa/var/yaviks: Add H58G56CK8BX146 to RAM ID table
* 3711be4e18 soc/intel/xeon_sp: Use Kconfig to define SPI_BASE_ADDRESS
* ad05c65d72 soc/intel/xeon_sp: Initialize SPI before using it
* b4f2a51533 libpayload/arch/arm64/mmu: Fix missing CBMEM in used ranges
* 6da913bd46 docs/security/vboot: Update supported board list
* a0e6fd9a95 Documentation: Add coreboot release 25.09 template
* d4a33638f5 mb/trulo/var/pujjolo: Change dram id table
* 2ee72eaab1 soc/intel/pantherlake: Update CONSOLE_UART_BASE_ADDRESS Kconfig value
* 25385df017 vc/intel/fsp/ptl: Update PTL header files to FSP 3182_01
* 2286134002 mb/google/fatcat/var/felino: Configure CAM_VDD_EN_SOC GPIO to restore camera function
* 486604360c mb/google/ocelot: add BOARD_GOOGLE_MODEL_OCELOT
* f6926dc8a5 mb/google/nissa/var/pujjoniru: Update DTT settings for thermal control
* bb022f18d5 mb/google/dedede/var/awasuki: Add 2 NANYA modules to RAM id table
* 4ef1258436 spd/lp4x: Add Nanya memory part
* 99c138ec50 soc/mediatek: Don't attempt de-assert PERST# without pci_root_bus
* b9754131a6 mb/google/ocelot/var/ocelot: Update initial overridetree settings
* 4199351c1b Revert "libpayload: arm64: Reduce DMA allocator space to 1MB"
* a11eacc204 mb/msi/{ms7d25,ms7e06}/devicetree.cb: Add fan control config
* a069c920f5 mb/msi/{ms7d25,ms7e06}: Mimic the vendor BIOS early SIO init
* 3c23d7b3a9 src/superio/nuvoton: Add HWM initialization code
* ace18dea15 mainboard: Add 2S Intel Birch Stream MiTAC Computing R520G6SB
* 4569adeedc mainboard: Add 1S Intel Birch Stream MiTAC Computing SC513G6
* ab29f52ee2 Haswell NRI: Measure per-task execution time
* 925845c38c mb/google/ocelot: Update Kconfig
* c796c68dec mb/google/ocelot: Update MAINBOARD_PART_NUMBER
* b322d30944 mb/google/brya/var/moxie: Enable RTD3 for SSD to resolve S0ix issue
* f85f7d7aed mb/intel/beechnutcity_crb: Use host address for BiosRegionBase
* 4d3dc433f9 mb/intel/avenuecity_crb: Use host address for BiosRegionBase
* 881fe9cef6 soc/intel/alderlake: Add cpuid_to_adl mapping for Core 3 N350 SoC
* 08c8a74170 mb/trulo/var/pujjolo: Add MB usb-a port3 function.
* 317affb0ad mb/trulo/var/pujjolo: Enable Elan touchscreen function.
* de259ad970 mb/trulo/var/pujjolo: Enable s0ix function
* 712dfb3761 Revert "util/cbmem: Consolidate CBMEM and coreboot table access"
* 30865c2fb1 mb/amd/birman_plus: Skip i2c_early init
* f2e488cfbf mb/google/fatcat: Add power limit overrides for H204 and H404 SKUs
* 1537c89e8d soc/intel/cmn/block/power_limit: Enforce variant PL4 for Fast VMode
* d9c5cef7f0 soc/intel/pantherlake: Add Fast VMode PL4 Power Limit configuration
* b879342fe6 soc/intel/pantherlake: Add support for the H204 SKU
* b42842bbe5 mb/google/brox: Add brox_rtk_ec variant
* 73cc8a413a treewide: Work around GCC 15 Werror=unterminated-string-initialization
* d00f5c2d8c mb/google/skywalker: Reset xsphy0 in mainboard_init
* 40bf6c28f8 soc/mediatek/mt8189: Add support for USB port 0 reset
* 26fd33a92a mb/starlabs/starlite_adl/acpi: Fix _GPE callback type
* d14a3e23da mb/starlabs/starlite_adl: Clarify pmc_gpe0_dw0 mapping in devicetree
* 2c0417ea06 mb/starlabs/starlite_adl: Remove duplicate GPP_E12 entry
* 7e711a5bef Reland "soc/mediatek/mt8196: Specify MTKLIB_PATH for building BL31"
* 47f2c17961 mb/starlabs/*: Add CFR option to enable/disable S0ix
* dc3d524d19 mb/starlabs/starlite_adl: Use SoC common CFR forms
* 808c982104 mb/starlabs/starfighter: Use SoC common CFR forms
* 644fd7b7f5 mb/starlabs/starbook: Use SoC common CFR forms
* c7a1539d87 mb/starlabs/lite: Use SoC common CFR forms
* 3f16609ba2 mb/starlabs/byte: Use SoC common CFR forms
* c3be703b71 soc/intel/common/cfr: Add bool option for auto power on
* b3ac5ecdac soc/intel/cmn/block/cfr: Add CFR form for pciexp_aspm_cpu
* 9f8e5ab661 soc/intel/cmn/block/aspm: Use separate option variable for CPU RP
* 4247128e39 soc/intel/cmn/block/aspm: Fix ASPM control for CPU root ports
* b66b7f7860 commonlib/device_tree.c: Add a function that reads FDT ints
* c776d2dbd6 ec/google: Add support for Realtek EC in ChromeOS EC
* 8b54428200 mb/google/nissa: Override GPIO_PCH_WP for pujjocento variant
* 2060f24d60 mb/system76/mtl: Add Darter Pro 11 variants
* c2496bc62e drivers/analogix/anx7625: Add a retry mechanism to decode EDID
* 7b1eac4192 soc/mediatek/mt8189: Enable MUXes for improved peripheral stability
* da54093bb9 Update arm-trusted-firmware submodule to upstream master
* 40c84c2577 mb/starlabs/*: Tidy up the devicetree files
* cb7d2ebe5c mb/starlabs/starbook/{kbl,cml,tgl}: Remove generic.detect from the touchpad
* c4eb645a0b update_submodules: Fix submodule path handling
* 581af94115 ec/dasharo/ec: Add DTT power and battery participants
* f6dd8f534f MAINTAINERS: Add Dinesh as intel/pantherlake and google/fatcat maintainer
* f2310ab35e update_submodules: Prefix commit title with relative path
* 5fcbc709ec mb/google/fatcat/fmap: Add 1 MB from SI_BIOS to SI_All
* 24778a25de mb/trulo/var/pujjolo: Fix gtx functions.
* 619699648f soc/intel/pantherlake: Simplify P2SB and P2SB2 device operations
* beafbfd29a soc/intel/pantherlake: Remove IOE support and references
* 5277bc4efc soc/intel/pantherlake: Resolve memory corruption by using P2SB2 driver
* 61ac238bb5 soc/intel/common/block/p2sb: Add driver for second P2SB device
* 8961f6681f soc/intel/common/acpi/pcie_clk: Fix ACPI conditional compilation error
* 471df8ca5e util/crossgcc/buildgcc: Fix GMP build on GCC 15
* c24a12db86 util/cbmem: Consolidate CBMEM and coreboot table access
* 99e5a386c2 mb/amd/birman_plus/glinda: Add onboard devices
* 033810a7db payloads/libpayload/Makefile.mk: Replace nm with $(NM)
* a1738e87b5 soc/intel/panterlake: avoid SPI access delay
* 359ae67668 elog: Handle elog in later boot phase
* bf330f2dd0 security/vboot: Back up CMOS data later boot phase
* 45febdec26 mb/starlabs/starfighter: Add reset GPIO for the USB Bluetooth
* a9a51f9916 mb/starlabs/starfighter: Add missing ASPM config for the SSD
* 644ebf5ebc mb/starlabs/starbook/{adl,rpl}: Add generic Graphics driver config
* 902df45eab mb/starlabs/starfighter: Remove the overcurrent config
* b872c50f90 mb/starlabs/starfighter: Add generic Graphics driver config
* cfdf5906fd mb/starlabs/starfighter: Tidy comments for board ID GPIOs
* 9950825a2b mb/starlabs/starlite_adl: Remove extra lines
* 6d079d45d1 mb/starlabs/byte_adl: Remove comments for disconnected GPIOs
* f6a45f6856 mb/starlabs/byte_adl: Re-organise GPIOs
* 63f781b508 mb/starlabs/byte_adl: Disconnect unused GPIOs
* 6aeebc4b4b mb/starlabs/byte_adl: Reconfigure PCH Strap GPIOs
* 5f9046cbb4 mb/starlabs/byte_adl: Remove vGPIO configuration
* c589142c28 mb/starlabs/byte_adl: Add the Byte Mk III variant
* 2cb9c3ee46 mb/starlabs/byte_adl: Update the VBT to the Twin Lake version
* ad8ccf4822 Update arm-trusted-firmware submodule to upstream master
* c615de7248 soc/amd/glinda: Don't let OS put debug UART into D3
* 0251e98e9e util/amdfwtool: Do not attempt to continue processing `--help`
* 0af68855c0 mb/google/nissa/var/pujjoniru: Config AUX gpio to correct TCSS port
* bba9d27145 mb/google/ocelot: Remove power limit override functionality
* b3776e23a7 ec/google/chromeec: Add SPI/I2C EC communication files to bootblock
* be6787a55e mb/google/skywalker: Add storage types to fw_config
* 0a41779e2e mb/google/skywalker: Add eMMC configuration
* 3e6b47980a mb/google/skywalker: Add support for getting storage id
* de251dd677 soc/mediatek/mt8189: Add support AUXADC
* a283246ef7 soc/mediatek/common: Refactor auxadc driver to support new platform
* 94686e581a mb/google/skywalker: Add DVFS support in romstage
* 8ede4bc67b soc/mediatek/mt8189: Add DVFS driver
* 096ce4b244 soc/mediatek/mt8196: Move dvfs_init() declaration to dvfs_common.h
* 0b1bc3df2c mb/trulo/var/pujjocento: Support x32 memory configuration
* 7690442d88 mb/starlabs/byte_adl: Tidy the Kconfig selections
* ab8339770e 3rdparty/fsp: Update submodule to upstream master
* 8e3adf778b soc/mediatek: Add data_version to ddr_base_info struct
* 0cdd4125be mb/trulo/var/pujjolo: Fix touchscreen function and boot up issue
* 99e0484000 mb/google/bluey: Increase bootblock size to 120KB
* 1840fb49e0 mb/google/trulo/var/pujjocento: Update gpio setting for DDI-B
* 69a067a9d6 mb/google/skywalker: Add RT1019 support for beep sound
* 4caf5131b9 mb/google/skywalker: Add ALC5645 support for beep sound
* 623caa537f mb/google/skywalker: Add RT9123 support for beep sound
* 16ff3b33ce mb/google/skywalker: Add SD card configurations
* 3b68408693 mb/google/trulo/var/pujjocento: Configure USB related settings
* 6c87853a83 mb/google/bluey: Implement board and SKU ID retrieval
* 830a887ecb mb/google/bluey: Add WLAN and SSD PCI devices to devicetree
* 891c208835 soc/qualcomm/x1p42100: Enable basic PCIe support
* a5d99a814a soc/qc/x1p42100: Perform `soc_mmu_init` inside early bootblock init
* 481001e13b soc/qualcomm/x1p42100: Add placeholder for early clock initialization
* 77c6104645 Revert "mb/google/rex: Enable use_gpio_for_status for touchscreen"
* 715e7e51c5 mb/google/fatcat/var/francka: Add support for DMIC0
* c16891ecbd soc/intel/meteorlake: Use CACHE_TMP_RAMTOP for TME exclusion range
* 394dfcaa7b mb/intel/ptlrvp: Handle GPIO support for DDR5 configuration
* 58165618da mb/google/byra/var/craask: Add VBT for HDMI variant
* ab160ca301 mb/google/byra/var/teliks: Add default VBT
* 4d5b32f7f7 mb/google/ocelot/var/ocelot: remove unused gpios
* 0e5757bfa7 mb/google/trulo/var/pujjocento: Update DTT settings for thermal control
* c34baacc72 soc/mediatek/common: Add UFS2.2 and eMMC definitions to storage.h
* f325409784 soc/mediatek/mt8189: Add SD card support
* ae435c014c soc/mediatek/mt8189: Configure and early initialize eMMC
* 91ebbb8d35 mb/trulo/var/pujjolo: Modify pujjolo variant
* aea05e51a7 mb/google/trulo/var/pujjocento: Enable WWAN function
* 47133a716d mb/google/trulo/var/pujjocento: Add P-sensor support
* 04c0527aba soc/mediatek/mt8189: Support different PMIC soluitons for MT8189(G/H)
* 80149f55f7 soc/mediatek/common: Convert spmi_dev_cnt to a function
* dcf403e43a mb/google/skywalker: Configure fingerprint pins
* 508d910ed4 libpayload/arch/mock: Select ARCH_HAS_NDELAY for ARCH_MOCK
* 96ac0224ab pci: Add support for assigning resources to SR-IOV VF BARs
* ba8be19122 mb/intel/ptlrvp: Update Kconfig for PTLRVP_CHROMEEC
* 7cbbf786cc update_submodules: Use relative paths to submodules
* dcc8400e27 mb/google/fatcat/var/felino: Modify GPIOs config
* 99af85ad36 mb/google/puff: Add VBTs for Moonbuggy and Scout variants
* 4ae9a79d8d Haswell NRI: Remove unused `SPD_LEN` define
* 0c5286ba34 Haswell NRI: Tidy up REUT subsequence programming
* 7766228798 Haswell NRI: Deduplicate PCODE mailbox functions
* ae68ef3684 cpu/intel/haswell: Export PCODE mailbox functions
* ddce240d34 cpu/intel/haswell: Clean up Makefile
* 2117ed850f mb/google/ocelot/var/ocelot: fix storage configs for ocelot
* c5488c0d6d mb/google/ocelot/var/ocelot: update gpios
* 6602a4462b mb/google/ocelot/var/ocelot: Enable hda device for AUDIO_ALC721_SNDW.
* 99b6ff25d4 soc/mediatek/mt8189: Add MTK FSP loader in ramstage
* c4fe5e2483 mb/google/skywalker: Pass reset GPIO parameter to BL31
* f59ced2c7c mb/google/fatcat/var/francka: boot up by pressing power button in S5
* df0221e62a libpayload: Protect against trying to use weak symbols in the wrong way
* d27e8ef460 update_submodules: Add an empty log line between each iteration
* d9bd7ce89f mb/google/fatcat/var/francka: Enable audio codec ALC721
* 48fbd99223 mb/google/fatcat/var/francka: Set the default HDA GPIO pin to an NC pin
* 3b975f92c7 soc/intel/pantherlake: Select TME support for the SoC
* 8408bd4863 soc/intel/pantherlake: Add TME configuration
* dc36a725d6 3rdparty/fsp: Update submodule to upstream master
* 1f47b0e018 3rdparty/intel-microcode: Update submodule to upstream main
* 4c446751c6 {commonlib, drivers}: Track firmware splash screen rendering completion
* ccb8b34194 Revert "mb/var/uldrenite: Use VBT with limited resolution for 4GBx32 memory"
* 1a00629ae2 mb/google/skywalker: Set up open-drain ChromeOS pins
* 0f2942b513 mb/google/skywalker: Raise little core CPU frequency to 2.0 GHz
* 0ba0d03140 mb/google/skywalker: Implement regulator interface
* 090bce1042 soc/mediatek/common: Add VMODEM and VSRAM_MD bucks support for MT6359
* c74610afae soc/mediatek/mt8189: Shut down PMIC on power key long press
* d1f7565403 mb/google/skywalker: Notify EC that AP is in S0
* da45a88dd3 util/abuild: Fix checking of missing_arches
* cdcbb71936 mb/google/link: Use chromeec_smi_sleep()
* 885aacf004 mb/google/byra/var/teliks: Add VBT for 11" panel option
* 2ce777f178 mb/google/byra/var/yaviks: Add VBT for yavilla
* 0db4444446 mb/google/byra/var/pujjo: Add VBT for pujjo1e
* 8c3e6ea319 mb/google/nissa/var/pujjocento: Enable touchpad
* 643bba345c mb/google/trulo/var/pujjocento: Enable touchscreen
* 3ecaf04dad mb/var/uldrenite: Use VBT with limited resolution for 4GBx32 memory
* 71ae2c7366 mb/google/octopus: Add VBTs for DOOD and FOOB variants
* 7a703fc1fb mb/google/rex: Select IOM_ACPI_DEVICE_VISIBLE
* 0121d0e3e0 ec/google/chromeec/smi: Clear events before enabling wake mask
* 5a947da94e mb/google/sarien: Update VBT from v221 to v228
* 0fba735482 soc/intel/cmn/blk: Refactor CSE status flag and optimize forced sync
* bb8d069dd3 vc/google/chromeos: Move pvmfw cbmem and enable
* f562992da1 mb/google/trulo/var/pujjocento: Enable EC keyboard backlight
* d281a3c559 mb/google/trulo/var/pujjocento: Configure tcss_aux_ori
* 7150c5e2fe mb/google/skywalker: Create variant Anakin
* aedc177f00 libpayload: arm64: Reduce DMA allocator space to 1MB
* 4ccb4a78c4 libpayload: Use Kconfig instead of weak symbol for arch_ndelay()
* 37513297d3 libpayload: Use Kconfig for architecture memcpy, not weak symbols
* bcbe17dea3 mb/google/skywalker: Configure TPM
* 3d40b7d018 soc/mediatek/mt8189: Increase bootblock size from 60KB to 70KB
* 8d25cf3ae7 soc/mediatek/mt8189: Add SSPM loader
* 8ab9f56470 mb/google/skywalker: Set up SPM in mainboard
* 368eeb7da4 soc/mediatek/mt8189: Add MCUPM loader
* bc3af56fdd soc/mediatek/mt8189: Add SPM loader
* 98782a59e9 mb/google/fatcat/var/kinmen: Add overridetree
* bbcb222f0b mb/google/fatcat/var/kinmen: Update GPIO table
* 743e3a07f5 mb/google/brya/var/nissa: Remove duplicate ACPI device GFX0
* 87110309d4 mt8196: Remove mcupm_plat.h header from mcupm_plat.h
* d6fe379e9c mb/google/ocelot: Enable LP5 and DDR5 memory configuration
* 2985af84c3 mb/google/trulo/var/pujjocento: Add Fn key scancode
* dafd7d6eb9 mb/google/nissa/var/dirks: Deassert RTL8111H's ISOLATE_ODL earlier
* c1df30db18 mb/siemens/mc_rpl: Delete fw_config since it is not used
* 7fbea3175d mb/siemens/mc_rpl: Remove unused gpio and devicetree files
* 8fdf8694e3 mb/siemens/mc_rpl: Remove Chrome OS and EC as they are not used
* e020979993 mb/siemens/mc_rpl: Adjust the flash map file
* 71fb8f63e0 mb/siemens/mc_rpl: Add new mainboard based on Intel's Alder Lake RVP
* 918f21b72d drivers/spi/winbond.c: Add W25Q64JV signature
* 278a6d2682 mb/google/trulo/var/pujjocento: update hda_verb table for ALC257
* 43f7c537f8 mb/google/trulo/var/pujjocento: update GPP_R4/GPP_R5 setting
* e4fc00adbe soc/amd/common/block: Enable MMCONF first
* cbbf380fa4 soc/amd/common/block/lpc: Use ROM3 window if possible
* 9d878fc6c0 soc/intel/xeon_sp: Add support for Emerald Rapids (5th Gen Xeon-SP) CPUs
* bd66b8cdd2 mb/google/nissa/var/rull: Enable VBOOT_EC_SYNC_ESOL for rull device
* 3155b2f64c mb/dell/haswell_latitude: Correct BOARD_ROMSIZE_KB_* for E7240
* 4d30d06637 mainboard/google/ocelot: Configure middle logo vertical alignment
* 583bf972c5 mb/google/ocelot: Remove NPK device
* 2bec5a9d9a soc/mediatek/mt8189: Check eFuse ECC in WDT init
* a89406790a mb/google/nissa/var/meliks: Set vccin_aux_imon_iccmax to 25A
* ccd4d1d1db mb/var/uldrenite: Make two pins NC to reduce S0ix power consumption
* e2baa9c7ed mb/google/bluey: Create Quenbi variant
* a98511fd23 mb/google/bluey: Only select EC_GOOGLE_CHROMEEC_SWITCHES with VBOOT
* 756d02f779 mb/google/fatcat: Remove extraneous space in Felino Kconfig name
* 8de02842d5 soc/intel/common/block/cpu: Execute post_cpus_init at BS_DEV_ENABLE
* 0baf47e03b vc/intel/fsp/ptl: Update header files from FSP 3071_00 to FSP 3144_01
* 61f043de4a mb/google/skywalker: Initialize DPM in ramstage
* 3f8702a0d6 soc/mediatek/mt8189: Add DPM v2 driver configuration
* d5bfa1c697 soc/mediatek/common: Add DPM V2 non-broadcast mode support
* 24ab31f477 mb/google/skywalker: Enable RTC boot init
* b288aaee85 soc/mediatek/mt8189: Use common RTC driver MT6359
* 12d6d0606c mb/google/skywalker: Initialize PMIC in romstage
* 2a3fd0659d soc/mediatek/mt8189: Add PMIC MT6315 driver
* 42ac3ccff4 soc/mediatek/mt8189: Add PMIC MT6359 driver
* a2010cf5ee mb/novacustom/mtl-h/Makefile.mk: include tas5825m.c in the build
* 2033075753 intel/alderlake/romstage: Implement eSOL during EC software sync
* e6a7666bcd cpu/intel/car: Skip EC software sync in common code
* ac4503d0dd security/vboot: Introduce VBOOT_EC_SYNC_ESOL Kconfig option
* 8a4b3e1346 cpu/intel/microcode: Add error handling if microcode directory is empty
* cb77cafbb4 soc/mediatek/mt8189: Add SPMI and PWRAP driver
* b9a4d6ede1 soc/mediatek/common: Correct MT6359 RTC EOSC setting
* ae2f3ab153 mb/system76: Add SMBIOS slot descriptions
* c0113106fa nb/amd/pi/00730F01/northbridge: skip IVRS when IOMMU is disabled
* 5e2aee4474 soc/mediatek/mt8196: Move sspm_enable_sram() to common code
* c81b08c4ba util/abuild: Fix building ChromeOS boards
* 62b823f69e mb/google/bluey: Increase flash size to 64MB for W25Q512NWEIM
* 276eb20b04 mb/google/bluey: Limit SPI flash support to Winbond
* 47c171a157 mb/google/bluey: Make Chrome EC optional
* 139a5b6fe0 mb/google/bluey: Select MISSING_BOARD_RESET due to lack of Chrome EC
* f9d933db36 mb/google/bluey: Introduce MAINBOARD_HAS_GOOGLE_TPM Kconfig
* e8450f78a0 mb/google/bluey: Make GPIO setups conditional on Kconfig options
* 4e8ea210bb mb/google/fatcat/var/felino: Add pull high setting on GPP_C03/GPP_C04 in gpio.c
* 65523e98a6 soc/mediatek: Extract DPM common code
* aaf373c253 mb/google/skywalker: Implement sku_id()
* be675e5369 mb/google/skywalker: Configure GPIO XHCI_INIT_DONE as output
* 9a60da5297 mb/google/skywalker: Enable ChromeOS EC
* c443478509 mb/trulo/var/pujjolo: Create pujjolo variant
* 24757047e5 util/abuild: Fix merge error
* d93f7f01a6 mb/topton/adl: Use CFR setup menu to manage options
* b59fef9678 soc/intel/cmn/cse: Add Kconfig to set ME default CFR option state
* 50a5fe77de soc/intel/meteorlake: Add CFR objects for existing options
* d53f00fbd9 soc/intel/meteorlake: Hook up the VT-d setting to option API
* e356483eb6 soc/intel/jasperlake: Add CFR objects for existing options
* 87663d1c0a soc/intel/jasperlake: Hook up the VT-d setting to option API
* 2c0c2f46d7 soc/intel/tigerlake: Add CFR objects for existing options
* d06c8dde58 soc/intel/tigerlake: Hook up the VT-d setting to option API
* 3cfb24a326 soc/intel/alderlake: Hook up the VT-d setting to option API
* 6f9df7ace4 soc/intel/cannonlake: Add/use enums for IGD config
* c8199f26e0 soc/intel/skylake: Add/use enums for IGD config
* 947dd07823 soc/intel/jasperlake: Hook up IGD config to option API
* 09adda95b9 soc/intel/meteorlake: Hook up IGD config to option API
* dcbb5771c9 soc/intel/tigerlake: Hook up IGD config to option API
* d930a3542c soc/intel/alderlake: Hook up IGD config to option API
* 9faf7ce4f4 soc/intel/alderlake: Add CFR objects for existing options
* 011baca89d cpu/x86/smm/smm_module_loader: Install bigger page tables
* aa121a9bbe payloads/external/edk2/Makefile: Set OemId Pcd
* ca9616b984 ec/system76/ec: Add config for 2nd fan without GPU
* f1f58b20b9 soc/mediatek/mt8189: Add SPI driver support
* d4a759a068 mb/system76/mtl: darp10: Add TCSS configs
* 85972101e6 commonlib/device_tree: Make *path const in dt_find_node()
* de9d76c761 mb/starlabs/starbook/tgl: Configure the eSPI GPIOs
* af7fb83ed0 soc/intel/apollolake: Hook up S0ix setting to option API
* 9979be7482 drivers/intel/fsp2_0: Remove redundant NULL checks and simplify code
* 6f9de346ae Revert "soc/amd/glinda/Makefile.mk: Use relative address for APOB_NV"
* d263e0bd92 soc/amd/glinda/Makefile.mk: Use relative address for APOB_NV
* 4f7ea3667c mb/google/rex/var/kanix: Tune camera I2C timing
* f0ad05b57e mb/google/brya/var/uldrenite: Fix USB_OC1 for USB3 A0 port
* 1140891211 mb/google/bluey: Initialize I2C, SPI, and GPIOs in bootblock
* ba8407f0c1 soc/intel: Add Arrow Lake-H/U IDs
* 3e1f96a0f4 mb/system76/mtl: Add Lemur Pro 13
* 3008b8de53 soc/intel/skylake: Show that SMRAM is unconditionally locked
* e6dc71fe9f util/superiotool: Dump one more NCT6779D register
* b50ceba64a mb/amd: Increase ROM size on boards, incorrectly limited to 16 MB
* 850703b32b mb/google/bluey: Configure FPMCU power, reset, and QUPv3 peripherals
* b4c6984a40 soc/qualcomm/x1p42100: Initialize QSPI and QUPv3 in bootblock
* fe34206442 soc/mediatek/mt8189: Add audio/display bus protection release functions
* c2b17a083d soc/mediatek/mt8189: Add PLL and clock init support
* e4cbd9ea9f soc/mediatek/mt8189: Add MTCMOS init support
* 5cf460dce9 soc/mediatek/mt8196: Fix RTC protection register unlock failure
* 2c986d016e MAINTAINERS: Add Google Bluey and Qualcomm SOC maintainers
* 64fe6fd94a util/abuild: fix TODO and update targets variable to an array
* 902288db22 util/abuild: Update version and date string
* 8504c796fc util/abuild: Remove obsolete FIXME
* a8e1113e3b util/abuild: Check functions directly instead of with $?
* b128abcdad util/abuild: Add quotes around variables
* 52b932df3b util/abuild: Group printfs to timestamps file together
* ad19c94d87 util/abuild: Fix shellcheck warnings about local vars
* d88ea14e8d util/abuild: Remove unused debug() function
* 82dea9d6d1 util/abuild: Disable shellcheck warning on interrupt()
* a2baaec067 util/abuild: Use ${} around variable names
* 9ddb54e6ad util/abuild: Update syntax from 'function func' to 'func()'
* f66c7c1037 util/abuild: Update echo to printf for consistency.
* 49ae935b37 util/abuild: Change [...] to [[...]] for consistency
* ea32e30a18 mb/starlabs/*/cfr: Remove `reboot_counter` CFR option
* d4cb553986 mb/starlabs/*/cfr: Remove `boot_option` CFR option
* 452e179727 mb/starlabs/*/cfr: Use global console CFR object
* aebef78622 xcompile: Use Walloc-size GCC option
* 074dd4f6f5 mb/google/fatcat: Set logo vertical alignment to middle for variants
* 02ca72b2d4 soc/intel/meteorlake: Hook up Pch Sleep Assertion widths
* 166f0ea146 util/abuild: Identify abuild builds with an env variable
* 511872dae3 mb/dell: Convert Latitude E7240 into a variant
* b5581d556b drivers/mrc_cache: Measure MRC cache as runtime data
* 05eb3e3716 mb/google/skywalker: Create variant Yoda
* c8ddae9ebe mb/google/puff: Use CFR setup menu to manage options
* dc19824e56 mb/google/fizz: Use CFR setup menu to manage options
* 1d62a1e857 mb/google/jecht: Clean up makefile
* 4112c77919 mb/google/jecht: Use CFR setup menu to manage options
* 6eddde31bb mb/google/beltino: Clean up makefile
* 445575525c mb/google/beltino: Use CFR setup menu to manage options
* 376a5acc24 util/lint: Add lint file for gofmt
* 4456c125f6 soc/mediatek/common: Move PMIF SPI macros to per-SoC's header
* 8efdbf0c34 mb/google/nissa/var/meliks: Use default domain_vr_config[] settings
* f07a1a76f3 mb/google/brya: Enable GNA scoring accelerator
* 6c830088da mb/google/rex/var/screebo: Generate RAM IDs
* ac2bd75817 spd/lp5: Add SPD for K3KL9L90EM-MGCU
* 66873a3812 vc/amd/fsp/glinda: Update SMBIOS Type 17 information
* b23db384a9 vc/amd/fsp: Update SMBIOS Type 17 PartNumber size
* 0b120de7c0 Documentation: Update documentation for Topton X2F-N100
* d50019d432 mb/starlabs/starbook_mtl: Select SKIP_SEND_CONNECT_TOPOLOGY_CMD
* 4aa1861fbb mb/starlabs/starbook/mtl: Configure sleep assertion times
* 183c414577 soc/intel/meteorlake: Add Kconfig to skip FSP TBT connect topology
* aa1eba2f25 drivers/intel/fsp2_0: Enable firmware splash using 24-bit BMP logo
* da29107572 mb/google/fatcat/var/francka: Reduce generic reset delay to 10ms
* 60916d0f10 mb/trulo/var/uldrenite: Support different ISH UART mappings
* 3fe4b00966 mb/trulo/var/uldrenite: Swap ISH UART from UART1 to UART0
* 407c7d0da3 Documentation: Add Device Operations
* 20d7eaeb0f Documentation: Add chip operations
* bf38f8eddc vc/intel/fsp2: Drop superfluous header for Raptor Lake S
* eec228987e mb/intel/coffelake_rvp: Make use of chipset devicetree
* c9f4cfa463 AUTHORS: Update list to 25.03
* da5101fde4 cpu/x86/smm: Drop unused label
* 9154070320 mb/asus/h61-series: Add H61M-A/USB3
* e8c724fe1a mb/lenovo/m900_tiny: Update VBT to build 1037 with Kaby Lake gfx support
* 21ca6701ff mb/google/{drallion,hatch,sarien}: Skip adding DTT/TCPU to SSDT
* 5bf88a44e9 drivers/smmstore: Support 64-bit MMIO addresses
* 2706ce0266 mb/intel/ptlrvp: Add GPIO support for T4 LP5 board
* 40b62ff6c4 mb/intel/ptlrvp: Add memory configuration support for T4 LP5 board
* 7f826fddc5 mb/intel/ptlrvp: Compile variant.c in ramstage for ptlrvp
* 0ca46ac0d2 soc/intel/pantherlake: Enable coreboot native logo rendering
* 210371e25b mainboard/google/fatcat: Configure middle logo vertical alignment
* e446c1f917 drivers/intel/fsp2_0: Introduce coreboot native logo rendering
* 2f23896299 soc/intel/intelblocks/cfg: Add splash screen vertical alignment options
* 78d15d9a12 drivers/intel/fsp2_0: Add Kconfig to select FSP for BMP rendering
* 5f941893ef cpu/x86/mtrr: Introduce mtrrlib with common MTRR helper functions
* e180971560 drivers/intel/fsp2_0: Move graphics info struct/GUID to FSP header
* 18b4349422 mb/var/uldrenite: Fix fw_config_gpio_padbased_override not being called
* a6be271e63 arch/x86: Unify GDT entries
* 1e7e4e943f soc/intel/tigerlake: Hook up S0ix setting to option API
* ba4b26c4fc soc/intel/meteorlake: Hook up S0ix setting to option API
* 514ad949e3 soc/intel/jasperlake: Hook up S0ix setting to option API
* 55afbe250d soc/intel/elkhartlake: Hook up S0ix setting to option API
* 3cc728110d soc/intel/alderlake: Hook up S0ix setting to option API
* 245cba6795 cpu/x86/smm: Add support for exception handling
* 2e27ceed67 mb/google/volteer/var/elemi: Check FP presence against SKU ID
* 663dbd462a soc/amd/phoenix: Remove outdated TODO comments
* b1b8b0e8e1 mb/starlabs/starbook/tgl: Reconfigure PCH Strap GPIOs
* 36ac6226ff util/autoport: Add function to create empty files
* f8071719e7 soc/intel/ptl: Add Wildcat Lake platform reporting
* db4162adce soc/intel/ptl: Add Wildcat Lake PCIe Device details
* 1baf0baf58 soc/intel/ptl: Add Wildcat Lake SoC device tree
* 2fc246cd2d mb/google/ocelot: Remove unused devices from devicetree
* 3278551f8c drivers/intel/fsp2_0: Include coreboot_tables.h in fsp_gop_blt.h
* 18172b6009 mb/google/bluey: Add SoundWire amp and SD card GPIOs to lb_gpios
* 80901a4494 mb/google/bluey: Add GPIOs for Soundwire, Display, and SD Card
* 1015d4332f mainboard/google/bluey: Add fingerprint sensor GPIO entries
* a85b9a21b2 mb/intel/ptlrvp: Add support for DDR5 configuration
* c1bcb43f7c cbgfx: Prevent divide-by-zero edge case in Lanczos kernel
* 565c768c20 soc/intel/alderlake: only add wifi Mitigation if DRIVERS_WIFI_GENERIC
* ac948173ad mb/starlabs/starfighter/rpl: Add ramstage.c to makefile
* f1509a467c mb/starlabs/starfighter: Add CFR option to use native panel resolution
* 3593314cf5 mb/starlabs/starlite_adl: Add CFR option to use native panel resolution
* d13afbbbca mb/starlabs/starbook: Add CFR option to use native panel resolution
* 8fa84d9111 mb/starlabs/*: Add CFR entry for Bluetooth RTD3
* d2b0220a38 allocator_v4: Re-enable top-down allocation for edk2
* 4d7b56cdaa soc/intel/cmn/cse_lite: Fix handling of soft disable state
* 33b3269d91 soc/intel/cmn/cse: Add function to check if ME state is M3_NO_UMA
* 30a4fec86e mb/google/fatcat/var/kinmen: Generate SPD ID for Micron modules
* cf5696834b soc/intel/ptl: Refactor Panther Lake SoC configuration
* e99532d99b soc/mediatek/common: Update SPMI calibration process
* f83fb11e5f soc/mediatek/mt8189: Add CPU segment ID support
* 7b27b1ca99 soc/mediatek/mt8189: Fix incorrect GPIO register address
* f2cf732997 libpayload: usbmsc: Correctly deal with disks larger than 2TB
* 173c5d0aad src/arch/x86/c_start: Delete duplicated code masking stack pointer
* 1166f9be0d include/console: Add CFR object for setting the logging level
* 0f0d5fc725 soc/intel/apollolake/acpi: Add function to get PCIe BAR
* 5d3664ce3b mb/starlabs/starbook/adl_n: Update VBT to fix HDMI output
* 4b765fdd98 mb/google/fatcat: Disable EnableFastVmode on Panther Lake H SoC
* f63c3bb297 soc/intel/cannonlake: Hook up DPTF device to devicetree
* b7d59185ab soc/intel/common/dtt: Add Kconfig to skip SSDT generation
* 094f75162f cpu/x86/64bit/pt: Fix integer arithmethic in assembly
* bbd8f0aef8 soc/intel/ptl: Refactoring NUM_COMx_GRP_PADS calculation
* cf47edb173 ec/google/wilco/acpi: Add UCSI port data
* 89e915e981 ec/google/wilco/acpi: Fix S3/S4 support
* 4a89d1b77d soc/intel/ptl: Add GPIO ACPI support for Wildcat Lake SoC
* a4a2cdeb17 soc/intel/ptl: Add GPIOs for Wildcat Lake SoC
* 2ce567f1d0 soc/intel/common/block/cse: Prevent HECI commands when flash descriptor override is set
* 9660279966 drivers/usb/intel_bluetooth: Hook RTD3 up to the option API
* e2705d93d8 soc/intel/pantherlake: Reduce IGD stolen memory size from 128MB to 64MB
* 9f98a2a78a mb/asus/p8z77-v_le_plus: Use additional rt8168 MAC programming
* 2b598a9472 drivers/net/r8168.c: Add option to program MAC address to ERI registers
* 4b871c6314 ec/intel: read board ID one time from EC per stage
* 08722cd9f9 mb/google/dedede/var/beadrix: Add Ziliatech part to RAM ID table
* c0920396d0 mb/google/bluey: Make GSC_AP_INT GPIO configurable via Kconfig
* 2e387e13f5 mb/google/fatcat/var/francka: Conditionally init HDA
* e545494f6d mb/google/fatcat/var/fatcat: Conditionally init ALC256 HDA
* 03d2ef67d7 soc/intel/cmn/hda: Introduce mainboard hook for HDA initialization
* 85c65b0c20 mb/google/fatcat: Remove NPK device from fatcat and francka variants
* 92955fbfa6 mb/google/trulo/var/uldrenite: Configure GPP_E9 as NF2
* aafcb01ec4 mb/intel/ptlrvp: Synchronize codebase with fatcat
* effd1ffdad mb/google/ocelot: Update Ocelot board
* 1044f03878 payloads/external/edk2: Set StatusD register to work around failing AMD boot
* 2170ad0c60 Documentation/lib/timestamp.md: Reformat to 72 characters per line
* 22118a137b mb/google/fatcat/var/kinmen: Add memory settings
* 54c87dbed0 mb/google/trulo/var/uldrenite: Update DPTF parameters
* 9ef62ad64c mb/intel/ptlrvp: Introduce PTL RVP External and Internal EC Configurations
* 7c965f9df0 MAINTAINERS: Add Nick, Avi, and Pranava for new google/ocelot entry
* d2e698056e mb/google/bluey: Set correct Kconfig defaults for peripherals
* 34d6bc8784 soc/qualcomm/x1p42100: Set correct Kconfig defaults for peripherals
* 2201f57493 soc/qualcomm/x1p42100: Add QUP Serial Engine (SE) entries
* 6a503fe5a4 mb/google/var/uldrenite: Configure GPP_A16 as NF4
* c2c95fbd24 sb/intel/lynxpoint: Add CFR objects for existing options
* 96fd20c5e0 soc/intel/broadwell: Add CFR objects for existing options
* ce6f7820f4 ec/google/chromeec: Increase EC status timeout to 30 seconds
* 17347eedc3 soc/intel/cannonlake: Add CFR objects for existing options
* ad704e0500 soc/intel/cannonlake: Hook up the VT-d setting to option API
* 7f8d1f2086 mb/google/nissa/var/pujjoniru: Support x32 memory configuration
* fe881c990c mb/google/brya: Create pujjocento variant
* 7da36ad79a mb/google/bluey: Add initial support for Bluey
* 57d7957e3c soc/qualcomm/x1p42100: Add initial SoC skeleton for X1P-42-100
* c82f5fe133 soc/amd/glinda: Select SOC_FILL_CPU_CACHE_INFO
* ee76692571 payload/external/edk2: Add Kconfig to support use of PCIe OpROMs
* fb3f025ea6 soc/amd/common/cpu/noncar: Add SMBIOS helper
* 36f01c3481 mb/google/fatcat/var/felino: Add Write Protect GPIO to cros_gpios
* 934fcfb6a0 soc/mediatek/mt8189: Add I2C driver support
* b3bdffa475 soc/mediatek/common: Move I2C functions to common code
* 1e0941c295 mb/google/ocelot: Select Wildcat Lake(WCL) SoC config
* b249275e3d mb/amd/crater: Fix some ec defines
* 443f514365 mb/amd/crater: Add touchscreen support
* 4e55225f2c mb/amd/crater: Add missing dxio descriptors
* 608db150f1 smmrelocate: Drop unused parameter
* 157b7ae778 payloads/edk2: Update default branch for MrChromebox repo to 2025-02
* 76a1e81b10 mb/starlabs/*: Unify Sleep S3 and S4 GPIO configurations
* fed584e100 soc/intel: Add Wildcat Lake CPU and PCIe device IDs
* 5d7e2b4c0c mb/google/fatcat: Disable VR settings on Panther Lake H SoC
* 8be95806a6 mb/google/ocelot/var/ocelot: update gpios
* 92f9c8a985 mb/google/ocelot: update FW_CONFIG
* 49bf8f94a0 soc/intel/common: Add CFR objects for existing options
* 509b01c3b6 soc/intel/cannonlake: Hook up S0ix setting to option API
* b830fdc2d7 soc/intel/cannonlake: Hook up IGD config to option API
* 5efb54d371 soc/intel/broadwell: Allow ME enable/disable to be set via option
* 42379e7f76 sb/intel/lynxpoint: Allow ME enable/disable via option
* 204aae207d mb/samsung/stumpy: Clean up makefile
* e3d3fc5b4a mb/samsung/stumpy: Use CFR setup menu to manage options
* 936ca8404a drivers/option/cfr: Select EFI variable store when edk2 payload used
* 20ceed1929 drivers/efi/fw_info: Select necessary UDK binding as needed
* c0e3f6d1d2 drivers/efi/variable_store: Select necessary UDK binding as needed
* a899359720 sb/intel/bd82x6x: Add CFR objects for existing options
* ada6b98766 nb/intel/sandybridge: Add CFR objects for existing options
* f14aa06606 soc/intel/skylake: Add CFR objects for existing options
* f51c0bb090 soc/intel/skylake: Hook up IGD config to option API
* 32c78b7e22 soc/intel/skylake: Hook up S0ix setting to option API
* 73b095d5ea mb/starlabs/*: Select DRIVERS_OPTION_CFR_ENABLED
* 4eba4e3f26 superio/ite/it8772f: Program power state after failure
* fbca3e6806 superio/ite/*: Move setting of power state to common code
* 60b414fc13 soc/intel/cannonlake: Drop redundant PcieRpEnable
* ee30558c49 soc/intel/skylake: Drop redundant PcieRpEnable
* 439d7fb7d0 mb/google/brya: Create epic variant
* c4e6050146 mb/google/skywalker: Create variant Obiwan
* 0cc0e6996c drivers/smmstore: allow full flash access for capsule updates
* 7814b8a6be Revert "soc/mediatek/mt8196: Specify MTKLIB_PATH for building BL31"
* 14b66cb01b soc/intel/pantherlake: Add new SoC config for Intel Wildcat Lake(WCL)
* d14ebe3957 mb/google/fatcat/var/felino: Use GPP_C08 for GPIO_PCH_WP
* 6322be7992 sb/intel/bd82x6x/me.h: Add missing definitions
* 2f62dd8a6b mb/google/brya/var/uldrenite: Configure ISH_GP5 GPIO
* 3ce612194c mb/google/rex: Generate RAM IDs
* 430ab9257b spd/lp5: Add SPD for K3KL8L80EM-MGCU
* c7a450ba7d Documentation/mainboard/asrock/imb-1222.md: Update information
* ac7717a7b0 mainboard/asrock/imb-1222: Enable USB3 port in WWAN slot
* eb68ff66eb mb/asrock/imb-1222: Update GPIO config using new intelp2m
* a1210875e9 mb/imb-1222: Update some GPIOs according to new vendor config
* fc8e88da9b drivers/intel/mipi_camera: Rework info print output
* d04d7d80b0 drivers/intel/mipi_camera: Only generate ADR if no HID supplied
* 36c89598a7 mb/erying/tgl: fsp_params: Replace half_populated with statement
* 0307f52cd9 soc/mediatek/mt8196: Move SPM loader functions to common part

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-06 19:18:50 +01:00
Leah Rowe
f6da49b3a7 deguard: bump to rev 0ed3e4f
There really isn't anything functionally different. However,
this means one less patch is needed in lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-06 17:54:51 +01:00
Leah Rowe
81dc1a7f89 GRUB: Bump to rev a68a7dece, 23 June 2025
NOTE: gfxterm_menu module removed, because of this
change by upstream:

commit ca2a91f43bf6e1df23a07c295534f871ddf2d401
Author: Glenn Washburn <development@efficientek.com>
Date:   Mon May 5 16:11:36 2025 -0500

    tests: Disable gfxterm_menu and cmdline_cat tests

This brings in the following changes from upstream:

* a68a7dece loader/i386/pc/linux: Fix resource leak
* de80acf36 loader/efi/linux: Unload previous Linux kernel/initrd before updating kernel size
* 249db11d8 loader/efi/linux: Correctly terminate load_options member
* f3b339af1 loader/efi/linux: Use sizeof() instead of constant
* c2b2e0dcf loader/efi/linux: Use proper type for len variable
* de4e8e2aa loader/efi/linux: Do not pass excessive size for source string
* 8c8f96664 loader/efi/linux: Remove useless assignment
* 8ebf155af include/grub/charset.h: Update documentation
* 2f2ed28d5 Revert "lzma: Make sure we don't dereference past array"
* 2539ede82 tests/util/grub-shell: Correct netboot and file_filter test failure
* 8c2d4e64f normal/charset: Fix underflow and overflow in loop init
* ba8eadde6 dl: Provide a fake grub_dl_set_persistent() and grub_dl_is_persistent() for the emu target
* 409e72ced util/grub-protect: Correct uninit "err" variable
* 5eca564b1 gnulib: Bring back the fix for resolving unused variable issue
* ac1512b87 gnulib: Add patch to allow GRUB w/GCC-15 compile
* db506b3b8 gnulib/regexec: Fix resource leak
* bba7dd736 gnulib/regcomp: Fix resource leak
* 91cb7ff6b tests/tpm2_key_protector_test: Add tests for SHA-384 PCR bank
* 451e227e5 tpm2_key_protector: Dump the PCR bank for key unsealing
* 11caacdb2 util/grub-protect: Fix the hash algorithm of PCR digest
* ce23919ca build: Add new header files to dist to allow building from tar
* e3b15bafd build: Remove extra_deps.lst from EXTRA_DIST
* 40e261b89 lib/LzmaEnc: Validate "len" before subtracting
* 86e8f2c4b osdep/unix/hostdisk: Fix signed integer overflow
* 438f05581 disk/luks2: Add attempting to decrypt message to align with luks and geli modules
* 20e6d0c4a osdep/linux/getroot: Detect DDF container similar to IMSM
* b71bc0f8b fs/fshelp: Avoid possible NULL pointer deference
* 272ff81cb fs/ntfs: Correct possible infinite loops/hangs
* 8c95307a0 fs/ntfs: Correct possible access violations
* 06914b614 fs/ntfs: Correct attribute vs attribute list validation
* 0e1762c8a fs/ntfs: Correct regression with run list calculation
* be303f8c1 lib/envblk: Ignore empty new lines while parsing env files
* 34bd00ee2 fs/zfs: Fix another memory leak in ZFS code
* ca2a91f43 tests: Disable gfxterm_menu and cmdline_cat tests

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-06 16:26:49 +01:00
Leah Rowe
5b2661a485 SeaBIOS/default: Bump to rev b686f460, 28 Jun 2025
This brings in the following changes:

* b686f460 sercon: Fix keycodes for F11 and F12
* b52ca86e docs: Note v1.17.0 release
* a6c8e8bb ahci: Fix hangs due to controller reset

The serial console fix is useful to us, as is the AHCI
fix; the latter was previously mitigated by removing
SeaBIOS's AHCI reset patch.

Upstream realised that the AHCI controllers need to have
a timeout on them when resetting them, because they don't
always react immediately to commands.

This makes the AHCI behaviour more correct, in SeaBIOS.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-06 15:31:48 +01:00
Leah Rowe
248192ad9a ifd/hppro3500: use truncated ME, enlarge BIOS size
i did:

ifdtool -f layout.txt ifd.bin

changed layout.txt to say this:

00000000:00000fff fd
00019000:007fffff bios
00001000:00018fff me
00fff000:00000fff gbe
00fff000:00000fff pd

then i did:

ifdtool -n layout.txt ifd.bin -O ifd.bin

this was done to the ifd for hp 3500 pro, based on
the 96KB size of the truncated me.bin via me_cleaner,
when downloading vendor files in lbmk.

it's the policy of libreboot that me.bin should always
be shrunk, and the BIOS region enlarged.

in the original HP 3500 PRO patch submitted, the ME region
was larger, with region boundaries like this:

00000000:00000fff fd
00400000:007fffff bios
00001000:003fffff me
00fff000:00000fff gbe
00fff000:00000fff pd

In the above example, you see that the BIOS region is 4MB.

In the new setup, BIOS is about 7.9MB.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-06 04:34:14 +01:00
Leah Rowe
1cd8353082 ifd/hppro3500: unlock regions by default
coreboot already unlocks the regions during build, by default,
anyway, and this was present in the submitter's patch.

however, it's also good to unlock the IFD regions. like so:

ifdtool --unlock ifd.bin -O ifd.bin

this has been done, on the ifd for hp pro 3500

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-06 04:25:22 +01:00
Leah Rowe
67858207eb ifd/hppro3500: set HAP bit by default
ifdtool --altmedisable 1 ifd.bin -O ifd.bin

always remember to do this, when adding a new
ifd to lbmk. i merged the 3500 port anyway, since
the submitted already used me_cleaner anyway, but
setting the HAP bit is also useful. for example, if
someone was to only flash the BIOS region, which is
possible in this case since the submitter also
didn't truncate the ME region or enlarge the BIOS
region.

in that case, flashing IFD and BIOS is another valid
way to do it, where IFD's HAP bit is set

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-06 04:22:48 +01:00
Leah Rowe
a13772bf31 cb/hppro3500: use seagrub, not grubsea
We want graphics cards to work out of the box. This is
why SeaGRUB is default, on desktops; SeaBIOS also has
better code quality and is less likely to break, so it
provides a nice fallback in case the GRUB payload is ever
buggy during development (this decision was made ever
since the botched May 2024 release)

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-06 04:15:22 +01:00
Leah Rowe
047ddf40d8 Merge pull request 'Add HP Pro 3500 Series' (#350) from JoelLinn/lbmk:feature-port-hppro3500 into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/350
2025-07-06 05:10:17 +02:00
Leah Rowe
d25aaac9ad lib.sh: remove erroneous break from fx_
it means nothing here. in context, if a non-zero return
is observed, we should not do anything here, which is
already the behaviour anyway, except that "break" means
nothing since we're not in a loop here.

where an error exit should be observed, x_ is used inside
the command given for fx_

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-07-06 03:25:35 +01:00
Leah Rowe
c46a71138c Libreboot 25.06 release
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-06-30 14:08:48 +01:00
Joel Linn
587af4a7b6 Add HP Pro 3500 Series
Everything should work except cpu fan control because ME cleaning breaks PECI.
2025-06-15 15:20:32 +02:00
Leah Rowe
b1ef562b76 tree.sh: add sha512 error for check_project_hashes
handle errors on sha512sum - also handle awk errors inside
the mini subshell, and provide overall error handling.

we know that the project.hash file should always exist, and
always be read no matter what; technically, the find command
that proceeds it might not yield any results, but an empty
file would then be produced.

the edge case of an empty file would have lead to an error
beforehand, when configuring the project in function,
configure_project(), so we've already got that covered.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-06-05 23:41:09 +01:00
Leah Rowe
04bee3834d tree.sh: add error check in check_project_hashes()
when reading old_pjhash, we need to error out where a read
error occurs. such an error is unlikely, but could occur under
certain edge cases.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-06-05 23:41:03 +01:00
Leah Rowe
677dfc4d10 tree.sh: more reliable clean in run_make_command
Don't do no-op if it fails; fall back to "clean" instead,
and fail if that fails.

The no-op was there was not all projects have distclean,
but we do intend for them all to be cleaned.

We mitigate further error by only running make-clean if
a makefile exists.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-06-05 23:40:33 +01:00
Leah Rowe
267d4c9034 inject.sh: add missing semicolons
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-06-05 23:39:57 +01:00
Leah Rowe
974bdbb381 vendor.sh: fix bad cbfstool path
i overlooked this one in the previous commit

there is always one.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-27 11:18:18 +01:00
Leah Rowe
dc6996252a put coreboot utils in elf/coreboot/TREE
not elf/UTIL/TREE

This way, they are automatically deleted when a tree
has to be re-built.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-27 10:11:42 +01:00
Leah Rowe
b77154640d release.sh: use printf to create version files
Don't copy the files directly, because we might be doing
this from a work directory that has no files; in this case,
generic "unknown" variables are used, without generating
any files, so the current logic would produce an error.

However, we do need to create those dot files, because
we then rely on them for building release binaries.

The new logic maintains current behaviour, while fixing
this technical edge-case scenario via mitigation.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-26 18:46:58 +01:00
Leah Rowe
dee6997d0c lib.sh: simplify setvars()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-26 13:49:55 +01:00
Leah Rowe
79ded40f3d lib.sh: simplify chkvars()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-26 13:45:12 +01:00
Leah Rowe
5036a0bc50 mk: simplify main()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-26 13:33:56 +01:00
Leah Rowe
41308ee924 get.sh: simplify fetch_project()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-26 13:26:34 +01:00
Leah Rowe
b5867be214 get.sh: simplify try_copy()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-26 13:23:06 +01:00
Leah Rowe
495098d6a7 get.sh: tidy up bad_checksum()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-26 13:19:06 +01:00
Leah Rowe
671e3aa27b get.sh: simplify fetch_targets()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-26 13:11:20 +01:00
Leah Rowe
09b6e91803 general cleanup in get.sh and vendor.sh
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-26 01:30:33 +01:00
Leah Rowe
18dacd4c22 xbmk: rename xbmklocal/xbmktmp variables
shorten them

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-26 00:57:50 +01:00
Leah Rowe
e981132c82 get.sh: consolidate printf statements
stick it in git_prep, which both single- and multi-tree
projects will use, when downloading git repositories.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-26 00:50:06 +01:00
Leah Rowe
afc36754b1 get.sh: remove redundant printf in fetch_project
The following execution will result in another printf
that says exactly what is being downloaded.

There is no need to inform the user twice about
what is being downloaded.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-26 00:44:57 +01:00
Leah Rowe
ffe387ac6b get.sh: remove superfluous command in try_git()
A git-pull is performed immediately after git-fetch.
Git-pull already performs git-fetch as a prerequisite.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-26 00:35:38 +01:00
Leah Rowe
ba7c49c090 vendor.sh: simplify fetch()
the checks at the end of the function are mostly
superfluous, because bad_checksum() is immediately
called just beforehand, and performs the same checks.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-26 00:33:36 +01:00
Leah Rowe
30bc3732c3 init.sh: error out if .git/ is a symlink
the current behaviour is a relic from the older lbmk
design, before recent auditing.

the current logic would cause xbmk to continue execution,
going into a child process with .git/ being a symlink.

The .git/ directory should never be a symlink, because
it is extremely error-prone.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-25 17:01:10 +01:00
Leah Rowe
2493203ee5 get.sh: Properly error out if tmpclone fails
We rely on a non-zero exit on other try_ commands, which
works fine there because we then check the file afterward
and error out accordingly.

For git repositories, we assume that both mirrors are
identical and therefore once we get to the first clone
attempt, we assume that it must succeed.

Therefore, if it does not succeed, we must fail. This fixes
a regression I found in testing, where sometimes a failed
patching attempt would not result in an error exit, and
would therefore result in broken sources being present.

In practise, I always very closely watch the terminal when
testing xbmk, especially when updating project patches, so
we probably didn't introduce any broken sources in practice.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-25 14:46:33 +01:00
Leah Rowe
ad333ae248 tree.sh: Don't auto-run make-oldconfig
This code was introduced to provide fault tolerance,
so that if I forgot to manually update the configs
myself, builds would still succeed, e.g. coreboot
builds.

However, there have been cases in the past where this
introduces settings we don't want, and in general we
do want to know when there is an error in the configs.

The policy should always be: fail early, fail hard.

This also mitigates bugs in U-Boot's build system; for
example, when I last attempted to update the U-Boot
tree for x86, make-oldconfig introduced a lot of junk
settings unrelated, which then introduced code that
would brick the board if you tried it on one, e.g.
it broke booting most Linux kernels via bootflow.

With this change, U-Boot will be easier to handle,
which normally requires manual configuration; the
automated make-oldconfig reconfiguration feature
breaks U-Boot. This will no longer occur, since we
no longer run it manually.

On the other hand, this feature has also prevented
other disastrous bugs in the past, such as when I
forgot to properly set the SPD size on T480; it was
set to 256 bytes, not 512 as is correct. Therefore,
this new design change means I must also be more
vigilant about config changes in project trees.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-25 14:35:02 +01:00
Leah Rowe
97ce531c34 rom.sh: simplify mkcoreboottar()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-25 05:03:03 +01:00
Leah Rowe
a47e981172 rom.sh: rename mkvendorfiles
it mainly does general tasks, like handling utils
and enabling ccache. the vfiles are a small part.

rename the function accordingly. it is called by
premake, so let's call it corebootpremake.

this change will also make sense when cherry-picked
into cbmk, which does not handle vfiles at all.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-25 04:46:08 +01:00
Leah Rowe
d2e148fdd9 rom.sh: simplify ccache handling for coreboot
we simply do not need to run the make-oldconfig command
at all, and after removing it, the "cook" function seemed
quite redundant so i merged it with mkvendorfiles()

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-25 04:40:30 +01:00
Leah Rowe
8c3f10ba40 rom.sh: simplify u-boot payload handling
define it with a single variable, rather than several.

this allows several checks to be greatly simplified.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-25 03:09:29 +01:00
Leah Rowe
3e28873532 ifd/hp8300usdt: set the HAP bit by default
In practise, coreboot can set this bit at build time.
We also use ME Soft Temporary Disable by default, on
this platform.

We also use me_cleaner by default, so the me.bin file
added to flash only contains the code that would run
with HAP set anyway.

Therefore, this change is of little practical consequence,
but as a friend put it to me, this change is most technically
correct.

And I'm all about technical correctness.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-23 04:52:36 +01:00
Leah Rowe
452aeb6001 coreboot: Remove unused vboot tests
Futility tests enlarge the src tarballs, without much utility.

Uttterly futile.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-22 14:13:11 +01:00
Leah Rowe
64cc91bca3 coreboot/default: Remove unneeded FSP modules
We only need the Kabylake version. We can safely
remove the other ones, thereby significantly
reducing the size of the lbmk release archive.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-22 13:48:20 +01:00
Leah Rowe
0216a3104a get.sh: Always update git remotes
Right now, if cache/clone/PROJECT/ already exists,
the logic for pulling new changes doesn't execute,
and neither does the logic for updating remotes.

This is bad when updating revisions, because then
manual updating is required, defeating the purpose
of xbmk's own automation in this regard.

Fix it by only checking the cached download on files,
not Git repositories; the try_git function itself will
already perform this check, before updating remotes
and pulling in new commits from upstream.

The updating only happens when a given target directory
doesn't exist, e.g. src/flashprog/ or src/grub/default/,
so this won't slow down release builds for example.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-22 12:45:59 +01:00
Leah Rowe
419733d307 get.sh: re-generate remotes every time
that way, when a remote changes in config/, it
will be updated automatically, without user
intervention.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-22 12:22:07 +01:00
Leah Rowe
231b320e63 release.sh: copy version files to rsrc
Otherwise, an "unknown" version number is created.

This regression was caused by the recent optimisation
that reduces the amount of extra work done by init.sh
on child instances of xbmk.

As a result of those changes, now release.sh has to
do some minor initialisation of its own, such as this.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-22 11:51:31 +01:00
Leah Rowe
fc0720184d xbmk: add fake config makefile args to flashprog
also pcsx-redux

this way, commands like "./mk -u" without argument
will not fail. these fake makefile commands do nothing.

otherwise, an error errors because their makefiles
do not define these options.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-22 11:34:28 +01:00
Leah Rowe
f9266601b8 vendor.sh: add colon at the end of a for loop
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-22 11:27:22 +01:00
Leah Rowe
8e0c6059d1 rom.sh: skip copyps1bios on dry builds
otherwise, ./mk -d (without arguments) will fail.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-22 01:47:02 +01:00
Leah Rowe
a3250d1447 tree.sh: Don't run make-clean on dry runs
Otherwise, ./mk -d (without arguments) fails for GRUB,
which first requires running autoconf to get a Makefile.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-22 01:17:27 +01:00
Leah Rowe
24b8e633e0 GRUB: Update to revision 73d1c959e (14 March 2025)
This brings in several changes from upstream:

* 73d1c959e cryptocheck: Add --quiet option
* dbc0eb5bd disk/cryptodisk: Wipe the passphrase from memory
* 301b4ef25 disk/cryptodisk: Add the "erase secrets" function
* 23ec4535f docs: Document available crypto disks checks
* 10d778c4b commands/search: Add the diskfilter support
* 7a584fbde disk/diskfilter: Introduce the "cryptocheck" command
* ed691c0e0 commands/search: Introduce the --cryptodisk-only argument
* c448f511e kern/rescue_reader: Block the rescue mode until the CLI authentication
* 4abac0ad5 fs/xfs: Fix large extent counters incompat feature support

This commit is of particular interest:

* dbc0eb5bd disk/cryptodisk: Wipe the passphrase from memory

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-21 13:34:18 +01:00
Leah Rowe
f6b7782283 Revert "vendor.sh: optimise find_me()"
This reverts commit fb7aaa78bb.

it caused a few issues. will re-do later

the old code isn't really broken, just inefficient, because
several files are scanned twice, but in practise the overhead
isn't that great

The error occurs sometimes, when bruteforcing me.bin:

ERROR ./mk: Unhandled error for: mv /home/user/lbmk/tmp/me.bin /home/user/lbmk/cache/tmpdl/check

This revert should fix the issue, for now.
2025-05-20 20:14:09 +01:00
Leah Rowe
fb7aaa78bb vendor.sh: optimise find_me()
i'm adding characters to 7ztest, which isn't being passed
on through because everything runs in subshells; the next
pass would default back to the original string, so a given
file may be checked multiple times.

fix this by mitigation; use the random string from mktemp
as a suffix instead.

in practice, this has not affected performance much, but it
will nevertheless avoid unnecessary work by xbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-20 02:58:33 +01:00
Leah Rowe
903f78bf08 get.sh: add missing check in fetch_project()
we check the main url, but not backup urls.

this patch fixes that oversight.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-19 23:13:29 +01:00
Leah Rowe
f15bb8153a get.sh: stricter URL check in xbmkget()
don't skip if the URL is empty. throw an error instead.

i decree that all links must be properly initialised, because
that is the design of lbmk. where only one link is provided,
such as in a local copy operation, the second would succeed no
better than the first so two identical paths are given.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-19 23:09:37 +01:00
Leah Rowe
cdc0fb49e1 get.sh: make xbmkget() easier to understand
the intent once again is that this for loop shall
return, with zero status, if success is observed.

otherwise, the loop breaks and an error is thrown.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-19 23:07:01 +01:00
Leah Rowe
620c1dd6fa get.sh: Make xbmkget err on exiting the loop check
The idea in this function is that if a file or repo is
successfully handled, a return will be performed from the
loop.

If the loop exits for any reason, an error is thrown. The
current code is probably fine, but I can forsee future
modifications possibly causing bugs here.

Make it unambiguous, by always throwing an error if execution
reaches the end of the function.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-19 22:59:20 +01:00
Leah Rowe
900da04efa tree.sh: fix up copy_elf(), bad for loop
Because of how sh works, having just the [] line causes
sh to exit, annoyingly without an error message, but it
does cause a non-zero exit.

This bug will have already been triggering, before I added
the recent error handling on files for this for loop.

also do it to the other loop in lib.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-19 19:58:55 +01:00
Leah Rowe
8aaf404dde lib.sh: Use while, not for, to process arguments
This is more reliable against globbing, in context of for.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-19 19:29:59 +01:00
Leah Rowe
d9c64b2675 xbmk: stricter handling of files on while loops
i overlooked these!

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-19 19:24:43 +01:00
Leah Rowe
b25a487643 init.sh: looser XBMK_THREADS validation
on child processes, we can simply correct it.

we currently provide an error message, but this is silly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-19 18:53:22 +01:00
Leah Rowe
769a97aed5 init.sh: Hardcode XBMK_CACHE for integrity
I never really intended for this to be configurable,
but the cache directory is also used during release
builds.

There's too much that can go wrong, letting the user
decide where their cache is. Simplify it by hardcoding.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-19 18:50:06 +01:00
Leah Rowe
265ec0b767 dependencies/debian: add libx86
already present on a few other config files, e.g. arch

i noticed on debian-experimental that i needed to explicitly
install it, whereas it was implicitly installed on debian 12

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-19 17:40:44 +01:00
Leah Rowe
2702a43a86 init.sh: merge xbmk_lock() with xbmk_set_env()
it's just two lines, and we want much more granular
control of where the lock is enforced. it should be
JUST after confirming that the instance is a parent.

it is at this moment that we should bail if a lock
file exists, because this signals that another instance
of xbmk is running.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 13:32:24 +01:00
Leah Rowe
fc4006ce87 init.sh: move xbmk_set_version
it's called before set_pyver, so move it above that

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 13:29:51 +01:00
Leah Rowe
962902a1c4 init.sh: set pyver from set_env
it's related to this function, no point calling from main

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 13:28:31 +01:00
Leah Rowe
158c56072c init.sh: merge xbmk_mkdirs with set_env
it's just two lines, and they relate.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 13:25:37 +01:00
Leah Rowe
5f022acbf4 init.sh: check version/versiondate once read
once again, we are being stricter in child instances.

we must ensure that these variables are set by xbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 13:10:22 +01:00
Leah Rowe
485a60e2f6 init.sh: error if version not read
we no longer rely on the .git version being
read by child instances, so we MUST ensure
that it is being read.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 13:08:49 +01:00
Leah Rowe
99f09f25ef init.sh: only update version files on parent
don't update them on child instances, since it's a waste
of time; the lock file prevents further execution, so we
are just wasting time writing to disk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 13:03:09 +01:00
Leah Rowe
94437278dc init.sh: simplify unknown version creation
we don't need to read or write a file at all, in that case.
we only then need to generate one if running ./mk release.

the scenario in which no .git and no version files exist
is when someone grabs the build system from a snapshot
generated by e.g. forgejo instances. it's ill advised, so
we advise against it, but it is mitigated in code.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 12:54:31 +01:00
Leah Rowe
6b603b9fbf init.sh: only set xbmk version on parent instance
On child instances, we need only read.

Apply the principle of least privilege.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 12:07:10 +01:00
Leah Rowe
ac36ea7f95 init.sh: initialise variables AFTER path
That way, unnecessary work is avoided on child instances.

Of course, the current check assumes that TMPDIR wasn't
already set by a wily user before running lbmk, but then
those sorts of users probably know what they're doing.

If they don't know, they will soon find out. Therefore, I
have added additional checks on child instances, preventing
the build system from running if XBMK_CACHE is not set; if
it isn't, then that could very easy lead to certain system
files being overwritten.

The user must never know what happens if XBMK_CACHE is unset.
We simply will not allow it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 12:02:51 +01:00
Leah Rowe
484afcb919 init.sh: merge create_pathdirs with set_pyver
all this function does now is create the python symlink,
based on work that was already performed in set_pyver

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 11:40:58 +01:00
Leah Rowe
d0bee6b4eb init.sh: Set python version only on parent
Do it after the creation of xbmkpath.

This avoids performing an unnecessary check, since
PATH will have already been corrected for child
instances; Python will already be correct there.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 11:38:11 +01:00
Leah Rowe
4aa69a7d1f init.sh: remove useless command
we mkdir -p xbmklocal, only to remkdir it immediately
afterward, which is the intended behaviour; on parent
instances, xbmklocal is to be re-created fresh.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 11:30:11 +01:00
Leah Rowe
36ffe6ef50 init.sh: remove useless comment
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 11:29:54 +01:00
Leah Rowe
0343081d90 init.sh: xbmk_create_tmpdir to xbmk_mkdirs
this function now simply creates directories that lbmk
will use, rather than creating specific directories.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 11:28:57 +01:00
Leah Rowe
c75bc0449d init.sh: move gnupath creation to create_tmpdir
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 11:28:15 +01:00
Leah Rowe
253aa81a3f init.sh: move PATH init to set_env
we must only set this in the parent instance, not
child instances. this prevents the variable from
being over-populated with repeated entries.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 11:26:28 +01:00
Leah Rowe
e05a18d351 init.sh: check the lock file BEFORE git init
this way, initialisation will not be performed erroneously
while another parent instance of lbmk is running.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 11:21:30 +01:00
Leah Rowe
cde3b7051e init.sh: return from child in set_env instead
This is earlier than the current check, thus preventing
the initialisation of a git repository and/or the recreation
of xbmktmp and xbmklocal by erroneous parent executions of lbmk
while another parent is running - the latter of which could have
caused a massively unpredictable build failure, so this is also
a pre-emptive bug fix, fixing all kinds of weird bugs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 11:18:45 +01:00
Leah Rowe
7ec9ee4228 inject.sh: shorten the nukemode variable name
just call it "nuke". this is what tells whether to remove
vendor files from an archive.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 11:12:20 +01:00
Leah Rowe
b48eb161e4 vendor.sh: simplify mksha512sum()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 11:10:57 +01:00
Leah Rowe
ac609d5aae vendor.sh: Remove _dest if it's bad
Also, provide more ample warning to the user

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 10:59:16 +01:00
Leah Rowe
a3e1ed9823 release.sh: rename relsrc to rsrc
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 10:51:03 +01:00
Leah Rowe
44df3b2bff release.sh: tidy up nuke()
i wasn't ok having that variable initialisation and
then the commands on the same line. it looks messy.

having the commands on a separate line makes the code nice
to read, so let's separate them.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-18 10:33:23 +01:00
Leah Rowe
3c58181f69 get.sh: remove useless message
the user doesn't care where the temporary git repo is

git shows that information anyway, in the git clone command

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-17 16:53:23 +01:00
Leah Rowe
01a0217c1e get.sh: simplify bad_checksum()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-17 16:51:12 +01:00
Leah Rowe
4ca57943d7 release.sh: simplify nuke() EVEN MORE, yet again
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-17 16:03:08 +01:00
Leah Rowe
47a3982bbe release.sh: use x_ on find command for nuke()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-17 15:49:24 +01:00
Leah Rowe
6dc71cc024 release.sh: simplify nuke() EVEN MORE
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-17 15:38:20 +01:00
Leah Rowe
05c07f7401 get.sh: move nuke() to release.sh
we really only need it there, because the context is
for release archives. normal use of the git repository
doesn't matter in the context of deletions, because that
will not be distributed. only the result of ./mk release
will be distributed.

the builds produced will not change as a result of this,
for people using the normal git repository, because the
files in question are never used anyway, in our configs.

this is being done to make working on local repos easier.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-17 15:20:02 +01:00
Leah Rowe
587d245caf release.sh: simplify prep_release_bin()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-17 13:17:09 +01:00
Leah Rowe
136bd66c28 mrc.sh: merge extract_mrc with extract_shellball
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-17 13:00:17 +01:00
Leah Rowe
dbe109d7b5 release.sh: don't move src/docs/
otherwise, ./mk -b (without argument) will fail, on release
archives. also, perhaps i should add an mkhelper to build it?

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-17 12:43:25 +01:00
Leah Rowe
840d6a1d27 get.sh: FURTHER simplify nuke()
this is getting almost comical now

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-17 12:17:36 +01:00
Leah Rowe
d2564fd945 get.sh: simplify tmpclone()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-17 11:08:06 +01:00
Leah Rowe
6dea381614 get.sh: fix bad mkdir command
this is the mkdir call that createsn the directory where
a cached git repository is moved to, during creation.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-17 09:46:54 +01:00
Leah Rowe
6a2ed9428b vendor.sh: Fix broken KBC1126 insertion
On release archives, I overlooked the previous change to
downloads, during the recent implementation of extra safety
checks. I previously checked there whether the variable named
CONFIG_KBC1126_FIRMWARE was defined, and grabbed both; now I
check CONFIG_KBC1126_FW1 and CONFIG_KBC1126_FW2 separately,
grabbing each file separately.

This patch replicates that change for insertions. Otherwise,
hash verification on ROM images will fail, when running the
inject script on release images.

Downloading was being done, reliably, and the extracted files
were correct, so there was no danger if the user was building
from source and flashing that way.

However, checksum verification on full images failed when
inserting into archives. This is not because the files were
wrong; they were *correct*. However, the EC firmware was not
being inserted *at all* on HP EliteBooks, because of this
oversight. The check is now based on whether the paths to
the files themselves are defined, not whether EC firmware
is enabled in the coreboot config; the latter is implied.

With this patch, vendor file insertion once again works
perfectly, without error, on every board. There was no real
danger for users, just a minor inconvenience. Sorry!

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-16 09:44:34 +01:00
Leah Rowe
4313b474a5 vendor.sh: additional safety check
the exit from mkdst can also be non-zero if mv or cp
failed, but there's no way to handle that reliably.

therefore, the checksum verification should be done
one final time, to compensate.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-16 07:03:08 +01:00
Leah Rowe
d668f3a352 vendor.sh: Properly verify SHA512SUM on extraction
I currently check the downloaded files e.g. .exe file, but
then I don't check - or even define - sha512sums for the
files extracted from them e.g. me.bin

This patch fixes that. It also caches the hashed files, so
that extraction is faster on a re-run - this makes release
builds go faster, when running ./mk release

If a checksum is not defined, i.e. blank, then a warning is
given, telling you to check a specific directory. This way,
when adding new vendor files, you can add it first without
specifying the checksum, e.g. me.bin checksum. Then you can
manually inspect the files that were extracted, and define it,
then test again.

In a given pkg.cfg for config/vendor, the following variables
are now available for use:

FSPM_bin_hash for fsp m module
FSPS_bin_hash for fsp s module
EC_FW1_hash for KBC1126 EC firmware (1st file)
EC_FW2_hash for KBC1126 EC firmware (2nd file)
ME_bin_hash for me.bin
MRC_bin_hash for mrc.bin (broadwell boards)
REF_bin_hash for refcode (broadwell boards)
SCH5545EC_bin_hash for sch5545 firmware (Dell Precision T1650)
TBFW_bin_hash for Lenovo ThunderBolt firmware (e.g. T480/T480s)
E6400_VGA_bin_hash for Dell E6400 Nvidia VGA ROM

In practise, most people use release archives, and the
inject script, so I knew those were reliable, because the ROM
images were hashed prior to removing files. This patch benefits
people using lbmk.git directly, without using release files,
because now they know they have a valid file e.g. me.bin

Previously, only the download was checked, not the extracted
files, which meant that the only thing preventing a brick was
the code not being buggy. Any number of bugs could pop up in
the future, so this new level of integrity will protect against
such a scenario, and provide early warning prompting bug fixes.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-16 05:39:18 +01:00
Leah Rowe
a191d22bd6 get.sh: add missing eval to dx_ in nuke()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-15 02:41:04 +01:00
Leah Rowe
c8813c9a14 properly exit 1 when calling fx_
in a few places, we use the presence of a file found
by fx_ to cause an exit, but the command that runs
looks something like:

exit 1 "string"

this yields an error, and a non-zero exit, because of
too many arguments to "exit", but we wanted a non-zero
exit anyway.

nevertheless, this is incorrect.

to fix it, eval is used instead. if the never-going-to-exist
condition one day exists where exit 1 actually returns, not,
you know, exits, we will use err instead, with the string
as argument.

this should be fine. it's a bit hacky, but so is fx_, and
it works. fx_ is used in several places to keep the sloccount
down, providing a common way to perform while loops on the
output of a command; that is its only purpose..

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-15 02:25:02 +01:00
Leah Rowe
208dfc89bd get.sh: simplify nuke()
more specifically, re-write it so that it can be called with fx_

this means that the single-tree check for nuke.list can be made
much simpler

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-15 02:12:04 +01:00
Leah Rowe
46f42291d3 get.sh: fix broken printf statement
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-14 18:06:29 +01:00
Leah Rowe
f29aa9c8d5 get.sh: use subshells on try_ functions
This way, we can use x_ which will then print the command
that failed, if we need to debug future errors.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-14 17:03:32 +01:00
Leah Rowe
e62886deda get.sh: simplify try_copy()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-14 16:59:59 +01:00
Leah Rowe
d9ed03f9ea get.sh submodules: Don't delete files recursively
I overlooked this in a previous patch. It doesn't really
matter, since we're operating on a file anyway, but it's
not correct.

Files should have rm -f on them, not rm -Rf, for deletion.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-14 16:52:33 +01:00
Leah Rowe
8d5475ed5b get.sh: simplify fetch_submodules() config check
We already do what the old code does in setcfg, by
virtue of the fact that the st variable is later
checked, after loading this config conditionally,
where the st variable is otherwise blank.

We can avoid the unnecessary work after loading
the config, by returning if the config is absent.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-14 16:48:25 +01:00
Leah Rowe
21867b7d80 get.sh: simplify fetch_submodules()
We are calling xbmkget in the same way, whether it's
a subfile or subrepo.

Rename these variables to subcurl and subgit, so that we
can call xbmkget unconditionally.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-14 16:39:51 +01:00
Leah Rowe
e9fe5a74a2 get.sh: fix caching of crossgcc tarballs
they were always re-downloading every time.

i've basically re-written most of xbmkget.

there was some erroneous conditions under which
it wrongly deleted the cached file, resulting in
it being downloaded again.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-14 16:28:29 +01:00
Leah Rowe
6089716f07 release.sh: Don't run prep_release with fx_
The result of the printf statement is sorted, making
it do binaries first, which results in a lot of junk
files then being present inside the source archive.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-13 22:17:37 +01:00
Leah Rowe
b04c86e574 git.sh: rename to get.sh
it now handles more than just git, and i forsee
it handling even more in the future, e.g. rsync,
ftp, bittorrent.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-13 22:00:28 +01:00
Leah Rowe
3c23ff4fa1 git.sh: Only create destination repo on success
Don't leave a broken cache laying around, which would
otherwise break lbmk for the user.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-13 21:57:34 +01:00
Leah Rowe
ed8a33d6fb git.sh: cleanup
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-13 20:47:41 +01:00
Leah Rowe
1ca26c5d23 git.sh: Re-implement redundant git downloads
And this time it works.

I'm now calling xbmkget() which in turn calls tmpclone(),
instead of me calling tmpclone() directly.

The git-pull is done on both remotes, regardless of whether
the first succeeds. This way, if I forgot to update a mirror,
downloads would probably still work.

This also fixes an issue people were having, for example where
the gnulib repository of GRUB was always being downloaded
every time.

I'm using a new directory, XBMK_CACHE/clone, instead
of XBMK_CACHE/repo (which I used before), in case people
still have the old caches from before.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-13 20:25:37 +01:00
Leah Rowe
e38805a944 rom.sh: reduce indendation in check_coreboot_utils
call it via fx_, instead of using a for loop

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 21:32:07 +01:00
Leah Rowe
6bf24221e6 release.sh: simplify release()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 21:11:34 +01:00
Leah Rowe
66f7ecdb2d release.sh: clean up the vdir after release
do this after moving the version directory within it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 21:04:48 +01:00
Leah Rowe
d4c0479093 release.sh: remove src_dirname variable
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 20:25:35 +01:00
Leah Rowe
6d3a6347c3 release.sh: build in tmp directory first
don't move to the real directory until the work
is done.

that way, a re-try can be done, while analysing
the old files. it is created based on the tmpdir,
under XBMK_CACHE/

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 20:23:41 +01:00
Leah Rowe
a0105e1ab4 release.sh: remove unnecessary mkdir command
the following git clone command creates that directory

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 20:07:50 +01:00
Leah Rowe
f4871da9bc release.sh: split up build_release()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 19:49:50 +01:00
Leah Rowe
c85aff5c54 release.sh: delete tmp/cache from the tarball
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 19:29:58 +01:00
Leah Rowe
92954eeb38 lib.sh: remove rmgit()
We don't need to call it from git.sh, because it's
only being done when building a release anyway,
and we already run rmgit when doing a release.

The function itself is only two simple fx_ calls,
so we can just do that from build_release().

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 19:20:50 +01:00
Leah Rowe
05b5914b35 lib.sh: remove mk()
i don't need it. i can use fx_ instead, on functions
that previously called mk().

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 18:05:32 +01:00
Leah Rowe
c9696e2333 lib.sh: move xbmkget() to git.sh
in cbmk, it's only used from there.

in lbmk, it's also used from vendor.sh.

however, i plan to further expand git.sh at
some point, tidying it up so that git cloning
is also done from xbmkget, with dlop=git and
git.sh would then be renamed to get.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 16:30:05 +01:00
Leah Rowe
23913bb8d2 lib.sh: move mksha512sum() to vendor.sh
this is unused in cbmk.

it's only used from vendor.sh.

therefore, lbmk shall have it in vendor.sh.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 16:20:34 +01:00
Leah Rowe
80f0562e8d lib.sh: split up try_file()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 15:44:31 +01:00
Leah Rowe
89cd828e87 lib.sh: move _ua to try_file()
it's only used there

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 15:32:50 +01:00
Leah Rowe
308a9ab1e1 mrc.sh: minor cleanup
group the cbfs command to the extract command, since they
are related. this makes it clearer that the following
command to extract refcode is unrelated.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 15:06:25 +01:00
Leah Rowe
40163dcfa4 mrc.sh: update copyright year to include 2025
I've made several modifications to the file, this year.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 15:05:21 +01:00
Leah Rowe
ef800b652c inject.sh: remove the hashfiles variable
we only use it once, and it's a trivial string

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 14:52:27 +01:00
Leah Rowe
311ae2f8df inject.sh: define xchanged here instead
this is used here, and also needed in cbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 14:49:14 +01:00
Leah Rowe
76f81697e6 vendor.sh: remove check_vcfg()
We don't need it. The vfile variable is only used in
one place, and only once, for use with setcfg.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 14:47:43 +01:00
Leah Rowe
97d4d020d9 vendor.sh: simplify getvfile()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 14:30:27 +01:00
Leah Rowe
57f896ac01 vendor.sh: simplify setvfile()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 14:23:32 +01:00
Leah Rowe
3879f6c4d8 lib.sh: use fx_ in rmgit()
with fx_, i have more much granular control over
how errors are handled.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 13:21:59 +01:00
Leah Rowe
0911a5a5ae lib.sh: split up xbmkget()
it was too complicated. most of the logic has been moved
to a new function, try_file()

the for loop is handled by xbmkget(), whereas each try
is now handled in try_file()

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-12 13:16:10 +01:00
Leah Rowe
a449afb287 inject.sh: only compile nvmutil if needed
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-11 00:56:28 +01:00
Leah Rowe
2bbf2ae80b inject.sh: simplified serprog check
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-11 00:52:47 +01:00
Leah Rowe
9c27b7437c vendor.sh: tidy up variables
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-11 00:43:34 +01:00
Leah Rowe
0cc816167b vendor.sh: split up setvfile()
split the actual bootstrapping to getvfile()

setvfile only sets the config, but then it will
call getvfile() to act on that config.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-11 00:39:01 +01:00
Leah Rowe
7d90d43425 remove another confusing message
the current message says the file name, and implies that
the given file has already been updated.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-10 20:51:38 +01:00
Leah Rowe
a0c436ad4b inject.sh: Remove confusing path on tar creation
The path is wrong. The correct path is printed afterward.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-10 20:48:38 +01:00
Leah Rowe
dcfd3e632e inject.sh: re-add mac address confirmation
it just makes the script more user-friendly

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-10 20:23:46 +01:00
Leah Rowe
e5af201060 inject.sh: further cleanup for vendor.sh
i moved out more code to vendor.sh, to reduce the
amount of lbmk-only code on inject.sh

this should reduce the number of merge conflicts
even further, when cherry picking from lbmk to cbmk.

in particular, vendor file insertion is now handled
entirely through the "setvfile" function, instead
of from inject.sh, which seems counterintuitive,
but remember that inject.sh also does MAC addresses.

therefore, the inject.sh script is now primarily for
inserting MAC addresses, and handles vendor downloads
in a slightly more convoluted way, but still easy
enough to understand if you read it a bit.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-10 20:06:41 +01:00
Leah Rowe
0aa99f4bf8 tree.sh: only create elfdir in copy_elf()
otherwise, we create empty directories where build.list
doesn't exist, like on coreboot.

we already create a directory when needed, when actually
copying elf files, so let's just leave it at that.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-10 17:58:22 +01:00
Leah Rowe
a8e374020c tree.sh: simplified srcdir check on make-clean
this is the check that ksips a given target if the tree
directory does not exist, on the clean command.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-10 17:19:00 +01:00
Leah Rowe
0f931b508a inject.sh: split to vendor.sh the download parts
to the extent feasible, keep lbmk-specific parts on
inject.sh to a minimum. this will later be used to
re-sync cbmk's inject.sh with lbmk's, because cbmk's
one doesn't handle vendor files.

the way this is designed now, with this patch, will
make cherry-picking lbmk to cbmk easier in the future,
when keeping this part of cbmk in sync with lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-10 13:03:16 +01:00
Leah Rowe
3554b5aad9 inject.sh: split up the inject functions
generally go for a more linear function order, and
split up any functions.

the objective is to have functions only suitable to
libreboot be separate. more splitting will be done,
and eventually the vendor-download functions will be
split into a new file, as will several other functions.

this is being done as part of an effort to bring the
libreboot and canoeboot versions of inject.sh in sync,
so that from now on, cherry picking between the two
projects will produce fewer merge conflicts and require
a lesser amount of post-merge maintenance.

some other minor cleanup has also been done; for example,
the "need_files" variable is redundant and was removed.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-10 10:45:48 +01:00
Leah Rowe
81dbde7e09 lbmk: use x_ instead of err, where appropriate
many places in lbmk used err, because older versions
of x_ did not handle globbing properly.

however, use of x_ is preferable on trivial commands.

the only time err() should be called is what it has
to be, when x_ can't work, or when a more useful error
message is needed, for context.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-09 20:54:23 +01:00
Leah Rowe
14d46abced mrc.sh: operate on refcode in tmp area first
that way, the Intel GbE device can be enabled there,
and only then would the refcode file be copied.

otherwise, the current behaviour would leave buggy
refcode in place, if the dd command failed.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-09 20:31:00 +01:00
Leah Rowe
6e521c2e1e mrc.sh: fix outdated info in the comment
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-09 20:21:58 +01:00
Leah Rowe
23486abef3 inject.sh: use direct comparison for metmp
use of the e function would slow down execution,
and it's mostly unnecessary in this case.

the e function is only needed if we want to confirm
via user message that a file exists. that is not
needed here.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-09 00:26:33 +01:00
Leah Rowe
91220ce183 inject.sh: use subshell to speed up find_me()
the current test allows a further extraction after
running mecleaner, even if me.bin was found.

further, any recursive calls that exit non-ze
don't lot the loop acthually stop, unless we
subshell that too, otherwise fx_ is returned to
return 0 when a given command it runs returns 1,
or more specifically: the for loop in x_ breaks.

this is by design, and there's not much that can
be done, but this patch should pseed up extraction
a little bit, when dealing with intel me files.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-09 00:20:33 +01:00
Leah Rowe
ff33ec3352 mk: use zero exit instead, to run trees
that way, with set -u -e, we aren't risking some
buggy sh implementations from causing an error exit
where it shouldn't.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-08 23:41:24 +01:00
Leah Rowe
c2b627dc6d remove useless comment
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-08 23:36:44 +01:00
Leah Rowe
066402b7e7 mk: remove unnecessary line break
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-08 23:35:40 +01:00
Leah Rowe
7012c00ed1 mk: re-split tree logic to include/tree.sh
I really think mk should just be a small stub.

Better to keep everything separate.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-08 23:33:49 +01:00
Leah Rowe
50ce1ac9b2 mk: move release functions to idnclude/release.sh
The idea with mk is that it's meant to basically be a
stub for running everything else, while mainly having
the trees logic within it (what was once script/trees).

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-08 23:28:49 +01:00
Leah Rowe
1ce3e7a3d3 mk: add missing error handli for mk -f
on the release command, that is

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-08 22:17:35 +01:00
Leah Rowe
0d876622fc git.sh: re-write tmpclone without caching
remove caching for now. it's buggy as hell.

will re-write the caching feature next.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-08 22:14:43 +01:00
Leah Rowe
454f11bdd7 git.sh: use setvars for fail variables
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-08 21:50:17 +01:00
Leah Rowe
6bdb15fd32 git.sh: hard fail if git am fails
similar to the last patch, we must ensure that the
inability to patch will cause a hard exit, regardless
of any redundancy we have for cloning.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-08 21:36:37 +01:00
Leah Rowe
93d4eca04a git.sh: Hard fail if reset fails
We allow a re-try when cloning fails, to account
for redundancy, but resetfail currently doesn't
cause any error exit at all.

This patch mitigates that bug.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-08 21:33:17 +01:00
Leah Rowe
a3ba8acfac init.sh: Only check XBMK_CACHE if it exists
Otherwise, if it doesn't exist, the current check will
wrongly exit with error status, preventing you from
running the build system at all!

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-08 20:49:49 +01:00
Leah Rowe
021e7615c8 HP 820 G2: Use fam15h cbfstool tree for refcode
We used cbfstool from coreboot 4.13, because it was the
last version to work with the particular format used
for stage files, before the CBFS standard changed in newer
releases of cbfstool.

When I added this board to Libreboot, it was source-only at
first so it didn't matter. I didn't want to do a standalone
cbfstool binary, in case some people decided to use that one
on newer boards, which would cause all sorts of issues.

So I bodged it and just included an import of coreboot 4.13.

Well, the cbfstool from coreboot 4.11, as used for FAM15H
AMD boards, is compatible. I checked the code diff between
the two, and there is no meaningful difference.

I've tested this, and it works, since the last release or
two now includes 820 G2 images, so I  was able to use those
with ./mk inject, to verify whether the refcode file is
still grabbed properly. We need the refcode to handle MRC
on Broadwell platform, but we extract it from an old Google
Chromebook image, that uses the old CBFS stage file layout.

This change solves my problem: the problem was that releases
are bloated further, due to including this extra coreboot
version. This should reduce the size of the next release
considerably, especially after decompressing the tarball.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-08 20:46:05 +01:00
Leah Rowe
fe92605244 also fix the other grub trees
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-08 11:12:34 +01:00
Leah Rowe
a8594762d2 Merge pull request 'fix trying to boot all logical volumes after unlocking an encrypted volume' (#330) from cqst/lbmk:master into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/330
2025-05-08 10:11:13 +00:00
cqst
e084b06dc7 fix trying to boot all logical volumes after unlocking an encrypted volume 2025-05-08 02:28:58 -07:00
Leah Rowe
2cea8517f3 init.sh: remove useless export
we already reset to n if not y, afterward

just rely on that

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 21:16:50 +01:00
Leah Rowe
1b0afdcea2 init.sh: also allow XBMK_RELEASE=Y or N
as opposed to =n or =y

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 19:23:32 +01:00
Leah Rowe
570f1417a8 init.sh: Resolve XBMK_CACHE via readlink
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 19:14:36 +01:00
Leah Rowe
e1af1055ed init.sh: check XBMK_CACHE is a directory instead
it doesn't matter if it's not a file. that's the wrong check.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 19:09:29 +01:00
Leah Rowe
e1628ad8f3 init.sh: export LOCALVERSION in set_env
Don't do it in set_version

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 19:04:52 +01:00
Leah Rowe
40a944118f init.sh: run set_version before set_env
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 19:03:51 +01:00
Leah Rowe
cba04aa74b init.sh: Use readlink in pybin()
Use realpath only as a fallback.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 19:00:13 +01:00
Leah Rowe
a94bd3c093 inject.sh: simplify extract_kbc1126ec()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 17:08:42 +01:00
Leah Rowe
e3098c61f4 inject.sh: simplified MAC address handling
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 17:00:41 +01:00
Leah Rowe
d530e68594 inject.sh: Simplify patch_release_roms()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 16:53:57 +01:00
Leah Rowe
7f71328f0e lib.sh: Remove useless command in err()
We don't need this, since we're exiting anyway.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 16:23:12 +01:00
Leah Rowe
394b4ea7a5 inject.sh: rename copytb and preprom functions
make them shorter so they go on one line again

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 15:17:45 +01:00
Leah Rowe
ec5c954337 lib.sh: Simplified fx_() and removed fe_()
Instead of calling fe_, prefix x_ as indicated.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 15:12:10 +01:00
Leah Rowe
1390f7f800 mk: Create serprog tarballs here instead
i simplified rom.sh to use mkhelper for actual image
building.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 14:21:28 +01:00
Leah Rowe
0ef77e6583 build serprog using fe_ *defined inside mkhelper*
sh macros ftw

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 14:01:50 +01:00
Leah Rowe
d2e6f989d7 rom.sh: build serprog images with fe_
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 13:44:05 +01:00
Leah Rowe
0faef89946 lib.sh: support any command on find_exec()
right now, we assume "find", but it adds any number of
arguments next to that.

change it instead to support any command, where the
assumption is that it would generate a list of files
and directories.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 13:28:55 +01:00
Leah Rowe
2b7f6b7d7c inject.sh: Simplify extract_intel_me_bruteforce()
This is probably about as small as it's going to get.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-07 10:20:59 +01:00
Leah Rowe
485d785d33 inject.sh: clean up tmp me file before extract
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-06 21:16:06 +01:00
Leah Rowe
fac99aa2d4 lib.sh: re-add missing break in fe/fx_
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-06 20:24:32 +01:00
Leah Rowe
03300766d1 inject.sh: tidy up extract_intel_me_bruteforce
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-06 19:47:08 +01:00
Leah Rowe
4781dbd2a0 inject.sh: fix oversight in me bruteforce
i used i instead of 1, in the variable when running
the extract_archive function.

this didn't trigger since +u was set, and +e was set.

in practise, then, it seems that because of this, and
because my ME extract/insert test was a success, that
none of the archives we use actually have a ME inside
of a file inside of a given downloaded archive.

still, this is technically incorrect, so fix it!

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-06 19:43:44 +01:00
Leah Rowe
cf78583a6d inject.sh: remove unnecessary check
the call stack already falls through with  a bunch of return
1s after a successful run of me_cleaner, so it's really not
necessary.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-06 19:32:18 +01:00
Leah Rowe
5657cc1afb inject.sh: don't use subshell for me bruteforce
i needed it on the old version, which used cd

this one stays in the same directory at all times

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-06 19:30:55 +01:00
Leah Rowe
5686f35e0f inject.sh: insanely optimise the me bruteforce
use fe_

fe_ ftw

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-06 18:59:32 +01:00
Leah Rowe
e8be3fd1d4 git.sh: Simplify git am handling
fx_ and fe_ really are the best shell functions ever.

really. they're the best.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-06 11:09:39 +01:00
Leah Rowe
4c1de1ad12 inject.sh: remove unused function
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-06 04:49:56 +01:00
Leah Rowe
282b939d9d init.sh: New function dx_ to execute path files
Generated by find, this is a wrapper in place of using
for loops everywhere. This simplification temporarily
increases the amount of code, because we don't do this
a lot, but this will reduce the growth of the build
system code size in future changes.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 21:37:16 +01:00
Leah Rowe
73074dedee inject.sh: Further simplified FSP extraction
We don't need the copy command at all, since the files
it copies are the only ones that the Python script does
anyway, so now we just make that script output to the
directory, directly, where these files must go.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 21:13:28 +01:00
Leah Rowe
7585336b91 inject.sh: simplify kconfig scanning
Use fe_ with a new function, scankconfig, to do the
same thing. Not only is this simpler, it now also
operates on all coreboot configs for a given target,
whereas it previously only operated on the first one.

This is useful for cases where one config might use a
file that the other one does not; in practise, we don't
do this yet, but it's a theoretical possibility

Also: don't use the function check_defconfig, which is
now redundant and has been removed.

That function also conflicted with another function by
the same name in mk, but fortunately didn't cause an
issue in practise, due to how sh works; when vendor.sh
was used, it was without running the tree commands,
except under a separate lbmk instance.

So this is a simplification, a feature enhancement and
even a bug fix, all wrapped into one!

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 21:05:45 +01:00
Leah Rowe
ef38333f8b lib.sh find_ex: Write sort errors to /dev/null
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 20:45:31 +01:00
Leah Rowe
c275f35e7e lib.sh x_(): Remove warning of empty args
It's completely unnecessary, and I forsee this
check breaking the build system at some point,
since some commands rely on the output of other
commands. Therefore, I've removed this check.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 20:41:48 +01:00
Leah Rowe
17d826d3a9 lbmk: Replace err with much simpler implementation
The current implementation is insanely over-engineered,
and completely unnecessary.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 20:38:19 +01:00
Leah Rowe
f98e34a24d singletree/elfcheck: use fx_, not fe_
fe_ returns an error on the find command, but we rely
on the only error ever being our intentional exit, upon
discovering files.

in singletree, the directory being checked was already
checked first, so we know it's safe not to err on find;
and find not reporting an error if no files are found is
ok.

on elfcheck, it's very much the same thing. In fact, we
very much want it to return 0 if the directory doesn't
exist, or if files don't exist within it.

Therefore, use fx_ which is designed for this use-case.

Quick re-cap: fx and fe execute a given function name with
each line outputting by find as an argument, each time. It
is somewhat similar in scope to find's -exec command.

We use fe_ as shorthand in several places all over lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 20:33:02 +01:00
Leah Rowe
8ca06463eb rom.sh: Print the rom image path being generated
This message used to exist, and it's a nice feedback
for the user, to confirm that the build went OK.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 18:14:44 +01:00
Leah Rowe
dc9fe517cb rom.sh: Safer cprom()
Don't insert special files like GRUB keymaps after
copying to the final destination.

Instead, copy the tmprom to /tmp and operate on that,
in these instances.

This is less efficient, depending on the user's
configuration; if /tmp is on the same file system as
the user's xbmkpwd, it should be fine. However, the
actual performance hit isn't that bad in practise,
on most setups.

If the user's /tmp is a tmpfs, then that means using
tmpfs, but it's one image at a time. It should be OK.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 18:08:55 +01:00
Leah Rowe
2be8d1c798 rom.sh: specifically check keymaps in cprom()
"not seauboot" is a valid check at present, but if
i start supporting other arguments in the future,
this code would have to change.

therefore, i change it in advance, on that theory.

this new check is more technically correct. these
lines are triggered when inserting grub keymaps.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 17:53:43 +01:00
Leah Rowe
89a8cd4936 rom.sh: simplify mkseagrub()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 17:48:57 +01:00
Leah Rowe
c2182d8219 mk: simplify elfcheck()
fe_() called inside subshell, ftw

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 15:51:04 +01:00
Leah Rowe
437ac2454c lib.sh: simplify singletree()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 15:40:08 +01:00
Leah Rowe
62ec3dac07 git.sh: move singletree() to lib.sh
it's also used by mk, to determine which build function
to use (build_project or build_targets).

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 15:31:33 +01:00
Leah Rowe
6b247c93e2 mk: Fix bad error handling for gnu_setver
I mixed logical OR and AND by mistake. Oops!

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 12:16:18 +01:00
Leah Rowe
ee8bb28ba2 GRUB: Mark E820 reserved on coreboot memory
See, coreboot bug report:

https://ticket.coreboot.org/issues/590

We hadn't noticed this for quite a while, since we always
just booted with iomem=relaxed when needing to run cbmem,
since in practise it was always combined with other tasks
that require access to lower memory.

GRUB currently matches coreboot's own mmap for cbmem, but
for example SeaBIOS marks cbmem as E820 reserved. Therefore,
this change replicates the SeaBIOS behaviour.

Without this patch, Linux needs to boot with iomem=relaxed
for cbmem access, for example when running ./cbmem -1

With this patch, cbmem is now accessible regardless. This
patch also prevents Linux from overwriting parts of CBMEM.

Thanks go to Paul Menzel, who wrote this GRUB patch.

Thanks also go to Nicholas Chin, who provided testing, all
the way from Coreboot 25.03 back to Coreboot 4.20. It seems
that this is just something the payloads have to handle.

This means that both SeaBIOS and GRUB no longer have this
bug, in Libreboot; now what remains is to replicate the
test with our U-Boot payload.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 12:16:18 +01:00
Leah Rowe
61ec396ef6 inject.sh: simplify extract_intel_me_bruteforce()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 12:16:18 +01:00
Leah Rowe
e4edc2194d inject.sh: Remove unnecessary check
_dest is already checked in the calling function fetch(),
after extract_tbfw() has been called.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 12:16:18 +01:00
Leah Rowe
f4057d7daa inject.sh extract_intel_me(): reduce indentation
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 12:16:18 +01:00
Leah Rowe
b7ca59debe inject.sh: Move FSP extraction only to extract_fsp
Don't do FSP-specific extraction in extract_archive, as
that is not what the latter is for.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 12:16:07 +01:00
Leah Rowe
eb882de94c inject.sh: tidy up intel me handling
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 05:43:38 +01:00
Leah Rowe
153dd76a82 inject.sh: tidy up the deguard command
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 05:41:21 +01:00
Leah Rowe
428c46ca2b lib.sh: set -u -e in err()
Some parts of lbmk set +u +e, to be reset later on
under normal conditions upon exit. We must ensure
such level of integrity in err() as well.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-05 05:20:47 +01:00
Leah Rowe
20c8730858 lib.sh: Provide error message where none is given
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 16:53:02 +01:00
Leah Rowe
35265731c5 init.sh: Silence the output of git config --global
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 16:50:50 +01:00
Leah Rowe
5e3aaa1eb8 init.sh: Run git name/email check before init
Otherwise, it returns if init is already done, which
later leads to build errors in coreboot.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 16:49:30 +01:00
Leah Rowe
a3b5626f53 lib.sh: stricter xbmk_err check in err()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 16:35:31 +01:00
Leah Rowe
51b2a1159d lib.sh: simplify err-not-set handling
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 16:31:08 +01:00
Leah Rowe
61e5fd1a0b lib.sh: Add warning if x_ is called without args
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 16:28:22 +01:00
Leah Rowe
4020fb4328 lib.sh: simplify err()
Rely once again on err_, but still explicitly add an exit
just below, in case I made a mistake one day.

err() is essentially a trap that triggers in case I mess
up an error function, so that it doesn't reliably exit.

So, the idea is that everything calls err(), and err() is
almost never modified, or modified very carefully.

If error exits were ever broken, the result could be quite
unpredictable, so lbmk has very strict error handling, and
great care is taken to ensure that it does reliably exit.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 16:23:11 +01:00
Leah Rowe
b51846da6d init.sh: single-quote xbmklock in xbmk_lock()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 16:14:50 +01:00
Leah Rowe
8b7bd992f6 init.sh: define lock file in a variable instead
don't hardcode it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 16:12:23 +01:00
Leah Rowe
9611c19e7e init.sh: tidy up xbmk_child_exec()
make the command style more consistent, for example
relying on x_ inside a subshell to print the command
and arguments if a command failed.

this is a good style, and i'll probably use it in other
places on lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 16:03:34 +01:00
Leah Rowe
37ca0c90e1 lib.sh err: add missing redirect to stderr
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 10:18:33 +01:00
Leah Rowe
54291ebb72 lbmk: MUCH safer err function
Don't directly call a variable. Call a function that
checks the variable instead.

The new err function also checks whether an exit was
actually done, and exits 1 if not.

If an exit was done by the given function, but the exit
was zero, this is also corrected to perform an exit 1.

This fixes a longstanding design flaw of lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 10:13:42 +01:00
Leah Rowe
3f7dc2a55f lib.sh: rename errx to xmsg
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 09:17:23 +01:00
Leah Rowe
59c94664e3 lib.sh: Make x_ err if first arg is empty
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 09:14:09 +01:00
Leah Rowe
91bb6cbede lib.sh: Make err_ always exit no matter what
Always certainly redundant, since if -u -e isn't
set, it'll continue to exit anyway.

However, we want to be pedantic about this, since
the safety of lbmk relies entirely on this function
NOT misbehaving.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 09:10:24 +01:00
Leah Rowe
b19c4f8f67 inject.sh: tidy up TBFW handling
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 08:50:23 +01:00
Leah Rowe
439020fbda inject.sh: remove useless comment block
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 08:47:56 +01:00
Leah Rowe
6e447876cc init.sh: tidy up the python version check
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 08:47:12 +01:00
Leah Rowe
7392f6fc8e init.sh: move non-init functions to lib.sh
these were missed in a previous cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 08:33:17 +01:00
Leah Rowe
7acec7a3a1 init.sh: simplify dependencies handling
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 08:29:19 +01:00
Leah Rowe
93ba36ae45 rom.sh: tidy up copyps1bios()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 08:19:17 +01:00
Leah Rowe
fc71e52fdf mk: tidy up xgccargs handling
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 08:15:00 +01:00
Leah Rowe
184871bc17 mk: remove useless code
this was added a few commits ago, but the previous commit
made me realise it's not needed at all.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 08:10:59 +01:00
Leah Rowe
b6a2dc4ea3 init.sh: tidy up pathdir creation
we can use remkdir here. it does the same thing.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 08:10:36 +01:00
Leah Rowe
f5b2bdb886 mk: re-make gnupath/ after handling crossgcc
instead of deleting every file within

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 08:07:53 +01:00
Leah Rowe
1b7a9fd637 mk: tidy up check_cross_compiler
only initialise variables at the point they're needed.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 08:07:06 +01:00
Leah Rowe
488d52e784 mk: re-make gnupath/ for each cross compiler
it could be that some were left over before, for some
reason. that isn't currently the case, but this will
avoid the possibility in future.

therefore, this is a preemptive bug fix.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 08:05:19 +01:00
Leah Rowe
c33467df1e mk: reduce indentation in check_cross_compiler()
we only call it in one place. the resulting code is still
quite clear.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-04 08:02:14 +01:00
Leah Rowe
aa4083443b mk: Allow use of x_ on prefix functions
Use this for the sha512sum command, on the main mk
script at the function check_project_hashes().

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 18:30:37 +01:00
Leah Rowe
8f828e6cd3 mk: tidy up check_project_hashes() sha512sum check
the extra function isn't needed at all. awk can just
handle every line all at once.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 18:18:41 +01:00
Leah Rowe
7a2f33264d mk: simplify check_gnu_path()
the initial checks are unnecessary, since i always know
what arguments are being provided.

the -f check in the for loop is now an -x instead, more
efficient and complete.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 18:05:37 +01:00
Leah Rowe
46b968a6e8 inject.sh: minor code cleanup
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 13:49:49 +01:00
Leah Rowe
5499ae66bd inject.sh: simplify extract_archive()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 13:35:28 +01:00
Leah Rowe
72f4412a52 inject.sh: simplified fsp extraction
we know that _dest is always what's set in the coreboot config,
without the ../../../ in it, so just copy both files in a single
function, and call the function twice.

if both files are done on the first call, the second call will
be skipped. if only the first file was done on the  first call,
running the download script again will skip the  first one, and
grab the second one.

this also avoids having to run the decat function twice, in most
cases, so it's a tiny optimisation.

this optimisation only works if both fsp files (s and m) are to
be extracted into the same directory, which is the case anyway,
and this will always be the case.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 13:28:47 +01:00
Leah Rowe
bf569d2b4d inject.sh: Remove redundant code in copy_tbfw
We don't use the tbtmp variable anymore, in this function.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 07:20:48 +01:00
Leah Rowe
8de0ed811f inject.sh: Stricter TBFW handling
Don't copy it until it has been padded properly.

Otherwise, erroneous padding would result in an error,
and who knows what would be left in vendorfiles/ ?

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 07:17:21 +01:00
Leah Rowe
530e4109a2 init.sh: *Re-create* tmpdirs on parent instance
To make sure any old files are removed, always re-create.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 07:05:38 +01:00
Leah Rowe
498f5a26cc init.sh: Always create xbmklocal
If we're in a release work directory, TMPDIR is already
set, so the local ./tmp won't be created, which would
lead to an error.

Fix it by creating xbmklocal before checking TMPDIR.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 07:04:34 +01:00
Leah Rowe
00d22f2082 lbmk: Unified local ./tmp handling
Make it an absolute directory, relative to xbmktmp.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 07:01:19 +01:00
Leah Rowe
0f7b3691ab lib.sh: redirect find errors to /dev/null
this silences confusing error messages that the user
sees on the screen, that are actually benign, and it
will thus reduce the number of people who ask questions
on #libreboot irc

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 06:41:20 +01:00
Leah Rowe
7fadb17fd9 lib.sh: Fix bad touch command
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 06:36:43 +01:00
Leah Rowe
0b09d97073 inject.sh: Only build nvmutil once
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 06:35:48 +01:00
Leah Rowe
308df9ca40 inject.sh: always re-build nvmutil
it's not a lot of code, and takes less than a second.

the previous change uses x instead of ?, but this would
cause an error if the nvmutil was already built, because
the makefile might cause a build to be skipped.

therefore, force a re-build to mitigate the error.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 06:28:14 +01:00
Leah Rowe
44a1cc9ef8 util/nvmutil: use x, not ?, for random characters
A user reported that '?' causes an error on zsh. See:

https://codeberg.org/libreboot/lbmk/issues/261

For example:

./mk inject libreboot-XXXXXX.tar.xz setmac ??:??:??:??:??:??

The user got:

 zsh: no matches found: ??:??:??:??:??:??

The mitigation here is to double-quote, e.g.:

./mk inject libreboot-XXXXXX.tar.xz setmac "??:??:??:??:??:??"

However, a lot of people won't do that. Therefore, I will
retain the current behaviour but support x/X for randomness.

Now lbmk uses x by default, instead. I will now update the
documentation, accordingly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 06:23:10 +01:00
Leah Rowe
a17875c345 lib.sh find_ex: explicitly create the tmp file
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 05:57:39 +01:00
Leah Rowe
0ffaf5c733 init.sh: Explicitly create the xbmktmp directory
mktemp would normally do it, but we must not rely on that

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 05:33:02 +01:00
Leah Rowe
fcc52b986e init.sh: unified handling of ./tmp
not to be confused with /tmp

we use ./tmp inside the lbmk work directory, for large files,
because /tmp might not be very big, or might be a tmpfs

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 05:32:01 +01:00
Leah Rowe
47762c84ad lib.sh: add fe_ which is fx_ but err on find
In the mk script, we need fx_ to not return errors on the
find command, since it's searching a bunch of directories
where some of them may not exist.

All other instances where fx_ is used, must return an error
if the directory being searched doesn't exist.

For this, fe_() is introduced, which does the same as fx_
but with this much stricter check.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 05:25:11 +01:00
Leah Rowe
d18d1c2cae lbmk: unified execution on find commands
We have a lot of places in lbmk where the output of find is
used, and then some function is executed on the result.

This is messy, and bloats several of these functions.

Now this is unified, into a new function: fx_

What fx_ does is execute a given function, for each result
found, with the arguments for a find command appended.

For example:

find -name ".git"

If you wanted to do: foo "$arg"

Where "arg" is a search result from find, and you wanted
to execute "foo" on each one, you would do:

fx_ foo -name ".git"

The find utility does have an -exec feature, but I've found
that it only works for executables, not functions.

fx_ does not return errors, so "foo" in this example
would have to do its own error handling.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-03 05:02:31 +01:00
Leah Rowe
773d2deaca NEW MAINBOARD: Dell Precision T1700 SFF and MT
This is similar to the 9020SFF, but this board has ECC support.
However, the native raminit isn't used here, even though it is
otherwise compatible, because the native init doesn't do ECC yet.

The broadwell mrc.bin has ECC support, which is also used on the
HP EliteBook 820 G2. The MRC for broadwell can be used on haswell
boards such as the T1700.

Add both the SFF and MT variants. Since these are identical to the
9020 variants, except for slightly different PCH enabling ECC, we
can just re-use the 9020 port without issue.

We *could* add a variant to coreboot, for T1700, but there is not
really any pressing need. It is simply the 9020sff/mt with mrc.bin

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-02 17:18:55 +01:00
Leah Rowe
9b11e93686 mk: include rom.sh directly
remove it from mkhelper files, because rom.sh doesn't
initialise any variables globally, except one that
never changes.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-02 11:20:55 +01:00
Leah Rowe
1f7e4b35cb mk: Download vendorfiles before building release
Do it just after creating the src archive. This way,
everything is downloaded all at once.

Otherwise, a momentary lapse of internet uptime will
cause a release build to fail later on, and one of
lbmk's flaws is that this would then mean you must
re-build from scratch.

If we assume that the internet is working within a
short period of time, then this change would mitigate
that possibility. If something did happen during tar
archive creation, that's a much shorter amount of time
that is "wasted".

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-02 10:56:14 +01:00
Leah Rowe
acb0ea202f lib.sh: Simplify rmgit()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-02 10:52:38 +01:00
Leah Rowe
15b76bc202 lib.sh: support multiple arguments in remkdir()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-02 07:26:39 +01:00
Leah Rowe
f3ae3dbbbe lib.sh: simplify remkdir()
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-02 07:26:17 +01:00
Leah Rowe
6c4d88f268 move x_() to lib.sh
Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-02 07:24:11 +01:00
Leah Rowe
2ae565ba93 init.sh: move setvars/err_ to lib.sh
these functions make more sense in lib.sh

i made mk link lib.sh first, so that the
functions on init.sh can still use them.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-02 05:54:36 +01:00
Leah Rowe
c073ee9d4f Restore SeaBIOS 9029a010 update, but with AHCI fix
I fixed the AHCI bug, with a patch that I wrote. It works by
restoring the old SeaBIOS AHCI initialisation behaviour, whereby
the AHCI controller is enabled from its current state; the patch
that broke AHCI in coreboot (tested on ThinkPad T420), changed
AHCI initialisation behaviour so that the controller's state is
first reset, prior to enablement.

However, my patch also retains the new AHCI initialisation
behaviour, when a CSM is in use. The AHCI reset patch was done,
by the author, specifically for SeaBIOS in CSM mode, so it makes
sense to only change the behaviour conditionally according to that.

This reverts commit 8245f0b321.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-02 02:24:07 +01:00
Leah Rowe
8245f0b321 Revert "seabios: bump to rev 9029a010, 4 March 2025"
This reverts commit a08b8d94fc.

From #libreboot IRC today:

07:02 <irys> ooh this is fun. seabios commit 8863cbbd15a73b03153553c562f5b1fb939ad4d7 (ahci: add controller reset) breaks ahci entirely on t420
07:05 <irys> cbmem console on that seabios commit has a timeout then "AHCI/0: device not ready"
07:07 <irys> AHCI works fine if i change config/seabios/default/target.cfg to use the immediate previous seabios commit (df9dd418b3b0e586cb208125094620fc7f90f23d)
07:07 <irys> works in grub payload either way though
07:31 <irys> here, `cbmem -c` after booting the broken rev: https://0x0.st/84oQ.log
07:31 <irys> compared to the working one https://0x0.st/84o1.log
07:33 <irys> i can't report to upstream myself *right now* but i figure you might want to know about this leah

I have downloaded those logs locally for reference, so that an upstream
report can be made to SeaBIOS. For the purposes of this Libreboot commit,
the diff of the logs is as follows (diff -u broken.log working.log):

Taking each diff line out of the log, the relevant entries
seem to be:

Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
+AHCI/0: Set transfer mode to UDMA-6
+Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@0/disk@0
+AHCI/0: registering: "AHCI/0: Netac SSD 128GB ATA-11 Hard-Disk (119 GiBytes)"

-WARNING - Timeout at ahci_port_setup:477!
-AHCI/0: device not ready (tf 0x80)
-All threads complete.

-2. Payload [memtest]
+2. AHCI/0: Netac SSD 128GB ATA-11 Hard-Disk (119 GiBytes)
+3. Payload [memtest]

-Space available for UMB: c7000-eb800, f5880-f5ff0
-Returned 16777216 bytes of ZoneHigh
+drive 0x000f5fa0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=250069680
+Space available for UMB: c7000-eb800, f5880-f5fa0
+Returned 16773120 bytes of ZoneHigh

Therefore, the revision will be reverted back for now. It was
only about 8 additional patches imported in the update anyway.
2025-05-01 14:30:14 +01:00
Leah Rowe
4c50157234 coreboot/t420_8mb: add missing txtmode config
Reported by irys on #libreboot irc

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-05-01 14:29:22 +01:00
952 changed files with 51805 additions and 16850 deletions

1
.gitignore vendored
View File

@@ -44,3 +44,4 @@
/r
/e
/xbmkpath/
/xbmkwd/

View File

@@ -1,56 +0,0 @@
From f22f408956bf02609a96b7d72fb3321da159bfc6 Mon Sep 17 00:00:00 2001
From: Nico Huber <nico.huber@secunet.com>
Date: Tue, 22 Jun 2021 13:49:44 +0000
Subject: [PATCH 1/1] cbfstool: Make use of spurious null-termination
The null-termination of `filetypes` was added after the code was
written, obviously resulting in NULL dereferences. As some more
code has grown around the termination, it's hard to revert the
regression, so let's update the code that still used the array
length.
This fixes commit 7f5f9331d1 (util/cbfstool: fix buffer over-read)
which actually did fix something, but only one path while it broke
two others. We should be careful with fixes, they can always break
something else. Especially when a dumb tool triggered the patching
it seems likely that fewer people looked into related code.
Change-Id: If2ece1f5ad62952ed2e57769702e318ba5468f0c
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55763
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
---
util/cbfstool/common.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
index e2ed38ffc4..539d0baccf 100644
--- a/util/cbfstool/common.c
+++ b/util/cbfstool/common.c
@@ -168,10 +168,10 @@ void print_supported_architectures(void)
void print_supported_filetypes(void)
{
- int i, number = ARRAY_SIZE(filetypes);
+ int i;
- for (i=0; i<number; i++) {
- printf(" %s%c", filetypes[i].name, (i==(number-1))?'\n':',');
+ for (i=0; filetypes[i].name; i++) {
+ printf(" %s%c", filetypes[i].name, filetypes[i + 1].name ? ',' : '\n');
if ((i%8) == 7)
printf("\n");
}
@@ -180,7 +180,7 @@ void print_supported_filetypes(void)
uint64_t intfiletype(const char *name)
{
size_t i;
- for (i = 0; i < (sizeof(filetypes) / sizeof(struct typedesc_t)); i++)
+ for (i = 0; filetypes[i].name; i++)
if (strcmp(filetypes[i].name, name) == 0)
return filetypes[i].type;
return -1;
--
2.39.2

View File

@@ -1,33 +0,0 @@
From 06e8d7a9db4efe1dc2b7e5865b801a5518b38fbd Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Tue, 29 Apr 2025 17:31:13 +0300
Subject: [PATCH 1/1] Fix cbfstool build error on GCC 15 host compiler
GCC 15 now considers the unterminated-string-initialization warning as
part of -Werror by default. Coreboot compiles host utilities with the
system compiler, which results in getting this error in some files.
Mark a hexadecimal translation table in cbfstool code as "nonstring" to
avoid the warning-turned-error.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
util/cbfstool/common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
index 539d0baccf..f6fe647503 100644
--- a/util/cbfstool/common.c
+++ b/util/cbfstool/common.c
@@ -188,7 +188,7 @@ uint64_t intfiletype(const char *name)
char *bintohex(uint8_t *data, size_t len)
{
- static const char translate[16] = "0123456789abcdef";
+ static const char translate[16] __attribute__((__nonstring__)) = "0123456789abcdef";
char *result = malloc(len * 2 + 1);
if (result == NULL)
--
2.39.5

View File

@@ -1,4 +0,0 @@
# SPDX-License-Identifier: GPL-3.0-or-later
tree="coreboot413"
rev="5c186c6777c9438ff4681929c9c25c98dee28bef"

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -145,9 +146,9 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -213,6 +214,9 @@ CONFIG_BOARD_INTEL_D510MO=y
# Ptlrvp
#
# CONFIG_BOARD_INTEL_PTLRVP is not set
# CONFIG_BOARD_INTEL_PTLRVP4ES is not set
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC4ES is not set
# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
# CONFIG_BOARD_INTEL_STRAGO is not set
@@ -229,10 +233,7 @@ CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_1024=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -271,6 +272,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x80000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
CONFIG_EHCI_BAR=0xfef00000
@@ -287,12 +289,15 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
# CONFIG_TOP_SWAP_REDUNDANCY is not set
#
# CPU
@@ -317,7 +322,6 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -373,7 +377,6 @@ CONFIG_SUPERIO_WINBOND_W83627THG=y
# Embedded Controllers
#
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -386,7 +389,6 @@ CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -424,6 +426,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -442,15 +445,17 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
CONFIG_DRAM_SUPPORT_DDR3=y
CONFIG_DRAM_SUPPORT_DDR2=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
# CONFIG_SMMSTORE is not set
CONFIG_SPI_FLASH=y
@@ -642,6 +647,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -145,9 +146,9 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -213,6 +214,9 @@ CONFIG_BOARD_INTEL_D510MO=y
# Ptlrvp
#
# CONFIG_BOARD_INTEL_PTLRVP is not set
# CONFIG_BOARD_INTEL_PTLRVP4ES is not set
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC4ES is not set
# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
# CONFIG_BOARD_INTEL_STRAGO is not set
@@ -229,10 +233,7 @@ CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_1024=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -271,6 +272,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x80000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
CONFIG_EHCI_BAR=0xfef00000
@@ -287,12 +289,15 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
# CONFIG_TOP_SWAP_REDUNDANCY is not set
#
# CPU
@@ -317,7 +322,6 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -373,7 +377,6 @@ CONFIG_SUPERIO_WINBOND_W83627THG=y
# Embedded Controllers
#
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -386,7 +389,6 @@ CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -424,6 +426,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -442,15 +445,17 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
CONFIG_DRAM_SUPPORT_DDR3=y
CONFIG_DRAM_SUPPORT_DDR2=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
# CONFIG_SMMSTORE is not set
CONFIG_SPI_FLASH=y
@@ -642,6 +647,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -146,9 +147,9 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -214,6 +215,9 @@ CONFIG_BOARD_INTEL_D945GCLF=y
# Ptlrvp
#
# CONFIG_BOARD_INTEL_PTLRVP is not set
# CONFIG_BOARD_INTEL_PTLRVP4ES is not set
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC4ES is not set
# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
# CONFIG_BOARD_INTEL_STRAGO is not set
@@ -228,10 +232,7 @@ CONFIG_D3COLD_SUPPORT=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_512=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
CONFIG_COREBOOT_ROMSIZE_KB_512=y
@@ -270,6 +271,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
CONFIG_EHCI_BAR=0xfef00000
@@ -286,12 +288,15 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
# CONFIG_TOP_SWAP_REDUNDANCY is not set
#
# CPU
@@ -316,7 +321,6 @@ CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +376,6 @@ CONFIG_SUPERIO_SMSC_LPC47M15X=y
# Embedded Controllers
#
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -385,7 +388,6 @@ CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -423,6 +425,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -438,14 +441,16 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR2=y
CONFIG_DRAM_SUPPORT_DDR2=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
# CONFIG_SMMSTORE is not set
CONFIG_SPI_FLASH=y
@@ -641,6 +646,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -146,9 +147,9 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -214,6 +215,9 @@ CONFIG_BOARD_INTEL_D945GCLF=y
# Ptlrvp
#
# CONFIG_BOARD_INTEL_PTLRVP is not set
# CONFIG_BOARD_INTEL_PTLRVP4ES is not set
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC4ES is not set
# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
# CONFIG_BOARD_INTEL_STRAGO is not set
@@ -228,10 +232,7 @@ CONFIG_D3COLD_SUPPORT=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_512=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -270,6 +271,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
CONFIG_EHCI_BAR=0xfef00000
@@ -286,12 +288,15 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
# CONFIG_TOP_SWAP_REDUNDANCY is not set
#
# CPU
@@ -316,7 +321,6 @@ CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +376,6 @@ CONFIG_SUPERIO_SMSC_LPC47M15X=y
# Embedded Controllers
#
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -385,7 +388,6 @@ CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -423,6 +425,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -438,14 +441,16 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR2=y
CONFIG_DRAM_SUPPORT_DDR2=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
# CONFIG_SMMSTORE is not set
CONFIG_SPI_FLASH=y
@@ -641,6 +646,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -0,0 +1,18 @@
3rdparty/fsp/EagleStreamFspBinPkg
3rdparty/fsp/MeteorLakeFspBinPkg
3rdparty/fsp/IceLakeFspBinPkg
3rdparty/fsp/AmberLakeFspBinPkg
3rdparty/fsp/DenvertonNSFspBinPkg
3rdparty/fsp/TigerLakeFspBinPkg
3rdparty/fsp/CedarIslandFspBinPkg
3rdparty/fsp/ElkhartLakeFspBinPkg
3rdparty/fsp/CometLakeFspBinPkg
3rdparty/fsp/WhitleyFspBinPkg
3rdparty/fsp/ArrowLakeFspBinPkg
3rdparty/fsp/IdavilleFspBinPkg
3rdparty/fsp/BraswellFspBinPkg
3rdparty/fsp/CoffeeLakeFspBinPkg
3rdparty/fsp/RaptorLakeFspBinPkg
3rdparty/fsp/ApolloLakeFspBinPkg
3rdparty/fsp/SkylakeFspBinPkg
3rdparty/vboot/tests

View File

@@ -1,7 +1,7 @@
From bd959c38f6ee21db1ff8f4fbb0675e38bfbe1147 Mon Sep 17 00:00:00 2001
From 4e350ac1b7d5f27ae0887bb016d748b0987ad14d Mon Sep 17 00:00:00 2001
From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
Date: Wed, 27 Oct 2021 13:36:01 +0200
Subject: [PATCH 01/37] add c3 and clockgen to apple/macbook21
Subject: [PATCH 01/41] add c3 and clockgen to apple/macbook21
---
src/mainboard/apple/macbook21/Kconfig | 1 +
@@ -64,5 +64,5 @@ index fd86e939b9..263fbabcd1 100644
end
end
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From e5eab4c8043b89a325b4a28bf7da456d68475144 Mon Sep 17 00:00:00 2001
From 0322228c25be7d95e7dbcc905dec81960905152b Mon Sep 17 00:00:00 2001
From: persmule <persmule@gmail.com>
Date: Sun, 31 Oct 2021 23:33:26 +0000
Subject: [PATCH 02/37] lenovo/t400: Enable all SATA ports
Subject: [PATCH 02/41] lenovo/t400: Enable all SATA ports
There are 2 SATA ports on the chassis of t400(s), but at least one dock for
t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
@@ -15,7 +15,7 @@ This patch unmasked all SATA ports found within t400s with factory firmware.
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb
index 259c3e1b21..3d007533a4 100644
index 9e056772e9..9361f330d2 100644
--- a/src/mainboard/lenovo/t400/devicetree.cb
+++ b/src/mainboard/lenovo/t400/devicetree.cb
@@ -46,8 +46,8 @@ chip northbridge/intel/gm45
@@ -30,5 +30,5 @@ index 259c3e1b21..3d007533a4 100644
register "sata_traffic_monitor" = "0"
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From fd398cc10600cccce3dd4931651a5294ffebde9a Mon Sep 17 00:00:00 2001
From 4714f4388bf90fc7ff3d25dd62feec07de5f4c7e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 3 Jan 2022 19:06:22 +0000
Subject: [PATCH 03/37] lenovo/x230: set me_state=Disabled in cmos.default
Subject: [PATCH 03/41] lenovo/x230: set me_state=Disabled in cmos.default
I only recently found out about this. It's possible to use me_cleaner to
do the same thing, but some people might just flash coreboot and not do
@@ -33,5 +33,5 @@ index 732e214b32..8454f0eac0 100644
-me_state=Normal
+me_state=Disabled
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 74230d8123cb7c31afd084658720084b1a5ac5d9 Mon Sep 17 00:00:00 2001
From 0d8c12b68060ebfe4df4cf0d7cb1abd4c2b2243b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 2 Mar 2022 21:50:01 +0000
Subject: [PATCH 04/37] set me_state=Disabled on all cmos.default files!
Subject: [PATCH 04/41] set me_state=Disabled on all cmos.default files!
yeah. why the hell isn't this the default
@@ -120,5 +120,5 @@ index d61046df6b..8c793fd1c3 100644
-me_state=Enable
+me_state=Disabled
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From f592ac32892d7f99fa2e68504bb147e5d06184ca Mon Sep 17 00:00:00 2001
From a3bc9753261ebd534df6c6752169b3edbb588a97 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 19 Feb 2023 18:21:43 +0000
Subject: [PATCH 05/37] util/ifdtool: add --nuke flag (all 0xFF on region)
Subject: [PATCH 05/41] util/ifdtool: add --nuke flag (all 0xFF on region)
When this option is used, the region's contents are overwritten
with all ones (0xFF).
@@ -16,22 +16,22 @@ Rebased since the last revision update in lbmk.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
1 file changed, 83 insertions(+), 31 deletions(-)
util/ifdtool/ifdtool.c | 116 +++++++++++++++++++++++++++++------------
1 file changed, 84 insertions(+), 32 deletions(-)
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
index b21a89c0e1..fc91d4c239 100644
index 75238c73b2..ea8dfc788d 100644
--- a/util/ifdtool/ifdtool.c
+++ b/util/ifdtool/ifdtool.c
@@ -2230,6 +2230,7 @@ static void print_usage(const char *name)
@@ -2240,6 +2240,7 @@ static void print_usage(const char *name)
" tgl - Tiger Lake\n"
" wbg - Wellsburg\n"
" -S | --setpchstrap Write a PCH strap\n"
+ " -N | --nuke <region> Overwrite the specified region with 0xFF (all ones)\n"
" -V | --newvalue The new value to write into PCH strap specified by -S\n"
" -v | --version: print the version\n"
" -h | --help: print this help\n\n"
@@ -2238,6 +2239,60 @@ static void print_usage(const char *name)
" -T | --topswapsize Set the Top Swap Block Size PCH strap value\n"
" Possible values: 0x10000, 0x20000, 0x40000, 0x80000,\n"
@@ -2251,6 +2252,60 @@ static void print_usage(const char *name)
"\n");
}
@@ -92,23 +92,23 @@ index b21a89c0e1..fc91d4c239 100644
int main(int argc, char *argv[])
{
int opt, option_index = 0;
@@ -2245,6 +2300,7 @@ int main(int argc, char *argv[])
@@ -2258,6 +2313,7 @@ int main(int argc, char *argv[])
int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
+ int mode_nuke = 0;
int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
int mode_settopswapsize = 0;
char *region_type_string = NULL, *region_fname = NULL, *layout_fname = NULL;
char *new_filename = NULL;
@@ -2279,6 +2335,7 @@ int main(int argc, char *argv[])
{"validate", 0, NULL, 't'},
@@ -2294,6 +2350,7 @@ int main(int argc, char *argv[])
{"setpchstrap", 1, NULL, 'S'},
{"newvalue", 1, NULL, 'V'},
{"topswapsize", 1, NULL, 'T'},
+ {"nuke", 1, NULL, 'N'},
{0, 0, 0, 0}
};
@@ -2328,35 +2385,8 @@ int main(int argc, char *argv[])
@@ -2343,35 +2400,8 @@ int main(int argc, char *argv[])
region_fname++;
// Descriptor, BIOS, ME, GbE, Platform
// valid type?
@@ -146,10 +146,11 @@ index b21a89c0e1..fc91d4c239 100644
fprintf(stderr, "No such region type: '%s'\n\n",
region_type_string);
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
@@ -2533,6 +2563,22 @@ int main(int argc, char *argv[])
case 't':
mode_validate = 1;
@@ -2552,7 +2582,23 @@ int main(int argc, char *argv[])
mode_settopswapsize = 1;
top_swap_size_arg = optarg;
break;
- case 'v':
+ case 'N':
+ region_type_string = strdup(optarg);
+ if (!region_type_string) {
@@ -166,12 +167,13 @@ index b21a89c0e1..fc91d4c239 100644
+ }
+ mode_nuke = 1;
+ break;
case 'v':
+ Case 'v':
print_version();
exit(EXIT_SUCCESS);
@@ -2552,7 +2598,8 @@ int main(int argc, char *argv[])
break;
@@ -2571,7 +2617,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
mode_setstrap + mode_settopswapsize + mode_newlayout + (mode_spifreq | mode_em100 |
mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
- (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) {
+ (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
@@ -179,9 +181,9 @@ index b21a89c0e1..fc91d4c239 100644
fprintf(stderr, "You may not specify more than one mode.\n\n");
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
exit(EXIT_FAILURE);
@@ -2561,7 +2608,8 @@ int main(int argc, char *argv[])
@@ -2580,7 +2627,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
mode_setstrap + mode_settopswapsize + mode_newlayout + mode_spifreq + mode_em100 +
mode_locked + mode_unlocked + mode_density + mode_altmedisable +
- mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) {
+ mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
@@ -189,7 +191,7 @@ index b21a89c0e1..fc91d4c239 100644
fprintf(stderr, "You need to specify a mode.\n\n");
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
exit(EXIT_FAILURE);
@@ -2674,6 +2722,10 @@ int main(int argc, char *argv[])
@@ -2746,6 +2794,10 @@ int main(int argc, char *argv[])
write_image(new_filename, image, size);
}
@@ -201,5 +203,5 @@ index b21a89c0e1..fc91d4c239 100644
struct fpsba *fpsba = find_fpsba(image, size);
struct fmsba *fmsba = find_fmsba(image, size);
--
2.39.5
2.47.3

View File

@@ -1,20 +1,20 @@
From 18069af7c0c6beedfadb615cca9127e82a0d8007 Mon Sep 17 00:00:00 2001
From c3f93c58ddeb1e44daf76db9d67e33bcd2c54a62 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sat, 6 May 2023 15:53:41 -0600
Subject: [PATCH 06/37] mb/dell/e6400: Enable 01.0 device in devicetree for
Subject: [PATCH 06/41] mb/dell/e6400: Enable 01.0 device in devicetree for
dGPU models
Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
src/mainboard/dell/e6400/devicetree.cb | 2 +-
src/mainboard/dell/gm45_latitude/devicetree.cb | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/e6400/devicetree.cb
index bb954cbd7b..e9f3915d17 100644
--- a/src/mainboard/dell/e6400/devicetree.cb
+++ b/src/mainboard/dell/e6400/devicetree.cb
@@ -19,7 +19,7 @@ chip northbridge/intel/gm45
diff --git a/src/mainboard/dell/gm45_latitude/devicetree.cb b/src/mainboard/dell/gm45_latitude/devicetree.cb
index 5919803be2..76dae87153 100644
--- a/src/mainboard/dell/gm45_latitude/devicetree.cb
+++ b/src/mainboard/dell/gm45_latitude/devicetree.cb
@@ -18,7 +18,7 @@ chip northbridge/intel/gm45
ops gm45_pci_domain_ops
device pci 00.0 on end # host bridge
@@ -24,5 +24,5 @@ index bb954cbd7b..e9f3915d17 100644
device pci 02.1 on end # Display
device pci 03.0 on end # ME
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 9563c107a4b40e66b610d7205a21590c7c181c78 Mon Sep 17 00:00:00 2001
From 9c0234bac4d37670da6831e3ff9545a0c6119237 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 12 May 2023 19:55:15 -0600
Subject: [PATCH 07/37] Remove warning for coreboot images built without a
Subject: [PATCH 07/41] Remove warning for coreboot images built without a
payload
I added this in upstream to prevent people from accidentally flashing
@@ -35,5 +35,5 @@ index 5f988dac1b..516133880f 100644
-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 7f650a19d30fe6157b150c5248d6086007323d72 Mon Sep 17 00:00:00 2001
From 495eab54f7c2224a0ad3da3dc79905182eca6eee Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Thu, 22 Jun 2023 16:44:27 +0300
Subject: [PATCH 08/37] HACK: Disable coreboot related BL31 features
Subject: [PATCH 08/41] HACK: Disable coreboot related BL31 features
I don't know why, but removing this BL31 make argument lets gru-kevin
power off properly when shut down from Linux. Needs investigation.
@@ -10,7 +10,7 @@ power off properly when shut down from Linux. Needs investigation.
1 file changed, 3 deletions(-)
diff --git a/src/arch/arm64/Makefile.mk b/src/arch/arm64/Makefile.mk
index f54c6d22fc..b075abfd42 100644
index 279d31fb47..3d436179fe 100644
--- a/src/arch/arm64/Makefile.mk
+++ b/src/arch/arm64/Makefile.mk
@@ -162,9 +162,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
@@ -24,5 +24,5 @@ index f54c6d22fc..b075abfd42 100644
BL31_MAKEARGS += BUILD_PLAT="$(BL31_BUILD)"
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 3f6f65ed6a435fe49534c8a0b5cb98c3eac71150 Mon Sep 17 00:00:00 2001
From bf464f17367c0dfa7f2c667d699800f3c6e60040 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 11:41:41 +0000
Subject: [PATCH 09/37] dell/e6430: use ME Soft Temporary Disable
Subject: [PATCH 09/41] dell/e6430: use ME Soft Temporary Disable
i overlooked this. it's set on other boards.
@@ -26,5 +26,5 @@ index 2a5b30f2b7..279415dfd1 100644
-me_state=Normal
+me_state=Disabled
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From b4d48233a8d829d7285501f662d999aad898be21 Mon Sep 17 00:00:00 2001
From 5c27543224963e7fa17ad18dea27d186685e9f13 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sat, 23 Dec 2023 19:02:10 +0200
Subject: [PATCH 10/37] mb/hp: Add Compaq Elite 8300 CMT port
Subject: [PATCH 10/41] mb/hp: Add Compaq Elite 8300 CMT port
Based on autoport and Z220 SuperIO code.
@@ -868,5 +868,5 @@ index 0000000000..8dbd95ef96
+ .enable_dev = mainboard_enable,
+};
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From a16ff494adb1f706d402a2e167d0d53c775d0897 Mon Sep 17 00:00:00 2001
From 062b28da685d1c9f7cbe8333e98257a83ce4ca82 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sat, 2 Mar 2024 22:51:09 +0000
Subject: [PATCH 11/37] nb/intel/haswell: make IOMMU a runtime option
Subject: [PATCH 11/41] nb/intel/haswell: make IOMMU a runtime option
When I tested graphics cards on a coreboot port for Dell
OptiPlex 9020 SFF, I could not use a graphics card unless
@@ -288,5 +288,5 @@ index e47deb5da6..1a7e0b1076 100644
if (capid0_a & VTD_DISABLE)
return;
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 4b0536ce7cd55eedc52d13497bea59d91e8924d8 Mon Sep 17 00:00:00 2001
From 5bd5bc755af744b51e0577970dc6f5214bd0cfee Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sat, 2 Mar 2024 23:00:09 +0000
Subject: [PATCH 12/37] dell/optiplex_9020: Disable IOMMU by default
Subject: [PATCH 12/41] dell/optiplex_9020: Disable IOMMU by default
Needed to make graphics cards work. Turning it on is
recommended if only using iGPU, otherwise leave it off
@@ -25,5 +25,5 @@ index 8000eea8c0..0700f971ee 100644
-iommu=Enable
+iommu=Disable
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From c8329f84b2d06581dcbeecedc38b7c4715a9cba7 Mon Sep 17 00:00:00 2001
From 78da1e003a69a4cc6bd5e71e4bc43a4844d05f16 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sat, 6 Apr 2024 01:22:47 +0100
Subject: [PATCH 13/37] nb/haswell: Fully disable iGPU when dGPU is used
Subject: [PATCH 13/41] nb/haswell: Fully disable iGPU when dGPU is used
My earlier patch disabled decode *and* disabled the iGPU itself, but
a subsequent revision disabled only VGA decode. Upon revisiting, I
@@ -47,5 +47,5 @@ index f7fad3183d..1b188e92e1 100644
static struct device_operations gma_func0_ops = {
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 73dbf291631fdbae2d8e8a761c147523c8d9e65c Mon Sep 17 00:00:00 2001
From 0a982ec4b606b6c236f71478350b69f532f30719 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 3 May 2024 11:03:32 -0600
Subject: [PATCH 14/37] ec/dell/mec5035: Add S3 suspend SMI handler
Subject: [PATCH 14/41] ec/dell/mec5035: Add S3 suspend SMI handler
This is necessary for S3 resume to work on SNB and newer Dell Latitude
laptops. If a command isn't sent, the EC cuts power to the DIMMs,
@@ -28,10 +28,10 @@ Change-Id: I655868aba46911d128f6c24f410dc6fdf83f3070
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
src/ec/dell/mec5035/Makefile.mk | 1 +
src/ec/dell/mec5035/mec5035.c | 14 ++++++++++++++
src/ec/dell/mec5035/mec5035.c | 13 +++++++++++++
src/ec/dell/mec5035/mec5035.h | 22 ++++++++++++++++++++++
src/ec/dell/mec5035/smihandler.c | 17 +++++++++++++++++
4 files changed, 54 insertions(+)
4 files changed, 53 insertions(+)
create mode 100644 src/ec/dell/mec5035/smihandler.c
diff --git a/src/ec/dell/mec5035/Makefile.mk b/src/ec/dell/mec5035/Makefile.mk
@@ -46,13 +46,13 @@ index 4ebdd811f9..be557e4599 100644
endif
diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
index dffbb7960c..85c2ab0140 100644
index 17ac2c1dab..c5067c16f6 100644
--- a/src/ec/dell/mec5035/mec5035.c
+++ b/src/ec/dell/mec5035/mec5035.c
@@ -94,6 +94,20 @@ void mec5035_control_radio(enum ec_radio_dev dev, enum ec_radio_state state)
ec_command(CMD_RADIO_CTRL);
@@ -100,6 +100,19 @@ static void mec5035_power_button_route(enum ec_power_button_route target)
write_mailbox_regs(&buf, 2, 1);
ec_command(CMD_POWER_BUTTON_TO_HOST);
}
+void mec5035_change_wake(u8 source, enum ec_wake_change change)
+{
+ u8 buf[ACPI_WAKEUP_NUM_ARGS] = {change, source, 0, 0x40};
@@ -66,15 +66,14 @@ index dffbb7960c..85c2ab0140 100644
+ write_mailbox_regs(buf, 2, SLEEP_EN_NUM_ARGS);
+ ec_command(CMD_SLEEP_ENABLE);
+}
+
void mec5035_early_init(void)
{
/* If this isn't sent the EC shuts down the system after about 15
diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
index 32f791cb01..8d4fded28b 100644
index 5fdf56631b..5cd907bf71 100644
--- a/src/ec/dell/mec5035/mec5035.h
+++ b/src/ec/dell/mec5035/mec5035.h
@@ -4,12 +4,15 @@
@@ -4,6 +4,7 @@
#define _EC_DELL_MEC5035_H_
#include <stdint.h>
@@ -82,16 +81,17 @@ index 32f791cb01..8d4fded28b 100644
#define NUM_REGISTERS 32
enum mec5035_cmd {
@@ -11,6 +12,8 @@ enum mec5035_cmd {
CMD_MOUSE_TP = 0x1a,
CMD_RADIO_CTRL = 0x2b,
CMD_POWER_BUTTON_TO_HOST = 0x3e,
+ CMD_ACPI_WAKEUP_CHANGE = 0x4a,
+ CMD_SLEEP_ENABLE = 0x64,
CMD_CPU_OK = 0xc2,
};
@@ -33,9 +36,28 @@ enum ec_radio_state {
RADIO_ON
@@ -39,9 +42,28 @@ enum ec_power_button_route {
HOST
};
+#define ACPI_WAKEUP_NUM_ARGS 4
@@ -143,5 +143,5 @@ index 0000000000..958733bf97
+ }
+}
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From a507fe609a2e99c95218ec430916eaf4c3cb61d9 Mon Sep 17 00:00:00 2001
From 9ca5c919339049518e842980041f528d48d79124 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sat, 4 May 2024 02:00:53 +0100
Subject: [PATCH 15/37] nb/haswell: lock policy regs when disabling IOMMU
Subject: [PATCH 15/41] nb/haswell: lock policy regs when disabling IOMMU
Angel Pons told me I should do it. See comments here:
https://review.coreboot.org/c/coreboot/+/81016
@@ -51,5 +51,5 @@ index 1a7e0b1076..e9506ee830 100644
/* Set L3HIT2PEND_DIS, lock GFXVTBAR policy config registers */
u32 reg32;
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 9e0a6aa376db81f9409eda92b6783a8262c1fedb Mon Sep 17 00:00:00 2001
From e74c4ee6a62ef9f91a8efb257658f627498b91fa Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Mon, 10 May 2021 22:40:59 +0200
Subject: [PATCH 16/37] nb/intel/gm45: Make DDR2 raminit work
Subject: [PATCH 16/41] nb/intel/gm45: Make DDR2 raminit work
List of changes:
- Update some timing and ODT values
@@ -20,7 +20,7 @@ Signed-off-by: Angel Pons <th3fanbus@gmail.com>
3 files changed, 106 insertions(+), 13 deletions(-)
diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
index 5d9ac56606..338260ea7a 100644
index f68bfdee7a..b76117bc3a 100644
--- a/src/northbridge/intel/gm45/gm45.h
+++ b/src/northbridge/intel/gm45/gm45.h
@@ -420,7 +420,7 @@ void igd_compute_ggc(sysinfo_t *const sysinfo);
@@ -31,9 +31,9 @@ index 5d9ac56606..338260ea7a 100644
+void raminit_rcomp_calibration(int ddr_type, stepping_t stepping);
void raminit_reset_readwrite_pointers(void);
void raminit_receive_enable_calibration(int ddr_type, const timings_t *, const dimminfo_t *);
void raminit_write_training(const mem_clock_t, const dimminfo_t *, int s3resume);
void raminit_write_training(const mem_clock_t, const dimminfo_t *, bool s3resume);
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
index b7e013959a..df8f46fbbc 100644
index def9e1e331..7b091cc567 100644
--- a/src/northbridge/intel/gm45/raminit.c
+++ b/src/northbridge/intel/gm45/raminit.c
@@ -1047,7 +1047,7 @@ static void rcomp_initialization(const int spd_type, const stepping_t stepping,
@@ -70,7 +70,7 @@ index b7e013959a..df8f46fbbc 100644
}
mchbar_write32(CxODT_HIGH(ch), reg);
@@ -2209,6 +2209,84 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
@@ -2209,6 +2209,84 @@ void raminit(sysinfo_t *const sysinfo, const bool s3resume)
raminit_write_training(timings->mem_clock, dimms, s3resume);
}
@@ -219,5 +219,5 @@ index aef863f05a..b74765fd9c 100644
+ mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20);
}
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 6acc310c1d695d47c148296da9da189de21d58be Mon Sep 17 00:00:00 2001
From da433a5d9a7d1d7856b55761b8392864343de5a8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Tue, 6 Aug 2024 00:50:24 +0100
Subject: [PATCH 17/37] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
Subject: [PATCH 17/41] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
We add this patch:
@@ -32,7 +32,7 @@ Signed-off-by: Leah Rowe <info@minifree.org>
2 files changed, 88 insertions(+), 82 deletions(-)
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
index df8f46fbbc..433db3a68c 100644
index 7b091cc567..478898564a 100644
--- a/src/northbridge/intel/gm45/raminit.c
+++ b/src/northbridge/intel/gm45/raminit.c
@@ -1117,7 +1117,10 @@ static void dram_program_timings(const int spd_type, const timings_t *const timi
@@ -47,7 +47,7 @@ index df8f46fbbc..433db3a68c 100644
} else if (timings->mem_clock != MEM_CLOCK_1067MT) {
reg = (reg & ~(0x7 << 15)) | ((9 - timings->CAS) << 15);
reg = (reg & ~(0xf << 10)) | ((timings->CAS - 3) << 10);
@@ -2209,83 +2212,85 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
@@ -2209,83 +2212,85 @@ void raminit(sysinfo_t *const sysinfo, const bool s3resume)
raminit_write_training(timings->mem_clock, dimms, s3resume);
}
@@ -236,5 +236,5 @@ index b74765fd9c..5d4505e063 100644
+ }
}
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 7461210ecc7c8e41f3f941bd5ce7943e5f66c711 Mon Sep 17 00:00:00 2001
From b4443cfe4b63a49b8170bdfb6dacbc8d52110eff Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Mon, 20 May 2024 10:24:16 -0600
Subject: [PATCH 18/37] mb/dell/e6400: Use 100 MHz reference clock for display
Subject: [PATCH 18/41] mb/dell/e6400: Use 100 MHz reference clock for display
The E6400 uses a 100 MHz reference clock for spread spectrum support on
LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For
@@ -14,26 +14,25 @@ display in the pre-OS graphics environment provided by libgfxinit.
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
src/mainboard/dell/e6400/Kconfig | 3 +++
src/northbridge/intel/gm45/Kconfig | 4 ++++
2 files changed, 7 insertions(+)
src/mainboard/dell/gm45_latitude/Kconfig | 2 ++
src/northbridge/intel/gm45/Kconfig | 4 ++++
2 files changed, 6 insertions(+)
diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/e6400/Kconfig
index 417d95fd5d..6fe1b1c456 100644
--- a/src/mainboard/dell/e6400/Kconfig
+++ b/src/mainboard/dell/e6400/Kconfig
@@ -19,6 +19,9 @@ config BOARD_SPECIFIC_OPTIONS
select INTEL_GMA_HAVE_VBT
select EC_DELL_MEC5035
diff --git a/src/mainboard/dell/gm45_latitude/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
index edc79b0d43..5020744990 100644
--- a/src/mainboard/dell/gm45_latitude/Kconfig
+++ b/src/mainboard/dell/gm45_latitude/Kconfig
@@ -22,6 +22,8 @@ config BOARD_DELL_E6400
select BOARD_DELL_GM45_LATITUDE_COMMON
if BOARD_DELL_GM45_LATITUDE_COMMON
+config INTEL_GMA_DPLL_REF_FREQ
+ default 100000000
+
config MAINBOARD_DIR
default "dell/e6400"
config MAINBOARD_DIR
default "dell/gm45_latitude"
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index fef0d735b3..fc5df8b11a 100644
index a776217475..35e89b0c88 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -14,6 +14,10 @@ config NORTHBRIDGE_INTEL_GM45
@@ -48,5 +47,5 @@ index fef0d735b3..fc5df8b11a 100644
select VBOOT_STARTS_IN_BOOTBLOCK
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From a683dffd774dbbe25cc77c0f7d3853232c17c2bf Mon Sep 17 00:00:00 2001
From d3d97fccab40cfe50eac92796bb7f16bd245b189 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Mon, 12 Aug 2024 02:15:24 +0100
Subject: [PATCH 19/37] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
Subject: [PATCH 19/41] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
set it to 96MHz. fixes the following build error when
building for x4x boards e.g. gigabyte ga-g41m-es2l:
@@ -33,7 +33,7 @@ Signed-off-by: Leah Rowe <info@minifree.org>
1 file changed, 4 insertions(+)
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
index 097e11126c..6430319f6a 100644
index 6fa4551957..646af3510b 100644
--- a/src/northbridge/intel/x4x/Kconfig
+++ b/src/northbridge/intel/x4x/Kconfig
@@ -14,6 +14,10 @@ config NORTHBRIDGE_INTEL_X4X
@@ -48,5 +48,5 @@ index 097e11126c..6430319f6a 100644
default 0x100000 if !SOUTHBRIDGE_INTEL_I82801GX
--
2.39.5
2.47.3

View File

@@ -1,243 +0,0 @@
From a48ba23bb4a24730fa49b5a10b56c9de873dea8a Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Thu, 26 Sep 2024 19:48:26 -0600
Subject: [PATCH 20/37] mb/dell: Convert E6400 into a variant
All the GM45 Dell Latitudes should be nearly identical, so convert the
E6400 port into a variant so that future ports for the other systems can
share code with each other.
Change-Id: I8094fce56eaaadb20aef173644cd3b2c0b008e95
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
src/mainboard/dell/e6400/Makefile.mk | 10 --------
.../dell/{e6400 => gm45_latitude}/Kconfig | 22 +++++++++++++-----
.../{e6400 => gm45_latitude}/Kconfig.name | 0
src/mainboard/dell/gm45_latitude/Makefile.mk | 11 +++++++++
.../dell/{e6400 => gm45_latitude}/acpi/ec.asl | 0
.../acpi/ich9_pci_irqs.asl | 0
.../{e6400 => gm45_latitude}/acpi/superio.asl | 0
.../dell/{e6400 => gm45_latitude}/blc.c | 0
.../{e6400 => gm45_latitude}/board_info.txt | 0
.../dell/{e6400 => gm45_latitude}/bootblock.c | 0
.../{e6400 => gm45_latitude}/cmos.default | 0
.../dell/{e6400 => gm45_latitude}/cmos.layout | 0
.../dell/{e6400 => gm45_latitude}/cstates.c | 0
.../{e6400 => gm45_latitude}/devicetree.cb | 1 -
.../dell/{e6400 => gm45_latitude}/dsdt.asl | 0
.../dell/{e6400 => gm45_latitude}/mainboard.c | 0
.../dell/{e6400 => gm45_latitude}/romstage.c | 0
.../variants}/e6400/data.vbt | Bin
.../variants}/e6400/gma-mainboard.ads | 0
.../{ => gm45_latitude/variants}/e6400/gpio.c | 0
.../variants}/e6400/hda_verb.c | 0
.../variants/e6400/overridetree.cb | 7 ++++++
22 files changed, 34 insertions(+), 17 deletions(-)
delete mode 100644 src/mainboard/dell/e6400/Makefile.mk
rename src/mainboard/dell/{e6400 => gm45_latitude}/Kconfig (64%)
rename src/mainboard/dell/{e6400 => gm45_latitude}/Kconfig.name (100%)
create mode 100644 src/mainboard/dell/gm45_latitude/Makefile.mk
rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/ec.asl (100%)
rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/ich9_pci_irqs.asl (100%)
rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/superio.asl (100%)
rename src/mainboard/dell/{e6400 => gm45_latitude}/blc.c (100%)
rename src/mainboard/dell/{e6400 => gm45_latitude}/board_info.txt (100%)
rename src/mainboard/dell/{e6400 => gm45_latitude}/bootblock.c (100%)
rename src/mainboard/dell/{e6400 => gm45_latitude}/cmos.default (100%)
rename src/mainboard/dell/{e6400 => gm45_latitude}/cmos.layout (100%)
rename src/mainboard/dell/{e6400 => gm45_latitude}/cstates.c (100%)
rename src/mainboard/dell/{e6400 => gm45_latitude}/devicetree.cb (98%)
rename src/mainboard/dell/{e6400 => gm45_latitude}/dsdt.asl (100%)
rename src/mainboard/dell/{e6400 => gm45_latitude}/mainboard.c (100%)
rename src/mainboard/dell/{e6400 => gm45_latitude}/romstage.c (100%)
rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/data.vbt (100%)
rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/gma-mainboard.ads (100%)
rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/gpio.c (100%)
rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/hda_verb.c (100%)
create mode 100644 src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
diff --git a/src/mainboard/dell/e6400/Makefile.mk b/src/mainboard/dell/e6400/Makefile.mk
deleted file mode 100644
index ca3a82db48..0000000000
--- a/src/mainboard/dell/e6400/Makefile.mk
+++ /dev/null
@@ -1,10 +0,0 @@
-## SPDX-License-Identifier: GPL-2.0-only
-
-bootblock-y += bootblock.c
-
-romstage-y += gpio.c
-
-ramstage-y += cstates.c
-ramstage-y += blc.c
-
-ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
similarity index 64%
rename from src/mainboard/dell/e6400/Kconfig
rename to src/mainboard/dell/gm45_latitude/Kconfig
index 6fe1b1c456..ba76fb6e8c 100644
--- a/src/mainboard/dell/e6400/Kconfig
+++ b/src/mainboard/dell/gm45_latitude/Kconfig
@@ -1,9 +1,7 @@
## SPDX-License-Identifier: GPL-2.0-only
-if BOARD_DELL_E6400
-
-config BOARD_SPECIFIC_OPTIONS
- def_bool y
+config BOARD_DELL_GM45_LATITUDE_COMMON
+ def_bool n
select SYSTEM_TYPE_LAPTOP
select CPU_INTEL_SOCKET_P
select NORTHBRIDGE_INTEL_GM45
@@ -19,19 +17,31 @@ config BOARD_SPECIFIC_OPTIONS
select INTEL_GMA_HAVE_VBT
select EC_DELL_MEC5035
+
+config BOARD_DELL_E6400
+ select BOARD_DELL_GM45_LATITUDE_COMMON
+
+if BOARD_DELL_GM45_LATITUDE_COMMON
+
config INTEL_GMA_DPLL_REF_FREQ
default 100000000
config MAINBOARD_DIR
- default "dell/e6400"
+ default "dell/gm45_latitude"
config MAINBOARD_PART_NUMBER
default "Latitude E6400" if BOARD_DELL_E6400
+config OVERRIDE_DEVICETREE
+ default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+
+config VARIANT_DIR
+ default "e6400" if BOARD_DELL_E6400
+
config USBDEBUG_HCD_INDEX
default 1
config CBFS_SIZE
default 0x1A0000
-endif # BOARD_DELL_E6400
+endif # BOARD_DELL_GM45_LATITUDE_COMMON
diff --git a/src/mainboard/dell/e6400/Kconfig.name b/src/mainboard/dell/gm45_latitude/Kconfig.name
similarity index 100%
rename from src/mainboard/dell/e6400/Kconfig.name
rename to src/mainboard/dell/gm45_latitude/Kconfig.name
diff --git a/src/mainboard/dell/gm45_latitude/Makefile.mk b/src/mainboard/dell/gm45_latitude/Makefile.mk
new file mode 100644
index 0000000000..5295d5be22
--- /dev/null
+++ b/src/mainboard/dell/gm45_latitude/Makefile.mk
@@ -0,0 +1,11 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+bootblock-y += bootblock.c
+
+romstage-y += variants/$(VARIANT_DIR)/gpio.c
+
+ramstage-y += cstates.c
+ramstage-y += blc.c
+ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
+
+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
diff --git a/src/mainboard/dell/e6400/acpi/ec.asl b/src/mainboard/dell/gm45_latitude/acpi/ec.asl
similarity index 100%
rename from src/mainboard/dell/e6400/acpi/ec.asl
rename to src/mainboard/dell/gm45_latitude/acpi/ec.asl
diff --git a/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl b/src/mainboard/dell/gm45_latitude/acpi/ich9_pci_irqs.asl
similarity index 100%
rename from src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl
rename to src/mainboard/dell/gm45_latitude/acpi/ich9_pci_irqs.asl
diff --git a/src/mainboard/dell/e6400/acpi/superio.asl b/src/mainboard/dell/gm45_latitude/acpi/superio.asl
similarity index 100%
rename from src/mainboard/dell/e6400/acpi/superio.asl
rename to src/mainboard/dell/gm45_latitude/acpi/superio.asl
diff --git a/src/mainboard/dell/e6400/blc.c b/src/mainboard/dell/gm45_latitude/blc.c
similarity index 100%
rename from src/mainboard/dell/e6400/blc.c
rename to src/mainboard/dell/gm45_latitude/blc.c
diff --git a/src/mainboard/dell/e6400/board_info.txt b/src/mainboard/dell/gm45_latitude/board_info.txt
similarity index 100%
rename from src/mainboard/dell/e6400/board_info.txt
rename to src/mainboard/dell/gm45_latitude/board_info.txt
diff --git a/src/mainboard/dell/e6400/bootblock.c b/src/mainboard/dell/gm45_latitude/bootblock.c
similarity index 100%
rename from src/mainboard/dell/e6400/bootblock.c
rename to src/mainboard/dell/gm45_latitude/bootblock.c
diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/gm45_latitude/cmos.default
similarity index 100%
rename from src/mainboard/dell/e6400/cmos.default
rename to src/mainboard/dell/gm45_latitude/cmos.default
diff --git a/src/mainboard/dell/e6400/cmos.layout b/src/mainboard/dell/gm45_latitude/cmos.layout
similarity index 100%
rename from src/mainboard/dell/e6400/cmos.layout
rename to src/mainboard/dell/gm45_latitude/cmos.layout
diff --git a/src/mainboard/dell/e6400/cstates.c b/src/mainboard/dell/gm45_latitude/cstates.c
similarity index 100%
rename from src/mainboard/dell/e6400/cstates.c
rename to src/mainboard/dell/gm45_latitude/cstates.c
diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/gm45_latitude/devicetree.cb
similarity index 98%
rename from src/mainboard/dell/e6400/devicetree.cb
rename to src/mainboard/dell/gm45_latitude/devicetree.cb
index e9f3915d17..76dae87153 100644
--- a/src/mainboard/dell/e6400/devicetree.cb
+++ b/src/mainboard/dell/gm45_latitude/devicetree.cb
@@ -15,7 +15,6 @@ chip northbridge/intel/gm45
register "pci_mmio_size" = "2048"
device domain 0 on
- subsystemid 0x1028 0x0233 inherit
ops gm45_pci_domain_ops
device pci 00.0 on end # host bridge
diff --git a/src/mainboard/dell/e6400/dsdt.asl b/src/mainboard/dell/gm45_latitude/dsdt.asl
similarity index 100%
rename from src/mainboard/dell/e6400/dsdt.asl
rename to src/mainboard/dell/gm45_latitude/dsdt.asl
diff --git a/src/mainboard/dell/e6400/mainboard.c b/src/mainboard/dell/gm45_latitude/mainboard.c
similarity index 100%
rename from src/mainboard/dell/e6400/mainboard.c
rename to src/mainboard/dell/gm45_latitude/mainboard.c
diff --git a/src/mainboard/dell/e6400/romstage.c b/src/mainboard/dell/gm45_latitude/romstage.c
similarity index 100%
rename from src/mainboard/dell/e6400/romstage.c
rename to src/mainboard/dell/gm45_latitude/romstage.c
diff --git a/src/mainboard/dell/e6400/data.vbt b/src/mainboard/dell/gm45_latitude/variants/e6400/data.vbt
similarity index 100%
rename from src/mainboard/dell/e6400/data.vbt
rename to src/mainboard/dell/gm45_latitude/variants/e6400/data.vbt
diff --git a/src/mainboard/dell/e6400/gma-mainboard.ads b/src/mainboard/dell/gm45_latitude/variants/e6400/gma-mainboard.ads
similarity index 100%
rename from src/mainboard/dell/e6400/gma-mainboard.ads
rename to src/mainboard/dell/gm45_latitude/variants/e6400/gma-mainboard.ads
diff --git a/src/mainboard/dell/e6400/gpio.c b/src/mainboard/dell/gm45_latitude/variants/e6400/gpio.c
similarity index 100%
rename from src/mainboard/dell/e6400/gpio.c
rename to src/mainboard/dell/gm45_latitude/variants/e6400/gpio.c
diff --git a/src/mainboard/dell/e6400/hda_verb.c b/src/mainboard/dell/gm45_latitude/variants/e6400/hda_verb.c
similarity index 100%
rename from src/mainboard/dell/e6400/hda_verb.c
rename to src/mainboard/dell/gm45_latitude/variants/e6400/hda_verb.c
diff --git a/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb b/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
new file mode 100644
index 0000000000..acc34a2252
--- /dev/null
+++ b/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
@@ -0,0 +1,7 @@
+## SPDX-License-Identifier: GPL-2.0-or-later
+
+chip northbridge/intel/gm45
+ device domain 0 on
+ subsystemid 0x1028 0x0233 inherit
+ end
+end
--
2.39.5

View File

@@ -1,7 +1,7 @@
From b87e6774f0407ea48610c83ea54ab6a4b4a78a24 Mon Sep 17 00:00:00 2001
From c2a05f102ca378d8e23f0485d680845584efa290 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Thu, 26 Sep 2024 19:51:25 -0600
Subject: [PATCH 21/37] mb/dell/gm45_latitudes: Add E4300 variant
Subject: [PATCH 20/41] mb/dell/gm45_latitudes: Add E4300 variant
Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
@@ -21,7 +21,7 @@ Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb
diff --git a/src/mainboard/dell/gm45_latitude/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
index ba76fb6e8c..144f9bcdf0 100644
index 5020744990..d27d5728a8 100644
--- a/src/mainboard/dell/gm45_latitude/Kconfig
+++ b/src/mainboard/dell/gm45_latitude/Kconfig
@@ -21,6 +21,9 @@ config BOARD_DELL_GM45_LATITUDE_COMMON
@@ -32,9 +32,9 @@ index ba76fb6e8c..144f9bcdf0 100644
+ select BOARD_DELL_GM45_LATITUDE_COMMON
+
if BOARD_DELL_GM45_LATITUDE_COMMON
config INTEL_GMA_DPLL_REF_FREQ
@@ -31,12 +34,14 @@ config MAINBOARD_DIR
default 100000000
@@ -30,12 +33,14 @@ config MAINBOARD_DIR
config MAINBOARD_PART_NUMBER
default "Latitude E6400" if BOARD_DELL_E6400
@@ -328,5 +328,5 @@ index 0000000000..20dfa245fb
+ end
+end
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 0bc9ca409793836dcdb386db97b7a9464d92a973 Mon Sep 17 00:00:00 2001
From 2305cfb93110003613caa1dec8c5f574b5e400bd Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 3 May 2024 16:31:12 -0600
Subject: [PATCH 22/37] mb/dell: Add S3 SMI handler for Dell Latitudes
Subject: [PATCH 21/41] mb/dell: Add S3 SMI handler for Dell Latitudes
Integrate the previously added mec5035_smi_sleep() function into
mainboard code to fix S3 suspend on the SNB/IVB Latitudes and the E7240.
@@ -12,19 +12,19 @@ the power LED while in S3. Without it, all LEDs turn off during S3.
Change-Id: Ic0d887f75be13c3fb9f6df62153ac458895e0283
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
src/mainboard/dell/e7240/smihandler.c | 9 +++++++++
src/mainboard/dell/gm45_latitude/smihandler.c | 9 +++++++++
src/mainboard/dell/haswell_latitude/smihandler.c | 9 +++++++++
src/mainboard/dell/snb_ivb_latitude/smihandler.c | 9 +++++++++
3 files changed, 27 insertions(+)
create mode 100644 src/mainboard/dell/e7240/smihandler.c
create mode 100644 src/mainboard/dell/gm45_latitude/smihandler.c
create mode 100644 src/mainboard/dell/haswell_latitude/smihandler.c
create mode 100644 src/mainboard/dell/snb_ivb_latitude/smihandler.c
diff --git a/src/mainboard/dell/e7240/smihandler.c b/src/mainboard/dell/e7240/smihandler.c
diff --git a/src/mainboard/dell/gm45_latitude/smihandler.c b/src/mainboard/dell/gm45_latitude/smihandler.c
new file mode 100644
index 0000000000..00e55b51db
--- /dev/null
+++ b/src/mainboard/dell/e7240/smihandler.c
+++ b/src/mainboard/dell/gm45_latitude/smihandler.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
@@ -35,11 +35,11 @@ index 0000000000..00e55b51db
+{
+ mec5035_smi_sleep(slp_typ);
+}
diff --git a/src/mainboard/dell/gm45_latitude/smihandler.c b/src/mainboard/dell/gm45_latitude/smihandler.c
diff --git a/src/mainboard/dell/haswell_latitude/smihandler.c b/src/mainboard/dell/haswell_latitude/smihandler.c
new file mode 100644
index 0000000000..00e55b51db
--- /dev/null
+++ b/src/mainboard/dell/gm45_latitude/smihandler.c
+++ b/src/mainboard/dell/haswell_latitude/smihandler.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
@@ -66,5 +66,5 @@ index 0000000000..00e55b51db
+ mec5035_smi_sleep(slp_typ);
+}
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From b6bd33b0430f72c2fce16a3b1e41927ef540923b Mon Sep 17 00:00:00 2001
From aafddebf91f185d9c72fa1492af9128ee4803239 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Tue, 31 Dec 2024 14:42:24 +0000
Subject: [PATCH 24/37] Disable compression on refcode insertion
Subject: [PATCH 22/41] Disable compression on refcode insertion
Compression is not reliably reproducible. In an lbmk release
context, this means we cannot rely on vendorfile insertion.
@@ -14,10 +14,10 @@ Signed-off-by: Leah Rowe <info@minifree.org>
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile.mk b/Makefile.mk
index 3969bfbd05..15346569f8 100644
index 75787b32d4..3616f4fe68 100644
--- a/Makefile.mk
+++ b/Makefile.mk
@@ -1392,7 +1392,7 @@ endif
@@ -1422,7 +1422,7 @@ endif
cbfs-files-$(CONFIG_HAVE_REFCODE_BLOB) += $(CONFIG_CBFS_PREFIX)/refcode
$(CONFIG_CBFS_PREFIX)/refcode-file := $(REFCODE_BLOB)
$(CONFIG_CBFS_PREFIX)/refcode-type := stage
@@ -27,5 +27,5 @@ index 3969bfbd05..15346569f8 100644
cbfs-files-$(CONFIG_SEABIOS_VGA_COREBOOT) += vgaroms/seavgabios.bin
vgaroms/seavgabios.bin-file := $(CONFIG_PAYLOAD_VGABIOS_FILE)
--
2.39.5
2.47.3

View File

@@ -1,92 +0,0 @@
From d91dc168d6b8eca5e78aef9e48571d6edb156d45 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Tue, 18 Jun 2024 21:31:08 -0600
Subject: [PATCH 23/37] ec/dell/mec5035: Route power button event to host
If command 0x3e with an argument of 1 isn't sent to the EC, pressing the
power button results in the EC powering off the system without letting
the OS cleanly shutting itself down. This command and argument tells the
EC to route power button events to the host so that it can determine
what to do.
The EC command was identified from the ec/google/wilco code, which is
used for Dell's Latitude Chromebooks. According to the EC_GOOGLE_WILCO
Kconfig help text, those ECs run a modified version of Dell's typical
Latitude EC firmware, so it is likely that the two firmware
implementations use similar commands. Examining LPC traffic between the
host and the EC on the Latitude E6400 did reveal that the same command
was being sent by the vendor firmware to the EC, but this does not
confirm that it has the same meaning as the command from the Wilco code.
Sending the command using inb/outb calls in a userspace C program while
running coreboot without this patch did allow subsequent power button
events to be handled by the host, confirming that the command was indeed
the same.
Change-Id: I5ded315270c0e1efbbc90cfa9d9d894b872e99a2
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
src/ec/dell/mec5035/mec5035.c | 8 ++++++++
src/ec/dell/mec5035/mec5035.h | 7 +++++++
2 files changed, 15 insertions(+)
diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
index 85c2ab0140..bdae929a27 100644
--- a/src/ec/dell/mec5035/mec5035.c
+++ b/src/ec/dell/mec5035/mec5035.c
@@ -94,6 +94,13 @@ void mec5035_control_radio(enum ec_radio_dev dev, enum ec_radio_state state)
ec_command(CMD_RADIO_CTRL);
}
+void mec5035_power_button_route(enum ec_power_button_route target)
+{
+ u8 buf = (u8)target;
+ write_mailbox_regs(&buf, 2, 1);
+ ec_command(CMD_POWER_BUTTON_TO_HOST);
+}
+
void mec5035_change_wake(u8 source, enum ec_wake_change change)
{
u8 buf[ACPI_WAKEUP_NUM_ARGS] = {change, source, 0, 0x40};
@@ -121,6 +128,7 @@ static void mec5035_init(struct device *dev)
/* Unconditionally use this argument for now as this setting
is probably the most sensible default out of the 3 choices. */
mec5035_mouse_touchpad(TP_PS2_MOUSE);
+ mec5035_power_button_route(HOST);
pc_keyboard_init(NO_AUX_DEVICE);
diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
index 8d4fded28b..51422598c4 100644
--- a/src/ec/dell/mec5035/mec5035.h
+++ b/src/ec/dell/mec5035/mec5035.h
@@ -11,6 +11,7 @@
enum mec5035_cmd {
CMD_MOUSE_TP = 0x1a,
CMD_RADIO_CTRL = 0x2b,
+ CMD_POWER_BUTTON_TO_HOST = 0x3e,
CMD_ACPI_WAKEUP_CHANGE = 0x4a,
CMD_SLEEP_ENABLE = 0x64,
CMD_CPU_OK = 0xc2,
@@ -36,6 +37,11 @@ enum ec_radio_state {
RADIO_ON
};
+enum ec_power_button_route {
+ EC = 0,
+ HOST
+};
+
#define ACPI_WAKEUP_NUM_ARGS 4
enum ec_wake_change {
WAKE_OFF = 0,
@@ -55,6 +61,7 @@ u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting);
void mec5035_cpu_ok(void);
void mec5035_early_init(void);
void mec5035_control_radio(enum ec_radio_dev device, enum ec_radio_state state);
+void mec5035_power_button_route(enum ec_power_button_route target);
void mec5035_change_wake(u8 source, enum ec_wake_change change);
void mec5035_sleep_enable(void);
--
2.39.5

View File

@@ -1,7 +1,7 @@
From fc4c65f3bb807b9fc766745a70f92729b0b8d99e Mon Sep 17 00:00:00 2001
From 09febfb85eb176c8bf0e416412ed0b971dc2cefc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 21 Apr 2025 02:58:47 +0100
Subject: [PATCH 25/37] nb/intel/*: Disable stack overflow debug options
Subject: [PATCH 23/41] nb/intel/*: Disable stack overflow debug options
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
@@ -34,7 +34,7 @@ index 039a7396f8..ddcb986f10 100644
+ bool
+ default n
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index fc5df8b11a..95e3644b73 100644
index 35e89b0c88..c5456d0ddf 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -58,4 +58,13 @@ config FIXED_DMIBAR_MMIO_BASE
@@ -52,7 +52,7 @@ index fc5df8b11a..95e3644b73 100644
+
endif
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index 6191cb6ccf..0f5b5c7241 100644
index c57f1ec380..0a5181b183 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -10,6 +10,15 @@ config NORTHBRIDGE_INTEL_HASWELL
@@ -93,7 +93,7 @@ index dbb2d7436b..5e9418b6a9 100644
+
+endif
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index 32eff1a611..9479d75c07 100644
index c4e17f90bf..b12f5be091 100644
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -89,4 +89,13 @@ config FIXED_DMIBAR_MMIO_BASE
@@ -111,7 +111,7 @@ index 32eff1a611..9479d75c07 100644
+
endif
diff --git a/src/northbridge/intel/ironlake/Kconfig b/src/northbridge/intel/ironlake/Kconfig
index 2bafebf92e..16b81705bb 100644
index 39566a6e5f..f46acf6937 100644
--- a/src/northbridge/intel/ironlake/Kconfig
+++ b/src/northbridge/intel/ironlake/Kconfig
@@ -63,4 +63,13 @@ config FIXED_DMIBAR_MMIO_BASE
@@ -129,7 +129,7 @@ index 2bafebf92e..16b81705bb 100644
+
endif
diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig
index 59cfcd5e0a..a3ad8d3425 100644
index a05b866dad..50e3a7cdb9 100644
--- a/src/northbridge/intel/pineview/Kconfig
+++ b/src/northbridge/intel/pineview/Kconfig
@@ -42,4 +42,13 @@ config FIXED_EPBAR_MMIO_BASE
@@ -147,7 +147,7 @@ index 59cfcd5e0a..a3ad8d3425 100644
+
endif
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index 973eed8bbd..6387cf926d 100644
index 9972a43da0..fe4ac5106c 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -208,4 +208,13 @@ config IGD_DEFAULT_UMA_INDEX
@@ -165,7 +165,7 @@ index 973eed8bbd..6387cf926d 100644
+
endif
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
index 6430319f6a..1803ef5733 100644
index 646af3510b..069fa0244d 100644
--- a/src/northbridge/intel/x4x/Kconfig
+++ b/src/northbridge/intel/x4x/Kconfig
@@ -53,4 +53,13 @@ config FIXED_DMIBAR_MMIO_BASE
@@ -183,5 +183,5 @@ index 6430319f6a..1803ef5733 100644
+
endif
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 75cc0ea09234064318046624845b0afc5afb0ce5 Mon Sep 17 00:00:00 2001
From 70f588b7cc66af2e427d9045d36ac2f5f4835dae Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Mon, 30 Sep 2024 20:44:38 -0400
Subject: [PATCH 29/37] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
Subject: [PATCH 24/41] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
@@ -704,5 +704,5 @@ index 0000000000..555b1c1f5c
+ end
+end
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 6725ec0bb976c61cbe87e61bf0e8b02e38d14de9 Mon Sep 17 00:00:00 2001
From 463148c9773f3dd44f60c2cf2ac17900c3e68619 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 30 Oct 2024 20:55:25 -0600
Subject: [PATCH 30/37] mb/dell/optiplex_780: Add USFF variant
Subject: [PATCH 25/41] mb/dell/optiplex_780: Add USFF variant
Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
@@ -322,5 +322,5 @@ index 0000000000..555b1c1f5c
+ end
+end
--
2.39.5
2.47.3

View File

@@ -1,94 +0,0 @@
From 14002b2575d73d3edbc72584502a463e6802cba6 Mon Sep 17 00:00:00 2001
From: Felix Singer <felixsinger@posteo.net>
Date: Wed, 26 Jun 2024 04:24:31 +0200
Subject: [PATCH 26/37] soc/intel/skylake: configure usb acpi
Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d
Signed-off-by: Felix Singer <felixsinger@posteo.net>
---
src/soc/intel/skylake/Kconfig | 1 +
src/soc/intel/skylake/chipset.cb | 56 +++++++++++++++++++++++++++++++-
2 files changed, 56 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 4ad33496b2..9191ed0ff8 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -10,6 +10,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
select CPU_INTEL_COMMON
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select CPU_SUPPORTS_PM_TIMER_EMULATION
+ select DRIVERS_USB_ACPI
select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
select FSP_COMPRESS_FSP_S_LZ4
select FSP_M_XIP
diff --git a/src/soc/intel/skylake/chipset.cb b/src/soc/intel/skylake/chipset.cb
index 6538a1475b..dfb81d496e 100644
--- a/src/soc/intel/skylake/chipset.cb
+++ b/src/soc/intel/skylake/chipset.cb
@@ -13,7 +13,61 @@ chip soc/intel/skylake
device pci 07.0 alias chap off end
device pci 08.0 alias gmm off end # Gaussian Mixture Model
device pci 13.0 alias ish off end # SensorHub
- device pci 14.0 alias south_xhci off ops usb_xhci_ops end
+ device pci 14.0 alias south_xhci off ops usb_xhci_ops
+ chip drivers/usb/acpi
+ register "type" = "UPC_TYPE_HUB"
+ device usb 0.0 alias xhci_root_hub off
+ chip drivers/usb/acpi
+ device usb 2.0 alias usb2_port1 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.1 alias usb2_port2 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.2 alias usb2_port3 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.3 alias usb2_port4 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.4 alias usb2_port5 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.5 alias usb2_port6 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.6 alias usb2_port7 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.7 alias usb2_port8 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.8 alias usb2_port9 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.9 alias usb2_port10 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.0 alias usb3_port1 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.1 alias usb3_port2 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.2 alias usb3_port3 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.3 alias usb3_port4 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.4 alias usb3_port5 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.5 alias usb3_port6 off end
+ end
+ end
+ end
+ end
device pci 14.1 alias south_xdci off ops usb_xdci_ops end
device pci 14.2 alias thermal off end
device pci 14.3 alias cio off end
--
2.39.5

View File

@@ -1,7 +1,7 @@
From 8dcd86c34d92b9b17bcfe4c7c61793042dc97268 Mon Sep 17 00:00:00 2001
From bf3c3df864cae045c82d1c032ced834a60239401 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Jan 2025 01:53:53 +0000
Subject: [PATCH 36/37] src/intel/x4x: Disable stack overflow debug
Subject: [PATCH 26/41] src/intel/x4x: Disable stack overflow debug
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
@@ -9,7 +9,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
1 file changed, 9 insertions(+)
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
index 1803ef5733..7129aabf72 100644
index 069fa0244d..8c70344846 100644
--- a/src/northbridge/intel/x4x/Kconfig
+++ b/src/northbridge/intel/x4x/Kconfig
@@ -32,6 +32,15 @@ config ECAM_MMCONF_BUS_NUMBER
@@ -29,5 +29,5 @@ index 1803ef5733..7129aabf72 100644
config DOMAIN_RESOURCE_32BIT_LIMIT
default 0xfec00000
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From b313c1d4bae17fc6eb3a8217c503187d1cd5453d Mon Sep 17 00:00:00 2001
From 0ad074869ec2a25508b1d6fc97c6ce61a9982fbd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 22 Apr 2025 10:21:59 +0100
Subject: [PATCH 1/1] hp/8300cmt: remove xhci_overcurrent_mapping
Subject: [PATCH 27/41] hp/8300cmt: remove xhci_overcurrent_mapping
No longer needed, as per the following commit:
@@ -38,5 +38,5 @@ index 3d21739b72..3a0b6d5c59 100644
register "usb_port_config" = "{
{ 1, 0, 0 },
--
2.39.5
2.47.3

View File

@@ -1,30 +0,0 @@
From 3bb65b7f2a02ecb93e15ae037da38ad8f812747b Mon Sep 17 00:00:00 2001
From: Mate Kukri <km@mkukri.xyz>
Date: Fri, 22 Nov 2024 21:26:48 +0000
Subject: [PATCH 27/37] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
bootblock
Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173
Signed-off-by: Mate Kukri <km@mkukri.xyz>
---
src/soc/intel/skylake/bootblock/pch.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c
index df00bb85a9..beaece960b 100644
--- a/src/soc/intel/skylake/bootblock/pch.c
+++ b/src/soc/intel/skylake/bootblock/pch.c
@@ -100,8 +100,8 @@ static void soc_config_pwrmbase(void)
void pch_early_iorange_init(void)
{
- uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 |
- LPC_IOE_EC_62_66;
+ uint16_t io_enables = LPC_IOE_EC_4E_4F | LPC_IOE_SUPERIO_2E_2F |
+ LPC_IOE_KBC_60_64 | LPC_IOE_EC_62_66;
const config_t *config = config_of_soc();
--
2.39.5

View File

@@ -1,7 +1,7 @@
From 4ffaddc37d30d39f25faeaef73046a6e2ce525e8 Mon Sep 17 00:00:00 2001
From 4739f197ee3d4c95809ba48671bc5c409766b9c7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Wed, 11 Dec 2024 01:06:01 +0000
Subject: [PATCH 31/37] dell/3050micro: disable nvme hotplug
Subject: [PATCH 28/41] dell/3050micro: disable nvme hotplug
in my testing, when running my 3050micro for a few days,
the nvme would sometimes randomly rename.
@@ -26,24 +26,22 @@ for the nvme, so apply the same fix here for 3050 micro
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
src/mainboard/dell/optiplex_3050/devicetree.cb | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
.../dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
index da11085ab6..2a97306c5d 100644
--- a/src/mainboard/dell/optiplex_3050/devicetree.cb
+++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
@@ -45,7 +45,9 @@ chip soc/intel/skylake
diff --git a/src/mainboard/dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb b/src/mainboard/dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb
index c5f1749b2c..ff48a8121a 100644
--- a/src/mainboard/dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb
+++ b/src/mainboard/dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb
@@ -46,7 +46,7 @@ chip soc/intel/skylake
register "PcieRpAdvancedErrorReporting[20]" = "1"
register "PcieRpLtrEnable[20]" = "true"
register "PcieRpClkSrcNumber[20]" = "3"
- register "PcieRpHotPlug[20]" = "1"
+# disable hotplug on nvme to prevent renaming e.g. nvme0n1 rename to nvme0n2,
+# which could cause crashes in linux if booting from nvme
+ register "PcieRpHotPlug[20]" = "0"
end
# Realtek LAN
end
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 18f4e970ebda43dd538f74398aea463a67040dd3 Mon Sep 17 00:00:00 2001
From a6fdf61bb4779775fa330fc3f9b79be651c6854a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Jan 2025 01:36:23 +0000
Subject: [PATCH 35/37] src/intel/skylake: Disable stack overflow debug options
Subject: [PATCH 29/41] src/intel/skylake: Disable stack overflow debug options
The option was appearing in T480/3050micro configs of lbmk,
after updating on the coreboot/next uprev for 20241206 rev8:
@@ -37,10 +37,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
1 file changed, 9 insertions(+)
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index d51ffaef7b..42af82a5d8 100644
index 7c530f2c75..70c2a7643c 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -129,6 +129,15 @@ config DCACHE_RAM_SIZE
@@ -131,6 +131,15 @@ config DCACHE_RAM_SIZE
The size of the cache-as-ram region required during bootblock
and/or romstage.
@@ -57,5 +57,5 @@ index d51ffaef7b..42af82a5d8 100644
hex
default 0x20400 if FSP_USES_CB_STACK
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 49cee334bc7fe9a78b9355b5256a37984bac385a Mon Sep 17 00:00:00 2001
From 287a6d09ac6f5cdfc8255c2020e37441ddb870c7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Thu, 26 Dec 2024 19:45:20 +0000
Subject: [PATCH 33/37] soc/intel/skylake: Don't compress FSP-S
Subject: [PATCH 30/41] soc/intel/skylake: Don't compress FSP-S
Build systems like lbmk need to reproducibly insert
certain vendor files on release images.
@@ -19,11 +19,11 @@ Signed-off-by: Leah Rowe <info@minifree.org>
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 9191ed0ff8..d51ffaef7b 100644
index 70c2a7643c..a2854923e7 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -12,7 +12,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
select CPU_SUPPORTS_PM_TIMER_EMULATION
@@ -14,7 +14,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
select DRAM_SUPPORT_DDR4
select DRIVERS_USB_ACPI
select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
- select FSP_COMPRESS_FSP_S_LZ4
@@ -32,5 +32,5 @@ index 9191ed0ff8..d51ffaef7b 100644
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 5d8930edfa1d9537ba80e24c0cf8f0c9e4e9ec72 Mon Sep 17 00:00:00 2001
From c0bb0e62f169e07ab11c434fbd79a6a26b4e7690 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Wed, 18 Dec 2024 02:06:18 +0000
Subject: [PATCH 32/37] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
Subject: [PATCH 31/41] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
This is used by lbmk to know where a tb.bin file goes,
when extracting and padding TBT.bin from Lenovo ThunderBolt
@@ -74,5 +74,5 @@ index 2ffbaab85f..512b326381 100644
+
endif # VENDOR_LENOVO
--
2.39.5
2.47.3

View File

@@ -1,7 +1,7 @@
From 9b547c2029611793f895117a807fa2d2c22a5332 Mon Sep 17 00:00:00 2001
From c25cf16fb0d278354c7e2c19f534a04e27ac46dd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 21 Apr 2025 05:14:45 +0100
Subject: [PATCH 37/37] Conditional TBFW setting for T480/T480S
Subject: [PATCH 32/41] Conditional TBFW setting for kabylake thinkpads
Otherwise, other boards will define it, which
might trigger the vendor download script, and
@@ -13,14 +13,14 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
1 file changed, 4 insertions(+)
diff --git a/src/mainboard/lenovo/Kconfig b/src/mainboard/lenovo/Kconfig
index 512b326381..3d3490b35d 100644
index 512b326381..b2c7763198 100644
--- a/src/mainboard/lenovo/Kconfig
+++ b/src/mainboard/lenovo/Kconfig
@@ -18,6 +18,8 @@ config MAINBOARD_FAMILY
string
default MAINBOARD_PART_NUMBER
+if BOARD_LENOVO_T480 || BOARD_LENOVO_T480S
+if BOARD_LENOVO_T480 || BOARD_LENOVO_T480S || BOARD_LENOVO_X280 || BOARD_LENOVO_T470S || BOARD_LENOVO_T580
+
config LENOVO_TBFW_BIN
string "Lenovo ThunderBolt firmware bin file"
@@ -29,9 +29,9 @@ index 512b326381..3d3490b35d 100644
Just leave this blank if you don't care about this option. It's not
useful for every ThinkPad, only certain models.
+endif # BOARD LENOVO_T480 || BOARD_LENOVO_T480S
+endif # BOARD_LENOVO_T480 || BOARD_LENOVO_T480S || BOARD_LENOVO_X280 || BOARD_LENOVO_T470S || BOARD_LENOVO_T580
+
endif # VENDOR_LENOVO
--
2.39.5
2.47.3

View File

@@ -0,0 +1,30 @@
From 2c3a31547a14eb1b1145a5d153289b2eef6d71d8 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sat, 27 Sep 2025 23:30:46 +0300
Subject: [PATCH 33/41] soc/intel/alderlake: Disable
MRC_CACHE_USING_MRC_VERSION
There's some issue with building against the FSP headers in src/vendorcode.
Headers in 3rdparty/fsp work, but since FspProducerDataHeaer.h is missing
from there, we need to disable MRC_CACHE_USING_MRC_VERSION by force.
Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
src/soc/intel/alderlake/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 97c2ecca70..a2074fe05a 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -36,7 +36,6 @@ config SOC_INTEL_ALDERLAKE
select INTEL_GMA_VERSION_2
select INTEL_TXT_LIB
select MP_SERVICES_PPI_V2
- select MRC_CACHE_USING_MRC_VERSION if (SOC_INTEL_ALDERLAKE_PCH_N || SOC_INTEL_RAPTORLAKE) && !FSP_USE_REPO
select MRC_SETTINGS_PROTECT
select PARALLEL_MP_AP_WORK
select PLATFORM_USES_FSP2_2
--
2.47.3

View File

@@ -0,0 +1,76 @@
From 8eeb1de057b19938f1221b85e00699c58de90069 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Sep 2025 03:17:50 +0100
Subject: [PATCH 34/41] Subject: [PATCH 1/1] Add a -p option (skip FPTR checks)
if you pass -k (keep fptr modules), don't use -r, don't
use -t, you can essentially just use me_cleaner to
extract a ME image without changing it. this is useful
when for example, you just want to set the HAP bit.
however, me_cleaner still performs a FPTR check.
on some newer ME versions, it's always invalid according
to me_cleaner, because for example it doesn't handle
ME16 very well yet.
this patch adds an option to override the FPTR check
either pass -p or --pass-fptr
NOTE: we probably won't use this on coreboot's me_cleaner,
which is the corna version. we only need it on the newer
me_cleaner versions for e.g. ME16, on certain setups.
still, it's best to have the patch here too, just in case.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
util/me_cleaner/me_cleaner.py | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/util/me_cleaner/me_cleaner.py b/util/me_cleaner/me_cleaner.py
index fae5e56732..228bac899f 100755
--- a/util/me_cleaner/me_cleaner.py
+++ b/util/me_cleaner/me_cleaner.py
@@ -246,8 +246,10 @@ def check_partition_signature(f, offset):
return "{:#x}".format(decrypted_sig).endswith(sha256.hexdigest()) # FIXME
-def print_check_partition_signature(f, offset):
- if check_partition_signature(f, offset):
+def print_check_partition_signature(f, offset, pass_fptr):
+ if pass_fptr:
+ print("Skipping FPTR checks because the user told us to")
+ elif check_partition_signature(f, offset):
print("VALID")
else:
print("INVALID!!")
@@ -486,6 +488,8 @@ if __name__ == "__main__":
"--extract-me)", action="store_true")
parser.add_argument("-k", "--keep-modules", help="don't remove the FTPR "
"modules, even when possible", action="store_true")
+ parser.add_argument("-p", "--pass-fptr", help="skip FTPR signature checks"
+ "regardless of other operations", action="store_true")
bw_list.add_argument("-w", "--whitelist", metavar="whitelist",
help="Comma separated list of additional partitions "
"to keep in the final image. This can be used to "
@@ -871,12 +875,14 @@ if __name__ == "__main__":
print("Checking the FTPR RSA signature of the extracted ME "
"image... ", end="")
print_check_partition_signature(mef_copy,
- ftpr_offset + ftpr_mn2_offset)
+ ftpr_offset + ftpr_mn2_offset,
+ args.pass_fptr)
mef_copy.close()
if not me6_ignition:
print("Checking the FTPR RSA signature... ", end="")
- print_check_partition_signature(mef, ftpr_offset + ftpr_mn2_offset)
+ print_check_partition_signature(mef, ftpr_offset + ftpr_mn2_offset,
+ args.pass_fptr)
f.close()
--
2.47.3

View File

@@ -1,82 +0,0 @@
From 09740dc9d43a8dc24b7416b70476796515af6581 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Tue, 31 Dec 2024 01:40:42 +0000
Subject: [PATCH 34/37] soc/intel/pmc: Hardcoded poweroff after power fail
Coreboot can set the power state for power on after previous
power failure, based on the option table. On the ThinkPad T480,
we have no nvram and, due to coreboot's design, we therefore
have no option table, so the default setting is enabled.
In my testing, this seems to be that the system will turn on
after a power failure. If your ThinkPad was previously in a state
where it wouldn't turn on when plugging in the power, it'd be fine.
If your battery ran out later on, this would be triggered and
your ThinkPad would permanently turn on, when plugging in a charger,
and there is currently no way to configure this behaviour.
We currently only use the common SoC PMC code on the ThinkPad
T480, T480s and the Dell OptiPlex 3050 Micro, at the time of
this patch, and it is desirable that the system be set to power
off after power fail anyway.
In some cases, you might want the opposite, for example if you're
running a server. This will be documented on the website, for that
reason.
Signed-off-by: Leah Rowe <info@minifree.org>
---
src/soc/intel/common/block/pmc/pmclib.c | 36 +++----------------------
1 file changed, 4 insertions(+), 32 deletions(-)
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index 64b9bb997c..7823775bcb 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -776,38 +776,10 @@ void pmc_clear_pmcon_sts(void)
void pmc_set_power_failure_state(const bool target_on)
{
- const unsigned int state = get_uint_option("power_on_after_fail",
- CONFIG_MAINBOARD_POWER_FAILURE_STATE);
-
- /*
- * On the shutdown path (target_on == false), we only need to
- * update the register for MAINBOARD_POWER_STATE_PREVIOUS. For
- * all other cases, we don't write the register to avoid clob-
- * bering the value set on the boot path. This is necessary,
- * for instance, when we can't access the option backend in SMM.
- */
-
- switch (state) {
- case MAINBOARD_POWER_STATE_OFF:
- if (!target_on)
- break;
- printk(BIOS_INFO, "Set power off after power failure.\n");
- pmc_soc_set_afterg3_en(false);
- break;
- case MAINBOARD_POWER_STATE_ON:
- if (!target_on)
- break;
- printk(BIOS_INFO, "Set power on after power failure.\n");
- pmc_soc_set_afterg3_en(true);
- break;
- case MAINBOARD_POWER_STATE_PREVIOUS:
- printk(BIOS_INFO, "Keep power state after power failure.\n");
- pmc_soc_set_afterg3_en(target_on);
- break;
- default:
- printk(BIOS_WARNING, "Unknown power-failure state: %d\n", state);
- break;
- }
+ if (!target_on)
+ return;
+ printk(BIOS_INFO, "Set power off after power failure.\n");
+ pmc_soc_set_afterg3_en(false);
}
/* This function returns the highest assertion duration of the SLP_Sx assertion widths */
--
2.39.5

View File

@@ -0,0 +1,35 @@
From be79f8b72a098dcd51639210935ba02d2f5ff808 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Oct 2025 21:57:43 +0100
Subject: [PATCH 35/41] soc/intel/alderlake: Don't compress FSP-S
Build systems like lbmk need to reproducibly insert
certain vendor files on release images.
Compression isn't always reproducible, and making it
so costs a lot more time than simply disabling compression.
With this change, FSP-S uses slightly more space inside
the flash, but it's not that much.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
src/soc/intel/alderlake/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index a2074fe05a..08137d2706 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -16,7 +16,7 @@ config SOC_INTEL_ALDERLAKE
select DRAM_SUPPORT_DDR5
select DRIVERS_USB_ACPI
select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
- select FSP_COMPRESS_FSP_S_LZ4
+# select FSP_COMPRESS_FSP_S_LZ4
select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW
select FSP_M_XIP
select FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN
--
2.47.3

View File

@@ -0,0 +1,33 @@
From 226df168b34467ca8555e953b6d793f273c0b82c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Oct 2025 22:20:11 +0100
Subject: [PATCH 36/41] alderlake: don't require full fsp repo for fd path
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
src/soc/intel/alderlake/Kconfig | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 08137d2706..67e47c2e36 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -417,7 +417,14 @@ config FSP_HEADER_PATH
config FSP_FD_PATH
string
- depends on FSP_USE_REPO
+# dependency removed for lbmk purposes, so that the path is present
+# in the config regardless of whether it's used. this is for ./mk -d
+# on alderlake boards, which is used by lbmk to manually split fsp,
+# even though the result is identical to what coreboot produces, because
+# this enables lbmk to strip the fsp in release archives, and re-insert
+# for compliance reasons (due to technicalities in intel's licensing),
+# and to enable lbmk's advanced checksum verification of vendor files
+# depends on FSP_USE_REPO
default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/FSP.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE
default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/FSP.fd" if FSP_TYPE_IOT && SOC_INTEL_RAPTORLAKE_PCH_S
default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Fsp.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P
--
2.47.3

View File

@@ -0,0 +1,46 @@
From 30366be45e5b7521b93475f68c7143bd683b25f3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Oct 2025 04:47:06 +0100
Subject: [PATCH 37/41] soc/alderlake: disable stack overflow debug option
same as on other boards. based on this commit:
commit 51cc2bacb6b07279b97e9934d079060475481fb6
Author: Subrata Banik <subratabanik@google.com>
Author: Subrata Banik <subratabanik@google.com>
Date: Fri Dec 13 13:07:28 2024 +0530
soc/intel/pantherlake: Disable stack overflow debug options
yeah, i've been replicating this change per platform.
we do alderlake now in libreboot, so let's set that here too.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
src/soc/intel/alderlake/Kconfig | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 67e47c2e36..e9c56fc6b9 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -331,6 +331,15 @@ config SOC_INTEL_UFS_CLK_FREQ_HZ
int
default 19200000
+# Override DEBUG Kconfig to avoid false alarm about stack overflow.
+config DEBUG_STACK_OVERFLOW_BREAKPOINTS
+ bool
+ default n
+
+config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
+ bool
+ default n
+
config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ
int
default 133
--
2.47.3

View File

@@ -1,153 +0,0 @@
From 49204919e885dca2be45ffbaf2f5af62109ec3a7 Mon Sep 17 00:00:00 2001
From: gaspar-ilom <gasparilom@riseup.net>
Date: Thu, 6 Mar 2025 23:00:00 +0000
Subject: [PATCH 1/1] do not break building other thinkpads with the hacks for
the t480/s made Mate Kukri
still not fixing things properly but at least it should now be possible to build older thinkpads without regressions.
prior, some code was just commented or unreachable. now we make this explicit with preprocessor directives.
heads should build all boards on this coreboot version from the same coreboot tree.
Signed-off-by: gaspar-ilom <gasparilom@riseup.net>
---
src/device/pci_rom.c | 9 ++++++---
src/ec/lenovo/h8/acpi/ec.asl | 4 +++-
src/ec/lenovo/h8/bluetooth.c | 14 ++++++++++----
src/ec/lenovo/h8/wwan.c | 14 ++++++++++----
4 files changed, 29 insertions(+), 12 deletions(-)
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
index bba98d9dea..db3dbbe2ce 100644
--- a/src/device/pci_rom.c
+++ b/src/device/pci_rom.c
@@ -396,16 +396,19 @@ void pci_rom_ssdt(const struct device *device)
rom = cbrom;
}
-#if 0
+
+ #if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
+ const char *scope = "\\_SB.PCI0.RP01.PEGP";
+ #else
const char *scope = acpi_device_path(device);
+ #endif
if (!scope) {
printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device));
return;
}
-#endif
/* write _ROM method */
- acpigen_write_scope("\\_SB.PCI0.RP01.PEGP");
+ acpigen_write_scope(scope);
acpigen_write_rom((void *)rom, rom->size * 512);
acpigen_pop_len(); /* pop scope */
}
diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl
index 8f4a8e1986..f80c15106c 100644
--- a/src/ec/lenovo/h8/acpi/ec.asl
+++ b/src/ec/lenovo/h8/acpi/ec.asl
@@ -331,7 +331,9 @@ Device(EC)
#include "sleepbutton.asl"
#include "lid.asl"
#include "beep.asl"
-//#include "thermal.asl"
+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
+#include "thermal.asl"
+#endif
#include "systemstatus.asl"
#include "thinkpad.asl"
}
diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c
index be71a24ced..e60b6c088c 100644
--- a/src/ec/lenovo/h8/bluetooth.c
+++ b/src/ec/lenovo/h8/bluetooth.c
@@ -1,6 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-// #include <southbridge/intel/common/gpio.h>
+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
+#include <southbridge/intel/common/gpio.h>
+#endif
#include <console/console.h>
#include <device/device.h>
#include <ec/acpi/ec.h>
@@ -26,23 +28,27 @@ void h8_bluetooth_enable(int on)
*/
bool h8_has_bdc(const struct device *dev)
{
+ #if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
+ printk(BIOS_INFO, "H8: BDC detection not implemented. "
+ "Assuming BDC installed\n");
+ return true;
+ #else
struct ec_lenovo_h8_config *conf = dev->chip_info;
- if (1 || !conf->has_bdc_detection) {
+ if (!conf->has_bdc_detection) {
printk(BIOS_INFO, "H8: BDC detection not implemented. "
"Assuming BDC installed\n");
return true;
}
-#if 0
if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) {
printk(BIOS_INFO, "H8: BDC installed\n");
return true;
}
-#endif
printk(BIOS_INFO, "H8: BDC not installed\n");
return false;
+ #endif
}
/*
diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c
index 5cdcf77406..b4f5787e01 100644
--- a/src/ec/lenovo/h8/wwan.c
+++ b/src/ec/lenovo/h8/wwan.c
@@ -1,6 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-// #include <southbridge/intel/common/gpio.h>
+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
+#include <southbridge/intel/common/gpio.h>
+#endif
#include <console/console.h>
#include <device/device.h>
#include <ec/acpi/ec.h>
@@ -24,23 +26,27 @@ void h8_wwan_enable(int on)
*/
bool h8_has_wwan(const struct device *dev)
{
+ #if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
+ printk(BIOS_INFO, "H8: WWAN detection not implemented. "
+ "Assuming WWAN installed\n");
+ return true;
+ #else
struct ec_lenovo_h8_config *conf = dev->chip_info;
- if (1 || !conf->has_wwan_detection) {
+ if (!conf->has_wwan_detection) {
printk(BIOS_INFO, "H8: WWAN detection not implemented. "
"Assuming WWAN installed\n");
return true;
}
-#if 0
if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) {
printk(BIOS_INFO, "H8: WWAN installed\n");
return true;
}
-#endif
printk(BIOS_INFO, "H8: WWAN not installed\n");
return false;
+ #endif
}
/*
--
2.39.5

View File

@@ -0,0 +1,92 @@
From 90332fe96aca0de4d99d58d1593048c77e1bdecf Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sun, 11 May 2025 15:41:22 -0600
Subject: [PATCH 38/41] ec/dell/mec5035: Add command to disable EC-initiated
thermal shutdown
If command 0xBF isn't sent, the EC shuts down the system without warning
as soon as the CPU temperature reaches about 87 degrees, without letting
the CPU thermal throttle to try and reduce the temperature. With vendor
firmware, the CPU is able to reach around 100 degrees before thermal
throttling.
This command was found by collecting EC commands by logging the LPC bus
while running with vendor firmware and then replaying observed commands
from coreboot. By systematically replaying subsets of commands in a
binary search pattern and then stress testing the system, the command to
disable the shutdown was isolated.
The exact meaning of the parameters for this command are unknown at this
time, but do seem to differ between different generations of these
laptops. Due to this, the commmand should be called by mainboard
specific code which passes the specific parameter value used.
The Google Wilco EC code, which runs on Latitude Chromebooks and shares
many commands with the standard Latitude ECs, suggests that command 0xBF
tells the EC about the processors CPUID. However, the values observed in
LPC bus logs do not seem to correspond with any CPUID values on the
non-Chromebook systems I tested.
Observed command parameter values (sent on mailbox registers 2-4):
- E6430 (Ivy Bridge): 0x07, 0x00, 0x00
- M6800 (Haswell): 0x14, 0x00, 0x00
Change-Id: I42f09a3ef681007f64d9c5b1a29248b594737a86
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
src/ec/dell/mec5035/mec5035.c | 19 +++++++++++++++++++
src/ec/dell/mec5035/mec5035.h | 2 ++
2 files changed, 21 insertions(+)
diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
index c5067c16f6..b316fa4989 100644
--- a/src/ec/dell/mec5035/mec5035.c
+++ b/src/ec/dell/mec5035/mec5035.c
@@ -114,6 +114,25 @@ void mec5035_sleep_enable(void)
ec_command(CMD_SLEEP_ENABLE);
}
+void mec5035_cmd_bf(u8 i)
+{
+ /*
+ * If this command isn't sent, the EC shuts down the system as soon as
+ * the CPU temperature reaches about 87 degrees. It is unknown exactly
+ * what the parameters represent. The Google Wilco EC code, which runs
+ * on Latitude Chromebooks and shares some commands with the standard
+ * Latitude EC code, suggests command 0xBF tells the EC the CPUID, but
+ * the values observed in LPC bus logs don't seem to match any CPUID
+ * values of the normal Latitudes this was tested with.
+ * Observed i values:
+ * - E6430 (Ivy Bridge): 0x7
+ * - M6800 (Haswell): 0x14
+ */
+ u8 buf[3] = {i, 0, 0};
+ write_mailbox_regs(buf, 2, 3);
+ ec_command(CMD_BF);
+}
+
void mec5035_early_init(void)
{
/* If this isn't sent the EC shuts down the system after about 15
diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
index 5cd907bf71..71d1a71075 100644
--- a/src/ec/dell/mec5035/mec5035.h
+++ b/src/ec/dell/mec5035/mec5035.h
@@ -14,6 +14,7 @@ enum mec5035_cmd {
CMD_POWER_BUTTON_TO_HOST = 0x3e,
CMD_ACPI_WAKEUP_CHANGE = 0x4a,
CMD_SLEEP_ENABLE = 0x64,
+ CMD_BF = 0xbf,
CMD_CPU_OK = 0xc2,
};
@@ -65,5 +66,6 @@ void mec5035_change_wake(u8 source, enum ec_wake_change change);
void mec5035_sleep_enable(void);
void mec5035_smi_sleep(int slp_type);
+void mec5035_cmd_bf(u8 i);
#endif /* _EC_DELL_MEC5035_H_ */
--
2.47.3

View File

@@ -0,0 +1,36 @@
From 68048f4afe369ece02143f9a4a7da2104ff2d10b Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sun, 11 May 2025 16:28:23 -0600
Subject: [PATCH 39/41] mb/dell/snb_ivb_latitude: Disable EC initiated shutdown
at 87 degrees
If command 0xBF isn't sent, the EC will shut down the system without
warning once the CPU reaches approximately 87 degrees, without the
system thermal throttling first. Call the newly added function from the
MEC5035 code to send this command and disable this behavior.
Tested on the Latitude E6430.
Change-Id: I2b2dc1e3ab115e05d05eaac06892343394d37fdf
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
src/mainboard/dell/snb_ivb_latitude/early_init.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/src/mainboard/dell/snb_ivb_latitude/early_init.c b/src/mainboard/dell/snb_ivb_latitude/early_init.c
index ff83db095b..ef385a0a70 100644
--- a/src/mainboard/dell/snb_ivb_latitude/early_init.c
+++ b/src/mainboard/dell/snb_ivb_latitude/early_init.c
@@ -11,4 +11,9 @@ void bootblock_mainboard_early_init(void)
| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
| COMB_LPC_EN | COMA_LPC_EN);
mec5035_early_init();
+
+ /* Observed from LPC logs with vendor firmware. Seems to disable
+ * EC-initiated shutdown when the CPU reaches approximately 87 degrees.
+ * The exact meaning of the parameter is currently unknown. */
+ mec5035_cmd_bf(0x07);
}
--
2.47.3

View File

@@ -1,62 +0,0 @@
From 281151d85240bd8a60545b6415e0f44ce6a2af33 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Tue, 29 Apr 2025 17:31:13 +0300
Subject: [PATCH] WIP: Fix build with GCC 15 as host compiler
GCC 15 now considers the unterminated-string-initialization warning as
part of -Werror by default. Coreboot compiles host utilities with the
system compiler, which results in getting this error in some files.
Mark a hexadecimal translation table in cbfstool code as "nonstring" to
avoid the warning-turned-error.
The bios log prefixes are non-null-terminated as well, but I couldn't
figure out how to mark them as non-strings. Temporarily disable the
warning with a pragma to avoid the error. That pragma causes an error on
GCC 14, so disable pragma warnings along with it to avoid that as well.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
src/commonlib/include/commonlib/loglevel.h | 4 ++++
util/cbfstool/common.c | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/commonlib/include/commonlib/loglevel.h b/src/commonlib/include/commonlib/loglevel.h
index 79fbcfc6d92b..31438c945ff5 100644
--- a/src/commonlib/include/commonlib/loglevel.h
+++ b/src/commonlib/include/commonlib/loglevel.h
@@ -163,6 +163,9 @@
* When printing logs, lines should be printed with the following prefixes in
* front of them according to the BIOS_LOG_PREFIX_PATTERN printf() pattern.
*/
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wpragmas"
+#pragma GCC diagnostic ignored "-Wunterminated-string-initialization"
#define BIOS_LOG_PREFIX_PATTERN "[%.5s] "
#define BIOS_LOG_PREFIX_MAX_LEVEL BIOS_SPEW
static const char bios_log_prefix[BIOS_LOG_PREFIX_MAX_LEVEL + 1][5] = {
@@ -177,6 +180,7 @@ static const char bios_log_prefix[BIOS_LOG_PREFIX_MAX_LEVEL + 1][5] = {
[BIOS_DEBUG] = "DEBUG",
[BIOS_SPEW] = "SPEW ",
};
+#pragma GCC diagnostic pop
/*
* When printing to terminals supporting ANSI escape sequences, the following
diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
index 7154bc9d5425..cb08c9e8ec11 100644
--- a/util/cbfstool/common.c
+++ b/util/cbfstool/common.c
@@ -192,7 +192,7 @@ uint64_t intfiletype(const char *name)
char *bintohex(uint8_t *data, size_t len)
{
- static const char translate[16] = "0123456789abcdef";
+ static const char translate[16] __attribute__((__nonstring__)) = "0123456789abcdef";
char *result = malloc(len * 2 + 1);
if (result == NULL)
--
2.49.0

View File

@@ -1,71 +0,0 @@
From ee3925486f3567b9fe45cb98a88b9acc64991127 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 29 Apr 2025 21:15:22 +0100
Subject: [PATCH 1/1] crossgcc/gmp: Add upstream fix for GCC 15
See:
https://gmplib.org/list-archives/gmp-devel/2025-January/006279.html
by default, upstream GCC-15 now defaults to -std=c23, instead
of -std=c17, which can cause some build issues.
GMP has this patch on their mailing list for GCC-15 (see link).
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
.../gmp-6.3.0_acinclude-m4-fix-std-c23.patch | 43 +++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
diff --git a/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
new file mode 100644
index 0000000000..b884b62df7
--- /dev/null
+++ b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
@@ -0,0 +1,43 @@
+From b1b61bc8ab19659f0fb8c0f87edcd79ae1bfef7e Mon Sep 17 00:00:00 2001
+From: Rudi Heitbaum <rudi@heitbaum.com>
+Date: Wed, 22 Jan 2025 02:34:09 +0100
+Subject: [PATCH 1/1] acinclude.m4: fix -std=c23 build failure
+
+Add prototype to configure test function as c23 removes unprototyped
+functions.
+
+gcc-15 switched to -std=c23 by default:
+
+ https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=55e3bd376b2214e200fa76d12b67ff259b06c212
+
+As a result `configure` fails with:
+ conftest.c: In function 'f':
+ conftest.c:12:48: error: too many arguments to function 'g'; expected 0, have 6
+ 12 | for(i=0;i<1;i++){if(e(got,got,9,d[i].n)==0)h();g(i,d[i].src,d[i].n,got,d[i].want,9);if(d[i].n)h();}}
+ | ^ ~
+ conftest.c:7:6: note: declared here
+ 7 | void g(){}
+ | ^
+
+Link: https://gmplib.org/list-archives/gmp-bugs/2024-November/005550.html
+Signed-off-by: Rudi Heitbaum <rudi@heitbaum.com>
+---
+ acinclude.m4 | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/acinclude.m4 b/acinclude.m4
+index 9cf9483..1eed843 100644
+--- a/acinclude.m4
++++ b/acinclude.m4
+@@ -609,7 +609,7 @@ GMP_PROG_CC_WORKS_PART([$1], [long long reliability test 1],
+
+ #if defined (__GNUC__) && ! defined (__cplusplus)
+ typedef unsigned long long t1;typedef t1*t2;
+-void g(){}
++void g(int,const t1 *,t1,t1 *,const t1 *,int){}
+ void h(){}
+ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
+ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;}
+--
+2.39.5
+
--
2.39.5

View File

@@ -0,0 +1,28 @@
From 6e084398d4e6847b0f64325dadd4cfee0b43d7ea Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 20 Dec 2025 20:12:48 +0100
Subject: [PATCH 1/1] fix ifdtool build
not my mistake. someone messed up.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
util/ifdtool/ifdtool.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
index ea8dfc788d..33f00436bc 100644
--- a/util/ifdtool/ifdtool.c
+++ b/util/ifdtool/ifdtool.c
@@ -2598,7 +2598,7 @@ int main(int argc, char *argv[])
}
mode_nuke = 1;
break;
- Case 'v':
+ case 'v':
print_version();
exit(EXIT_SUCCESS);
break;
--
2.47.3

View File

@@ -1,54 +0,0 @@
From 983835d1470dde4559d9ee58c60e65c0bb3873c2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 29 Apr 2025 23:13:42 +0100
Subject: [PATCH 1/1] further gcc-15 fix for compiling gmp
same as the previous fix, but we needed to apply
the exact same change to the configure file, in
the appropriate place.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
...6.3.0_acinclude-m4-fix-std-c23-extra.patch | 30 +++++++++++++++++++
1 file changed, 30 insertions(+)
create mode 100644 util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
diff --git a/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
new file mode 100644
index 0000000000..bee0159abf
--- /dev/null
+++ b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
@@ -0,0 +1,30 @@
+From f1da82325f91ccf8f3a251c0f94388acf091c1fe Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 29 Apr 2025 23:11:25 +0100
+Subject: [PATCH 1/1] further gcc-15 -std=23 mitigation
+
+the same fix as in the previous revision, also needs
+to be applied here. this make the coreboot build process
+pass, when compiling gmp.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ configure | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/configure b/configure
+index 7910aa0..bd4342d 100755
+--- a/configure
++++ b/configure
+@@ -6568,7 +6568,7 @@ if test "$gmp_prog_cc_works" = yes; then
+
+ #if defined (__GNUC__) && ! defined (__cplusplus)
+ typedef unsigned long long t1;typedef t1*t2;
+-void g(){}
++void g(int,const t1 *,t1,t1 *,const t1 *,int){}
+ void h(){}
+ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
+ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;}
+--
+2.39.5
+
--
2.39.5

View File

@@ -0,0 +1,30 @@
From ca27517cb5752d078a3f8328ff6b220f652b0849 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 20 Dec 2025 22:36:18 +0100
Subject: [PATCH 1/1] tests/Makefile.mk: use 3rdparty/cmocka by default
(tests)
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
tests/Makefile.mk | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/tests/Makefile.mk b/tests/Makefile.mk
index f3f122dd38..33bb2a2d07 100644
--- a/tests/Makefile.mk
+++ b/tests/Makefile.mk
@@ -25,7 +25,9 @@ TEST_LDFLAGS += --coverage
endif
# Use system cmoka in default, or build from 3rdparty source code if requested
-USE_SYSTEM_CMOCKA ?= 1
+# PATCH NOTE: lbmk sets it to 0 by default. You can still override it to 1
+# if you wish; upstream sets this to 1 by default, but we do 0
+USE_SYSTEM_CMOCKA ?= 0
ifeq ($(USE_SYSTEM_CMOCKA),1)
ifeq ($(shell $(HOSTPKG_CONFIG) --exists cmocka || echo 1),1)
$(warning No system cmocka, build from 3rdparty instead...)
--
2.47.3

View File

@@ -0,0 +1,51 @@
From 22076426d1de6d2e49b8728b3cf206bfcfc6742d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 23 Dec 2025 18:41:27 +0100
Subject: [PATCH 1/2] mb/dell/optiplex_780: use legacy HDA verb table
See:
commit 31fc5b06a6be62b30739d33eeabe6c2727679bb1
Author: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Date: Thu Aug 7 08:31:24 2025 +0900
device: Introduce reworked azalia verb table
and:
commit 50a59d4464917503847eeeb2df4320c35cf2f6cc
Author: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Date: Mon Sep 15 16:25:21 2025 +0900
device: Add Kconfig to prepare for reworked verb table implementation
Without this change, lbmk gets the following error
when building for Dell OptiPlex 780:
i386-elf-ld.bfd: build/ramstage/device/azalia_device.o: in function `azalia_codecs_init':
/path/to/corebootclone/src/device/azalia_device.c:318:(.text.azalia_codecs_init+0xa): undefined reference to `mainboard_azalia_codecs'
This is a temporary fix. Upstream will require that the code
be fully adapted at a future date. Therefore, one could consider
the current functionality to be "deprecated".
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
src/mainboard/dell/optiplex_780/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mainboard/dell/optiplex_780/Kconfig b/src/mainboard/dell/optiplex_780/Kconfig
index fc649e35d5..172bb2fa87 100644
--- a/src/mainboard/dell/optiplex_780/Kconfig
+++ b/src/mainboard/dell/optiplex_780/Kconfig
@@ -2,6 +2,7 @@
config BOARD_DELL_OPTIPLEX_780_COMMON
def_bool n
+ select AZALIA_USE_LEGACY_VERB_TABLE
select BOARD_ROMSIZE_KB_8192
select CPU_INTEL_SOCKET_LGA775
select DRIVERS_I2C_CK505
--
2.47.3

View File

@@ -0,0 +1,30 @@
From 6cea443cf12eb94b3eafcbba4ce6370b31f716cc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 23 Dec 2025 18:46:45 +0100
Subject: [PATCH 2/2] hp8300cmt: use legacy verb table
same as for the 780 optiplex patch
coreboot is making some changes to the way verbs are
handled. for now, this change is being made to adapt.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
src/mainboard/hp/compaq_elite_8300_cmt/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
index d2bfd35dc4..30be7fb3fe 100644
--- a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
+++ b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
@@ -2,6 +2,7 @@ if BOARD_HP_COMPAQ_ELITE_8300_CMT
config BOARD_SPECIFIC_OPTIONS
def_bool y
+ select AZALIA_USE_LEGACY_VERB_TABLE
select BOARD_ROMSIZE_KB_16384
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
--
2.47.3

View File

@@ -0,0 +1,34 @@
From 3bb05d0486186400df8ed9ac66cfadcbff7a48a6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 6 Jan 2026 21:42:21 +0000
Subject: [PATCH 1/1] topton x2e n150: use old fsp
i added the old fsp back, so that we didn't have to
mess around with vendor files in lbmk, because coreboot
upstream updated the fsp repo, which modified this
fsp file.
we know the old fsp worked. there's no point testing
the new one yet, unless someone can tell me about
real bugs that got fixed.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
src/soc/intel/alderlake/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index e9c56fc6b9..43cd6f8efe 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -438,6 +438,7 @@ config FSP_FD_PATH
default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/FSP.fd" if FSP_TYPE_IOT && SOC_INTEL_RAPTORLAKE_PCH_S
default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Fsp.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P
default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeS/Fsp.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_S
+ default "3rdparty/fspcc36ae2b5775fa7400cb3282680afc0f6cb37a3c/AlderLakeFspBinPkg/IoT/AlderLakeN/Fsp.fd" if BOARD_TOPTON_X2E_N150
default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Fsp.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_N
default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P
default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeS/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_S
--
2.47.3

View File

@@ -0,0 +1,31 @@
From 6c6b7a71bfb36f9639abe72066851de22aa4f1ca Mon Sep 17 00:00:00 2001
From: Ron Nazarov <ron@noisytoot.org>
Date: Sat, 14 Feb 2026 20:13:01 +0000
Subject: [PATCH] mb/supermicro/x11-lga1151-series: Disable ME HECI in
devicetree
Since we always use me_cleaner, this speeds up boot time by preventing
coreboot from wasting a few seconds waiting for HECI.
Change-Id: Ifbb16ba9f09129795dabe7861260ea4d995c0350
Signed-off-by: Ron Nazarov <ron@noisytoot.org>
---
src/mainboard/supermicro/x11-lga1151-series/devicetree.cb | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
index fbf896c6ae..aa09a41f2f 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
+++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
@@ -15,7 +15,7 @@ chip soc/intel/skylake
device ref sa_thermal on end
device ref south_xhci on end
device ref thermal on end
- device ref heci1 on end
+ device ref heci1 off end
device ref sata on
register "SataSalpSupport" = "1"
register "SataPortsEnable" = "{
--
2.52.0

View File

@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-3.0-or-later
tree="default"
rev="c247f62749b967143e58c33aa0e5e234711a628f"
rev="fcd716d9a272461da1fdbaf1c048eb5a52c7896b"

View File

@@ -16,11 +16,13 @@ CONFIG_COMPILER_GCC=y
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_OPTION_BACKEND_NONE=y
# CONFIG_USE_OPTION_TABLE is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -113,10 +115,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_TOPTON is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
CONFIG_MAINBOARD_VERSION="1.0"
CONFIG_MAINBOARD_DIR="dell/optiplex_3050"
CONFIG_MAINBOARD_DIR="dell/sklkbl_desktops"
CONFIG_VGA_BIOS_ID="8086,0406"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=512
@@ -132,7 +133,8 @@ CONFIG_MAX_CPUS=16
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_UART_FOR_CONSOLE=0
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_VARIANT_DIR="optiplex_3050"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
# CONFIG_VGA_BIOS is not set
@@ -144,24 +146,25 @@ CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
# CONFIG_FATAL_ASSERTS is not set
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
# CONFIG_CONSOLE_POST is not set
CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_USE_PM_ACPI_TIMER=y
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
CONFIG_BOARD_DELL_OPTIPLEX_3050=y
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
CONFIG_BOARD_DELL_OPTIPLEX_3050=y
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -176,6 +179,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_3050=y
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
# CONFIG_BOARD_DELL_XPS_8300 is not set
CONFIG_BOARD_DELL_SKLKBL_DESKTOPS_COMMON=y
CONFIG_DCACHE_RAM_BASE=0xfef00000
CONFIG_DCACHE_RAM_SIZE=0x40000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -205,10 +209,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -252,6 +253,7 @@ CONFIG_SMM_RESERVED_SIZE=0x200000
CONFIG_SMM_MODULE_STACK_SIZE=0x800
CONFIG_ACPI_BERT_SIZE=0x0
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
CONFIG_ACPI_CPU_STRING="CP%02X"
@@ -269,7 +271,6 @@ CONFIG_SOC_INTEL_I2C_DEV_MAX=6
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
@@ -287,6 +288,8 @@ CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
CONFIG_SOC_INTEL_KABYLAKE=y
CONFIG_SKYLAKE_SOC_PCH_H=y
@@ -296,7 +299,7 @@ CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
CONFIG_FSP_T_LOCATION=0xfffe0000
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
CONFIG_SOC_INTEL_COMMON=y
#
@@ -434,7 +437,6 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -484,7 +486,6 @@ CONFIG_HAVE_ME_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_UDK_BASE=y
CONFIG_UDK_2017_BINDING=y
CONFIG_UDK_2013_VERSION=2013
@@ -504,7 +505,6 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -552,6 +552,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -567,6 +568,8 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_DRAM_SUPPORT_DDR4=y
CONFIG_DRAM_SUPPORT_DDR3=y
# end of Devices
#
@@ -574,8 +577,8 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_DRIVERS_EFI_FW_INFO is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
CONFIG_MRC_SETTINGS_PROTECT=y
# CONFIG_DRIVERS_OPTION_CFR is not set
@@ -613,6 +616,7 @@ CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
CONFIG_FSP_VGA_MODE12_BPP=0x0
CONFIG_INTEL_GMA_ACPI=y
CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set

View File

@@ -16,11 +16,13 @@ CONFIG_COMPILER_GCC=y
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_OPTION_BACKEND_NONE=y
# CONFIG_USE_OPTION_TABLE is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -113,10 +115,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_TOPTON is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
CONFIG_MAINBOARD_VERSION="1.0"
CONFIG_MAINBOARD_DIR="dell/optiplex_3050"
CONFIG_MAINBOARD_DIR="dell/sklkbl_desktops"
CONFIG_VGA_BIOS_ID="8086,0406"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=512
@@ -130,7 +131,8 @@ CONFIG_MAX_CPUS=16
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_UART_FOR_CONSOLE=0
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_VARIANT_DIR="optiplex_3050"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
# CONFIG_VGA_BIOS is not set
@@ -142,24 +144,25 @@ CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
# CONFIG_FATAL_ASSERTS is not set
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
# CONFIG_CONSOLE_POST is not set
CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_USE_PM_ACPI_TIMER=y
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
CONFIG_BOARD_DELL_OPTIPLEX_3050=y
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
CONFIG_BOARD_DELL_OPTIPLEX_3050=y
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -174,6 +177,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_3050=y
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
# CONFIG_BOARD_DELL_XPS_8300 is not set
CONFIG_BOARD_DELL_SKLKBL_DESKTOPS_COMMON=y
CONFIG_DCACHE_RAM_BASE=0xfef00000
CONFIG_DCACHE_RAM_SIZE=0x40000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -203,10 +207,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,6 +251,7 @@ CONFIG_SMM_RESERVED_SIZE=0x200000
CONFIG_SMM_MODULE_STACK_SIZE=0x800
CONFIG_ACPI_BERT_SIZE=0x0
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
CONFIG_ACPI_CPU_STRING="CP%02X"
@@ -267,7 +269,6 @@ CONFIG_SOC_INTEL_I2C_DEV_MAX=6
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
@@ -285,6 +286,8 @@ CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
CONFIG_SOC_INTEL_KABYLAKE=y
CONFIG_SKYLAKE_SOC_PCH_H=y
@@ -294,7 +297,7 @@ CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
CONFIG_FSP_T_LOCATION=0xfffe0000
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
CONFIG_SOC_INTEL_COMMON=y
#
@@ -432,7 +435,6 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -482,7 +484,6 @@ CONFIG_HAVE_ME_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_UDK_BASE=y
CONFIG_UDK_2017_BINDING=y
CONFIG_UDK_2013_VERSION=2013
@@ -502,7 +503,6 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -544,6 +544,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -559,6 +560,8 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_DRAM_SUPPORT_DDR4=y
CONFIG_DRAM_SUPPORT_DDR3=y
# end of Devices
#
@@ -566,8 +569,8 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_DRIVERS_EFI_FW_INFO is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
CONFIG_MRC_SETTINGS_PROTECT=y
# CONFIG_DRIVERS_OPTION_CFR is not set
@@ -605,6 +608,7 @@ CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
CONFIG_FSP_VGA_MODE12_BPP=0x0
CONFIG_INTEL_GMA_ACPI=y
CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set

View File

@@ -6,8 +6,8 @@ payload_seabios="y"
payload_grub="y"
payload_memtest="y"
grub_scan_disk="nvme ahci"
grubtree="xhci"
grubtree="xhci_nvme"
vcfg="3050micro"
build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot"
IFD_platform="sklkbl"
payload_uboot_amd64="y"
payload_uboot="amd64"

View File

@@ -0,0 +1,811 @@
#
# Automatically generated file; DO NOT EDIT.
# coreboot configuration
#
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_LTO is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
CONFIG_USE_BLOBS=y
# CONFIG_USE_AMD_BLOBS is not set
# CONFIG_USE_QC_BLOBS is not set
# CONFIG_COVERAGE is not set
# CONFIG_UBSAN is not set
CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
# CONFIG_ASAN is not set
# CONFIG_NO_STAGE_CACHE is not set
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
# Mainboard
#
#
# Important: Run 'make distclean' before switching boards
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ARM is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_ERYING is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HARDKERNEL is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LATTEPANDA is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_MITAC_COMPUTING is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_NOVACUSTOM is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
# CONFIG_VENDOR_PACKARDBELL is not set
# CONFIG_VENDOR_PCENGINES is not set
# CONFIG_VENDOR_PINE64 is not set
# CONFIG_VENDOR_PORTWELL is not set
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TOPTON is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
CONFIG_MAINBOARD_VERSION="1.0"
CONFIG_MAINBOARD_DIR="dell/sklkbl_desktops"
CONFIG_VGA_BIOS_ID="8086,0406"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=512
CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Dell Inc."
CONFIG_CBFS_SIZE=0xEEE000
# CONFIG_CONSOLE_SERIAL is not set
CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
CONFIG_MAX_CPUS=16
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_VARIANT_DIR="optiplex_3050"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
# CONFIG_VGA_BIOS is not set
CONFIG_PCIEXP_ASPM=y
CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
# CONFIG_FATAL_ASSERTS is not set
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
# CONFIG_CONSOLE_POST is not set
CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_USE_PM_ACPI_TIMER=y
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
CONFIG_BOARD_DELL_OPTIPLEX_3050=y
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
# CONFIG_BOARD_DELL_XPS_8300 is not set
CONFIG_BOARD_DELL_SKLKBL_DESKTOPS_COMMON=y
CONFIG_DCACHE_RAM_BASE=0xfef00000
CONFIG_DCACHE_RAM_SIZE=0x40000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin"
CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
CONFIG_USE_LEGACY_8254_TIMER=y
# CONFIG_DEBUG_SMI is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
CONFIG_HAVE_IFD_BIN=y
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
CONFIG_D3COLD_SUPPORT=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
CONFIG_ROM_SIZE=0x01000000
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
# end of Mainboard
#
# Chipset
#
#
# SoC
#
CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x200000
CONFIG_SMM_MODULE_STACK_SIZE=0x800
CONFIG_ACPI_BERT_SIZE=0x0
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
CONFIG_IFD_CHIPSET="sklkbl"
CONFIG_IED_REGION_SIZE=0x400000
CONFIG_MAX_ROOT_PORTS=24
CONFIG_PCR_BASE_ADDRESS=0xfd000000
CONFIG_CPU_BCLK_MHZ=100
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
CONFIG_CPU_XTAL_HZ=24000000
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
CONFIG_SOC_INTEL_I2C_DEV_MAX=6
# CONFIG_ENABLE_SATA_TEST_MODE is not set
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_FSP_PUBLISH_MBP_HOB=y
CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
CONFIG_MAX_HECI_DEVICES=5
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_HAVE_PAM0_REGISTER=y
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
CONFIG_SOC_INTEL_KABYLAKE=y
CONFIG_SKYLAKE_SOC_PCH_H=y
CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FSP_T_LOCATION=0xfffe0000
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
CONFIG_UART_BITBANG_TX_DELAY_MS=5
CONFIG_SOC_INTEL_COMMON=y
#
# Intel SoC Common Code for IP blocks
#
CONFIG_SOC_INTEL_COMMON_BLOCK=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
# CONFIG_USE_COREBOOT_MP_INIT is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
CONFIG_INTEL_CAR_NEM_ENHANCED=y
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
CONFIG_HAVE_HYPERTHREADING=y
# CONFIG_FSP_HYPERTHREADING is not set
# CONFIG_INTEL_KEYLOCKER is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
CONFIG_SOC_INTEL_CSE_RW_FILE=""
CONFIG_SOC_INTEL_CSE_RW_VERSION=""
CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
# CONFIG_SOC_INTEL_DISABLE_IGD is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
CONFIG_SA_ENABLE_DPR=y
CONFIG_HAVE_CAPID_A_REGISTER=y
CONFIG_HAVE_BDSM_BGSM_REGISTER=y
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
#
# Intel SoC Common PCH Code
#
CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
#
# Intel SoC Common coreboot stages and non-IP blocks
#
CONFIG_SOC_INTEL_COMMON_BASECODE=y
CONFIG_SOC_INTEL_COMMON_RESET=y
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
CONFIG_PAVP=y
# CONFIG_MMA is not set
CONFIG_SOC_INTEL_COMMON_NHLT=y
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
#
# CPU
#
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
CONFIG_SET_MSR_AESNI_LOCK_BIT=y
CONFIG_CPU_INTEL_COMMON_SMM=y
CONFIG_PARALLEL_MP=y
CONFIG_PARALLEL_MP_AP_WORK=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
#
# Southbridge
#
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
#
# Super I/O
#
CONFIG_SUPERIO_SMSC_SCH555x=y
#
# Embedded Controllers
#
#
# Intel Firmware
#
CONFIG_HAVE_ME_BIN=y
# CONFIG_STITCH_ME_BIN is not set
# CONFIG_CHECK_ME is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
# CONFIG_USE_ME_CLEANER is not set
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_UDK_BASE=y
CONFIG_UDK_2017_BINDING=y
CONFIG_UDK_2013_VERSION=2013
CONFIG_UDK_2017_VERSION=2017
CONFIG_UDK_202005_VERSION=202005
CONFIG_UDK_202111_VERSION=202111
CONFIG_UDK_202302_VERSION=202302
CONFIG_UDK_202305_VERSION=202305
CONFIG_UDK_VERSION=2017
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
CONFIG_DEFAULT_EBDA_SIZE=0x400
# end of Chipset
#
# Devices
#
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
CONFIG_HAVE_FSP_GOP=y
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
CONFIG_MAINBOARD_USE_LIBGFXINIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_RUN_FSP_GOP is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
#
# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
CONFIG_LINEAR_FRAMEBUFFER=y
# CONFIG_BOOTSPLASH is not set
CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y
# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set
# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set
# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set
CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
# end of Display
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_HAVE_VBT=y
CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_DRAM_SUPPORT_DDR4=y
CONFIG_DRAM_SUPPORT_DDR3=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
CONFIG_MRC_SETTINGS_PROTECT=y
# CONFIG_DRIVERS_OPTION_CFR is not set
# CONFIG_SMMSTORE is not set
CONFIG_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
CONFIG_DRIVERS_UART=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_DESIGNWARE=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
# CONFIG_FSP_USE_REPO is not set
# CONFIG_DISPLAY_HOBS is not set
# CONFIG_DISPLAY_UPD_DATA is not set
CONFIG_PLATFORM_USES_FSP2_0=y
CONFIG_PLATFORM_USES_FSP2_X86_32=y
CONFIG_HAVE_INTEL_FSP_REPO=y
CONFIG_ADD_FSP_BINARIES=y
CONFIG_FSP_S_CBFS="fsps.bin"
CONFIG_FSP_M_CBFS="fspm.bin"
# CONFIG_FSP_FULL_FD is not set
CONFIG_FSP_T_RESERVED_SIZE=0x0
CONFIG_FSP_M_XIP=y
CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
CONFIG_FSP_VGA_MODE12_BPP=0x0
CONFIG_INTEL_GMA_ACPI=y
CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
CONFIG_GFX_GMA=y
CONFIG_GFX_GMA_DYN_CPU=y
CONFIG_GFX_GMA_GENERATION="Skylake"
CONFIG_GFX_GMA_PCH="Sunrise_Point"
CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_USE_PC_CMOS_ALTCENTURY=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_USB_ACPI=y
CONFIG_DRIVERS_WIFI_GENERIC=y
CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
# end of Verified Boot (vboot)
#
# Trusted Platform Module
#
CONFIG_NO_TPM=y
CONFIG_PCR_BOOT_MODE=1
CONFIG_PCR_HWID=1
CONFIG_PCR_SRTM=2
CONFIG_PCR_FW_VER=10
CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
# Memory initialization
#
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
# end of Memory initialization
# CONFIG_STM is not set
# CONFIG_INTEL_CBNT_SUPPORT is not set
# CONFIG_BOOTMEDIA_LOCK_NONE is not set
CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
CONFIG_BOOTMEDIA_LOCK_WHOLE_RO=y
# CONFIG_BOOTMEDIA_LOCK_WHOLE_NO_ACCESS is not set
# CONFIG_BOOTMEDIA_SMM_BWP is not set
# end of Security
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
CONFIG_ACPI_CUSTOM_MADT=y
CONFIG_ACPI_NO_CUSTOM_MADT=y
CONFIG_ACPI_COMMON_MADT_LAPIC=y
CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_ACPI_LPIT=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
#
# Console
#
CONFIG_BOOTBLOCK_CONSOLE=y
CONFIG_POSTCAR_CONSOLE=y
CONFIG_SQUELCH_EARLY_SMP=y
# CONFIG_SPKMODEM is not set
# CONFIG_CONSOLE_NE2K is not set
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
# CONFIG_POST_DEVICE_PCI_PCIE is not set
CONFIG_POST_IO_PORT=0x80
CONFIG_HWBASE_DEBUG_NULL=y
# end of Console
CONFIG_ACPI_S1_NOT_SUPPORTED=y
CONFIG_HAVE_ACPI_RESUME=y
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
CONFIG_HAVE_MONOTONIC_TIMER=y
CONFIG_HAVE_OPTION_TABLE=y
CONFIG_IOAPIC=y
CONFIG_ACPI_NHLT=y
#
# System tables
#
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
#
# Payload
#
CONFIG_PAYLOAD_NONE=y
# end of Payload
#
# Debugging
#
#
# CPU Debug Settings
#
# CONFIG_DISPLAY_MTRRS is not set
#
# Vendorcode Debug Settings
#
#
# BLOB Debug Settings
#
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
# CONFIG_DISPLAY_FSP_HEADER is not set
# CONFIG_VERIFY_HOBS is not set
# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
#
# General Debug Settings
#
# CONFIG_GDB_STUB is not set
CONFIG_HAVE_DEBUG_GPIO=y
# CONFIG_DEBUG_GPIO is not set
# CONFIG_DEBUG_CBFS is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_RAMSTAGE_ADA=y
CONFIG_RAMSTAGE_LIBHWBASE=y
CONFIG_HWBASE_DYNAMIC_MMIO=y
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
CONFIG_HWBASE_DIRECT_PCIDEV=y
CONFIG_DECOMPRESS_OFAST=y
#
# Boot Logo Configuration
#
# CONFIG_BMP_LOGO is not set
# end of Boot Logo Configuration
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -0,0 +1,804 @@
#
# Automatically generated file; DO NOT EDIT.
# coreboot configuration
#
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_LTO is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_OPTION_BACKEND_NONE is not set
CONFIG_USE_OPTION_TABLE=y
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
CONFIG_USE_BLOBS=y
# CONFIG_USE_AMD_BLOBS is not set
# CONFIG_USE_QC_BLOBS is not set
# CONFIG_COVERAGE is not set
# CONFIG_UBSAN is not set
CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
# CONFIG_ASAN is not set
# CONFIG_NO_STAGE_CACHE is not set
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
# Mainboard
#
#
# Important: Run 'make distclean' before switching boards
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ARM is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_ERYING is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HARDKERNEL is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LATTEPANDA is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_MITAC_COMPUTING is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_NOVACUSTOM is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
# CONFIG_VENDOR_PACKARDBELL is not set
# CONFIG_VENDOR_PCENGINES is not set
# CONFIG_VENDOR_PINE64 is not set
# CONFIG_VENDOR_PORTWELL is not set
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TOPTON is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
CONFIG_MAINBOARD_VERSION="1.0"
CONFIG_MAINBOARD_DIR="dell/sklkbl_desktops"
CONFIG_VGA_BIOS_ID="8086,0406"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=512
CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Dell Inc."
CONFIG_CBFS_SIZE=0xEEE000
# CONFIG_CONSOLE_SERIAL is not set
CONFIG_MAX_CPUS=16
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_VARIANT_DIR="optiplex_3050"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
# CONFIG_VGA_BIOS is not set
CONFIG_PCIEXP_ASPM=y
CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
# CONFIG_FATAL_ASSERTS is not set
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
# CONFIG_CONSOLE_POST is not set
CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_USE_PM_ACPI_TIMER=y
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
CONFIG_BOARD_DELL_OPTIPLEX_3050=y
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
# CONFIG_BOARD_DELL_XPS_8300 is not set
CONFIG_BOARD_DELL_SKLKBL_DESKTOPS_COMMON=y
CONFIG_DCACHE_RAM_BASE=0xfef00000
CONFIG_DCACHE_RAM_SIZE=0x40000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin"
CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
CONFIG_USE_LEGACY_8254_TIMER=y
# CONFIG_DEBUG_SMI is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
CONFIG_HAVE_IFD_BIN=y
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
CONFIG_D3COLD_SUPPORT=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
CONFIG_ROM_SIZE=0x01000000
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
# end of Mainboard
#
# Chipset
#
#
# SoC
#
CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x200000
CONFIG_SMM_MODULE_STACK_SIZE=0x800
CONFIG_ACPI_BERT_SIZE=0x0
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
CONFIG_IFD_CHIPSET="sklkbl"
CONFIG_IED_REGION_SIZE=0x400000
CONFIG_MAX_ROOT_PORTS=24
CONFIG_PCR_BASE_ADDRESS=0xfd000000
CONFIG_CPU_BCLK_MHZ=100
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
CONFIG_CPU_XTAL_HZ=24000000
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
CONFIG_SOC_INTEL_I2C_DEV_MAX=6
# CONFIG_ENABLE_SATA_TEST_MODE is not set
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_FSP_PUBLISH_MBP_HOB=y
CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
CONFIG_MAX_HECI_DEVICES=5
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_HAVE_PAM0_REGISTER=y
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
CONFIG_SOC_INTEL_KABYLAKE=y
CONFIG_SKYLAKE_SOC_PCH_H=y
CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FSP_T_LOCATION=0xfffe0000
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
CONFIG_UART_BITBANG_TX_DELAY_MS=5
CONFIG_SOC_INTEL_COMMON=y
#
# Intel SoC Common Code for IP blocks
#
CONFIG_SOC_INTEL_COMMON_BLOCK=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
# CONFIG_USE_COREBOOT_MP_INIT is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
CONFIG_INTEL_CAR_NEM_ENHANCED=y
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
CONFIG_HAVE_HYPERTHREADING=y
# CONFIG_FSP_HYPERTHREADING is not set
# CONFIG_INTEL_KEYLOCKER is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
CONFIG_SOC_INTEL_CSE_RW_FILE=""
CONFIG_SOC_INTEL_CSE_RW_VERSION=""
CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
# CONFIG_SOC_INTEL_DISABLE_IGD is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
CONFIG_SA_ENABLE_DPR=y
CONFIG_HAVE_CAPID_A_REGISTER=y
CONFIG_HAVE_BDSM_BGSM_REGISTER=y
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
#
# Intel SoC Common PCH Code
#
CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
#
# Intel SoC Common coreboot stages and non-IP blocks
#
CONFIG_SOC_INTEL_COMMON_BASECODE=y
CONFIG_SOC_INTEL_COMMON_RESET=y
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
CONFIG_PAVP=y
# CONFIG_MMA is not set
CONFIG_SOC_INTEL_COMMON_NHLT=y
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
#
# CPU
#
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
CONFIG_SET_MSR_AESNI_LOCK_BIT=y
CONFIG_CPU_INTEL_COMMON_SMM=y
CONFIG_PARALLEL_MP=y
CONFIG_PARALLEL_MP_AP_WORK=y
CONFIG_XAPIC_ONLY=y
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
# CONFIG_X2APIC_LATE_WORKAROUND is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
#
# Southbridge
#
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
#
# Super I/O
#
CONFIG_SUPERIO_SMSC_SCH555x=y
#
# Embedded Controllers
#
#
# Intel Firmware
#
CONFIG_HAVE_ME_BIN=y
# CONFIG_STITCH_ME_BIN is not set
# CONFIG_CHECK_ME is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
# CONFIG_USE_ME_CLEANER is not set
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_UDK_BASE=y
CONFIG_UDK_2017_BINDING=y
CONFIG_UDK_2013_VERSION=2013
CONFIG_UDK_2017_VERSION=2017
CONFIG_UDK_202005_VERSION=202005
CONFIG_UDK_202111_VERSION=202111
CONFIG_UDK_202302_VERSION=202302
CONFIG_UDK_202305_VERSION=202305
CONFIG_UDK_VERSION=2017
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
CONFIG_DEFAULT_EBDA_SIZE=0x400
# end of Chipset
#
# Devices
#
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
CONFIG_HAVE_FSP_GOP=y
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
CONFIG_MAINBOARD_USE_LIBGFXINIT=y
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_RUN_FSP_GOP is not set
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
#
CONFIG_VGA_TEXT_FRAMEBUFFER=y
# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
# end of Display
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_HAVE_VBT=y
CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_DRAM_SUPPORT_DDR4=y
CONFIG_DRAM_SUPPORT_DDR3=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
CONFIG_MRC_SETTINGS_PROTECT=y
# CONFIG_DRIVERS_OPTION_CFR is not set
# CONFIG_SMMSTORE is not set
CONFIG_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
CONFIG_DRIVERS_UART=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_DESIGNWARE=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
# CONFIG_FSP_USE_REPO is not set
# CONFIG_DISPLAY_HOBS is not set
# CONFIG_DISPLAY_UPD_DATA is not set
CONFIG_PLATFORM_USES_FSP2_0=y
CONFIG_PLATFORM_USES_FSP2_X86_32=y
CONFIG_HAVE_INTEL_FSP_REPO=y
CONFIG_ADD_FSP_BINARIES=y
CONFIG_FSP_S_CBFS="fsps.bin"
CONFIG_FSP_M_CBFS="fspm.bin"
# CONFIG_FSP_FULL_FD is not set
CONFIG_FSP_T_RESERVED_SIZE=0x0
CONFIG_FSP_M_XIP=y
CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
CONFIG_FSP_VGA_MODE12_BPP=0x0
CONFIG_INTEL_GMA_ACPI=y
CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
CONFIG_GFX_GMA=y
CONFIG_GFX_GMA_DYN_CPU=y
CONFIG_GFX_GMA_GENERATION="Skylake"
CONFIG_GFX_GMA_PCH="Sunrise_Point"
CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_USE_PC_CMOS_ALTCENTURY=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_USB_ACPI=y
CONFIG_DRIVERS_WIFI_GENERIC=y
CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
# end of Verified Boot (vboot)
#
# Trusted Platform Module
#
CONFIG_NO_TPM=y
CONFIG_PCR_BOOT_MODE=1
CONFIG_PCR_HWID=1
CONFIG_PCR_SRTM=2
CONFIG_PCR_FW_VER=10
CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
# Memory initialization
#
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
# end of Memory initialization
# CONFIG_STM is not set
# CONFIG_INTEL_CBNT_SUPPORT is not set
# CONFIG_BOOTMEDIA_LOCK_NONE is not set
CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
CONFIG_BOOTMEDIA_LOCK_WHOLE_RO=y
# CONFIG_BOOTMEDIA_LOCK_WHOLE_NO_ACCESS is not set
# CONFIG_BOOTMEDIA_SMM_BWP is not set
# end of Security
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
CONFIG_ACPI_CUSTOM_MADT=y
CONFIG_ACPI_NO_CUSTOM_MADT=y
CONFIG_ACPI_COMMON_MADT_LAPIC=y
CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_ACPI_LPIT=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
#
# Console
#
CONFIG_BOOTBLOCK_CONSOLE=y
CONFIG_POSTCAR_CONSOLE=y
CONFIG_SQUELCH_EARLY_SMP=y
# CONFIG_SPKMODEM is not set
# CONFIG_CONSOLE_NE2K is not set
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
# CONFIG_POST_DEVICE_PCI_PCIE is not set
CONFIG_POST_IO_PORT=0x80
CONFIG_HWBASE_DEBUG_NULL=y
# end of Console
CONFIG_ACPI_S1_NOT_SUPPORTED=y
CONFIG_HAVE_ACPI_RESUME=y
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
CONFIG_HAVE_MONOTONIC_TIMER=y
CONFIG_HAVE_OPTION_TABLE=y
CONFIG_IOAPIC=y
CONFIG_ACPI_NHLT=y
#
# System tables
#
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
#
# Payload
#
CONFIG_PAYLOAD_NONE=y
# end of Payload
#
# Debugging
#
#
# CPU Debug Settings
#
# CONFIG_DISPLAY_MTRRS is not set
#
# Vendorcode Debug Settings
#
#
# BLOB Debug Settings
#
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
# CONFIG_DISPLAY_FSP_HEADER is not set
# CONFIG_VERIFY_HOBS is not set
# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
#
# General Debug Settings
#
# CONFIG_GDB_STUB is not set
CONFIG_HAVE_DEBUG_GPIO=y
# CONFIG_DEBUG_GPIO is not set
# CONFIG_DEBUG_CBFS is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_RAMSTAGE_ADA=y
CONFIG_RAMSTAGE_LIBHWBASE=y
CONFIG_HWBASE_DYNAMIC_MMIO=y
CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
CONFIG_HWBASE_DIRECT_PCIDEV=y
CONFIG_DECOMPRESS_OFAST=y
#
# Boot Logo Configuration
#
# CONFIG_BMP_LOGO is not set
# end of Boot Logo Configuration
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -0,0 +1,14 @@
# SPDX-License-Identifier: GPL-3.0-or-later
tree="default"
xarch="i386-elf"
payload_seabios="y"
payload_grub="y"
payload_memtest="y"
grub_scan_disk="nvme ahci"
grubtree="xhci_nvme"
vcfg="3050micro"
build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot"
IFD_platform="sklkbl"
payload_uboot="amd64"
payload_grubsea="y"

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -149,19 +150,19 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Precision T1650"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_TPM_PIRQ=0x0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -210,10 +211,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -254,8 +252,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
CONFIG_EHCI_BAR=0xfef00000
@@ -274,9 +273,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -299,7 +300,6 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -384,7 +384,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -396,7 +395,6 @@ CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -436,6 +434,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -454,14 +453,16 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_DRAM_SUPPORT_DDR3=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
@@ -698,6 +699,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci"
grubtree="nvme"
vcfg="t1650"
build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
payload_uboot_amd64="y"
payload_uboot="amd64"

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -149,18 +150,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -207,10 +208,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
CONFIG_EHCI_BAR=0xfef00000
@@ -266,9 +265,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -296,7 +297,6 @@ CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -360,7 +360,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -374,7 +373,6 @@ CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -416,6 +414,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -434,15 +433,17 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
CONFIG_DRAM_SUPPORT_DDR3=y
CONFIG_DRAM_SUPPORT_DDR2=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
CONFIG_MRC_STASH_TO_CBMEM=y
@@ -668,6 +669,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -147,18 +148,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -205,10 +206,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
CONFIG_EHCI_BAR=0xfef00000
@@ -264,9 +263,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -294,7 +295,6 @@ CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -358,7 +358,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -372,7 +371,6 @@ CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -412,6 +410,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -430,15 +429,17 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
CONFIG_DRAM_SUPPORT_DDR3=y
CONFIG_DRAM_SUPPORT_DDR2=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
CONFIG_MRC_STASH_TO_CBMEM=y
@@ -664,6 +665,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -8,4 +8,4 @@ payload_memtest="y"
grub_scan_disk="nvme ahci ata"
grubtree="nvme"
build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
payload_uboot_amd64="y"
payload_uboot="amd64"

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -149,18 +150,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -207,10 +208,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
CONFIG_EHCI_BAR=0xfef00000
@@ -266,9 +265,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -296,7 +297,6 @@ CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -360,7 +360,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -374,7 +373,6 @@ CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -416,6 +414,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -434,15 +433,17 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
CONFIG_DRAM_SUPPORT_DDR3=y
CONFIG_DRAM_SUPPORT_DDR2=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
CONFIG_MRC_STASH_TO_CBMEM=y
@@ -668,6 +669,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -147,18 +148,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -205,10 +206,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
CONFIG_EHCI_BAR=0xfef00000
@@ -264,9 +263,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -294,7 +295,6 @@ CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -358,7 +358,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -372,7 +371,6 @@ CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -412,6 +410,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -430,15 +429,17 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
CONFIG_DRAM_SUPPORT_DDR3=y
CONFIG_DRAM_SUPPORT_DDR2=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
CONFIG_MRC_STASH_TO_CBMEM=y
@@ -664,6 +665,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -8,4 +8,4 @@ payload_memtest="y"
grub_scan_disk="nvme ahci ata"
grubtree="nvme"
build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
payload_uboot_amd64="y"
payload_uboot="amd64"

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -149,18 +150,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -207,10 +208,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
CONFIG_EHCI_BAR=0xfef00000
@@ -266,9 +265,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -296,7 +297,6 @@ CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -360,7 +360,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -374,7 +373,6 @@ CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -416,6 +414,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -434,15 +433,17 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
CONFIG_DRAM_SUPPORT_DDR3=y
CONFIG_DRAM_SUPPORT_DDR2=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
CONFIG_MRC_STASH_TO_CBMEM=y
@@ -668,6 +669,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -147,18 +148,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -205,10 +206,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
CONFIG_EHCI_BAR=0xfef00000
@@ -264,9 +263,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -294,7 +295,6 @@ CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -358,7 +358,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -372,7 +371,6 @@ CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -412,6 +410,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -430,15 +429,17 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
CONFIG_DRAM_SUPPORT_DDR3=y
CONFIG_DRAM_SUPPORT_DDR2=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
CONFIG_MRC_STASH_TO_CBMEM=y
@@ -664,6 +665,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -8,4 +8,4 @@ payload_memtest="y"
grub_scan_disk="nvme ahci ata"
grubtree="nvme"
build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
payload_uboot_amd64="y"
payload_uboot="amd64"

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -149,18 +150,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -207,10 +208,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
CONFIG_EHCI_BAR=0xfef00000
@@ -266,9 +265,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -296,7 +297,6 @@ CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -360,7 +360,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -374,7 +373,6 @@ CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -416,6 +414,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -434,15 +433,17 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
CONFIG_DRAM_SUPPORT_DDR3=y
CONFIG_DRAM_SUPPORT_DDR2=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
CONFIG_MRC_STASH_TO_CBMEM=y
@@ -668,6 +669,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -147,18 +148,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -205,10 +206,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
CONFIG_EHCI_BAR=0xfef00000
@@ -264,9 +263,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -294,7 +295,6 @@ CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -358,7 +358,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -372,7 +371,6 @@ CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -412,6 +410,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -430,15 +429,17 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
CONFIG_DRAM_SUPPORT_DDR3=y
CONFIG_DRAM_SUPPORT_DDR2=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
CONFIG_MRC_STASH_TO_CBMEM=y
@@ -664,6 +665,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -8,4 +8,4 @@ payload_memtest="y"
grub_scan_disk="nvme ahci ata"
grubtree="nvme"
build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
payload_uboot_amd64="y"
payload_uboot="amd64"

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -150,19 +151,19 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_TPM_PIRQ=0x0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -207,10 +208,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -252,6 +250,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
CONFIG_EHCI_BAR=0xe8000000
@@ -272,9 +271,11 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_DISABLE_ME_PCI=y
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -297,7 +298,6 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -369,7 +369,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -380,7 +379,6 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -422,6 +420,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -437,14 +436,16 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_DRAM_SUPPORT_DDR3=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
@@ -684,6 +685,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -148,19 +149,19 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_TPM_PIRQ=0x0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -205,10 +206,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -250,6 +248,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
CONFIG_EHCI_BAR=0xe8000000
@@ -270,9 +269,11 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_DISABLE_ME_PCI=y
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -295,7 +296,6 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -367,7 +367,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -378,7 +377,6 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -418,6 +416,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -433,14 +432,16 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_DRAM_SUPPORT_DDR3=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
@@ -681,6 +682,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -6,7 +6,7 @@ payload_seabios="y"
payload_grub="y"
payload_memtest="y"
grub_scan_disk="nvme ahci"
grubtree="xhci"
grubtree="xhci_nvme"
vcfg="haswell"
build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
payload_uboot_amd64="y"
build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot"
payload_uboot="amd64"

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -150,19 +151,19 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_TPM_PIRQ=0x0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -207,10 +208,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -252,6 +250,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
CONFIG_EHCI_BAR=0xe8000000
@@ -272,9 +271,11 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_DISABLE_ME_PCI=y
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -297,7 +298,6 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -369,7 +369,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -380,7 +379,6 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -422,6 +420,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -437,14 +436,16 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_DRAM_SUPPORT_DDR3=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
@@ -684,6 +685,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -148,19 +149,19 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_TPM_PIRQ=0x0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -205,10 +206,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -250,6 +248,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
CONFIG_EHCI_BAR=0xe8000000
@@ -270,9 +269,11 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_DISABLE_ME_PCI=y
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -295,7 +296,6 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_CPU_PT_ROM_MAP_GB=512
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -367,7 +367,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -378,7 +377,6 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -418,6 +416,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -433,14 +432,16 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_DRAM_SUPPORT_DDR3=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
@@ -681,6 +682,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -6,7 +6,7 @@ payload_seabios="y"
payload_grub="y"
payload_memtest="y"
grub_scan_disk="nvme ahci"
grubtree="xhci"
grubtree="xhci_nvme"
vcfg="haswell"
build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
payload_uboot_amd64="y"
build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot"
payload_uboot="amd64"

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -148,18 +149,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
CONFIG_BOARD_DELL_E4300=y
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -203,10 +204,7 @@ CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_4096=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
CONFIG_EHCI_BAR=0xfef00000
@@ -264,9 +263,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -292,7 +293,6 @@ CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -357,7 +357,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -370,7 +369,6 @@ CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -412,6 +410,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -430,15 +429,17 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
CONFIG_DRAM_SUPPORT_DDR3=y
CONFIG_DRAM_SUPPORT_DDR2=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
# CONFIG_SMMSTORE is not set
CONFIG_SPI_FLASH=y
@@ -645,6 +646,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -146,18 +147,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
CONFIG_BOARD_DELL_E4300=y
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -201,10 +202,7 @@ CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_4096=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -246,6 +244,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
CONFIG_EHCI_BAR=0xfef00000
@@ -262,9 +261,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -290,7 +291,6 @@ CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -355,7 +355,6 @@ CONFIG_HAVE_GBE_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -368,7 +367,6 @@ CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -408,6 +406,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -426,15 +425,17 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
CONFIG_DRAM_SUPPORT_DDR3=y
CONFIG_DRAM_SUPPORT_DDR2=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
# CONFIG_SMMSTORE is not set
CONFIG_SPI_FLASH=y
@@ -641,6 +642,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -6,4 +6,4 @@ payload_seabios="y"
payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
payload_uboot_amd64="y"
payload_uboot="amd64"

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -149,18 +150,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5420"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
CONFIG_BOARD_DELL_LATITUDE_E5420=y
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -204,10 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_6144=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -249,8 +247,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
CONFIG_EHCI_BAR=0xfef00000
@@ -269,9 +268,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -294,7 +295,6 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -378,7 +378,6 @@ CONFIG_HAVE_ME_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -390,7 +389,6 @@ CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -432,6 +430,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -450,14 +449,16 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_DRAM_SUPPORT_DDR3=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
@@ -665,6 +666,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -147,18 +148,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5420"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
CONFIG_BOARD_DELL_LATITUDE_E5420=y
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -202,10 +203,7 @@ CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_6144=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +245,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
CONFIG_EHCI_BAR=0xfef00000
@@ -267,9 +266,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -292,7 +293,6 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -376,7 +376,6 @@ CONFIG_HAVE_ME_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -388,7 +387,6 @@ CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -428,6 +426,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -446,14 +445,16 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_DRAM_SUPPORT_DDR3=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
@@ -662,6 +663,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -7,4 +7,4 @@ payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
vcfg="sandybridge"
payload_uboot_amd64="y"
payload_uboot="amd64"

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -149,18 +150,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5520"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
CONFIG_BOARD_DELL_LATITUDE_E5520=y
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -204,10 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_6144=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -249,8 +247,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
CONFIG_EHCI_BAR=0xfef00000
@@ -269,9 +268,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -294,7 +295,6 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -378,7 +378,6 @@ CONFIG_HAVE_ME_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -390,7 +389,6 @@ CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -432,6 +430,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -450,14 +449,16 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_DRAM_SUPPORT_DDR3=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
@@ -665,6 +666,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
@@ -147,18 +148,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5520"
# CONFIG_CONSOLE_POST is not set
CONFIG_MAX_SOCKET=1
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
CONFIG_BOARD_DELL_LATITUDE_E5520=y
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
@@ -202,10 +203,7 @@ CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_DRIVERS_EFI_FW_INFO is not set
CONFIG_BOARD_ROMSIZE_KB_6144=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +245,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
CONFIG_EHCI_BAR=0xfef00000
@@ -267,9 +266,11 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_CBFS_CACHE_ALIGN=8
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
CONFIG_FIXED_SMBUS_IO_BASE=0x400
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_UART_BITBANG_TX_DELAY_MS=5
#
# CPU
@@ -292,7 +293,6 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_CPU_PT_ROM_MAP_GB=4
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -376,7 +376,6 @@ CONFIG_HAVE_ME_BIN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -388,7 +387,6 @@ CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -428,6 +426,7 @@ CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -446,14 +445,16 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
CONFIG_USE_DDR3=y
CONFIG_DRAM_SUPPORT_DDR3=y
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
# CONFIG_DRIVERS_HWID_DMI is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
# CONFIG_DRIVERS_OPTION_CFR is not set
@@ -662,6 +663,7 @@ CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

View File

@@ -7,4 +7,4 @@ payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
vcfg="sandybridge"
payload_uboot_amd64="y"
payload_uboot="amd64"

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