mirror of
https://codeberg.org/libreboot/lbmk.git
synced 2026-03-25 21:39:03 +02:00
Compare commits
1 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
|
|
647e2f3b40 |
1
.gitignore
vendored
1
.gitignore
vendored
@@ -44,4 +44,3 @@
|
||||
/r
|
||||
/e
|
||||
/xbmkpath/
|
||||
/xbmkwd/
|
||||
|
||||
@@ -0,0 +1,56 @@
|
||||
From f22f408956bf02609a96b7d72fb3321da159bfc6 Mon Sep 17 00:00:00 2001
|
||||
From: Nico Huber <nico.huber@secunet.com>
|
||||
Date: Tue, 22 Jun 2021 13:49:44 +0000
|
||||
Subject: [PATCH 1/1] cbfstool: Make use of spurious null-termination
|
||||
|
||||
The null-termination of `filetypes` was added after the code was
|
||||
written, obviously resulting in NULL dereferences. As some more
|
||||
code has grown around the termination, it's hard to revert the
|
||||
regression, so let's update the code that still used the array
|
||||
length.
|
||||
|
||||
This fixes commit 7f5f9331d1 (util/cbfstool: fix buffer over-read)
|
||||
which actually did fix something, but only one path while it broke
|
||||
two others. We should be careful with fixes, they can always break
|
||||
something else. Especially when a dumb tool triggered the patching
|
||||
it seems likely that fewer people looked into related code.
|
||||
|
||||
Change-Id: If2ece1f5ad62952ed2e57769702e318ba5468f0c
|
||||
Signed-off-by: Nico Huber <nico.huber@secunet.com>
|
||||
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55763
|
||||
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
|
||||
Reviewed-by: Julius Werner <jwerner@chromium.org>
|
||||
---
|
||||
util/cbfstool/common.c | 8 ++++----
|
||||
1 file changed, 4 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
|
||||
index e2ed38ffc4..539d0baccf 100644
|
||||
--- a/util/cbfstool/common.c
|
||||
+++ b/util/cbfstool/common.c
|
||||
@@ -168,10 +168,10 @@ void print_supported_architectures(void)
|
||||
|
||||
void print_supported_filetypes(void)
|
||||
{
|
||||
- int i, number = ARRAY_SIZE(filetypes);
|
||||
+ int i;
|
||||
|
||||
- for (i=0; i<number; i++) {
|
||||
- printf(" %s%c", filetypes[i].name, (i==(number-1))?'\n':',');
|
||||
+ for (i=0; filetypes[i].name; i++) {
|
||||
+ printf(" %s%c", filetypes[i].name, filetypes[i + 1].name ? ',' : '\n');
|
||||
if ((i%8) == 7)
|
||||
printf("\n");
|
||||
}
|
||||
@@ -180,7 +180,7 @@ void print_supported_filetypes(void)
|
||||
uint64_t intfiletype(const char *name)
|
||||
{
|
||||
size_t i;
|
||||
- for (i = 0; i < (sizeof(filetypes) / sizeof(struct typedesc_t)); i++)
|
||||
+ for (i = 0; filetypes[i].name; i++)
|
||||
if (strcmp(filetypes[i].name, name) == 0)
|
||||
return filetypes[i].type;
|
||||
return -1;
|
||||
--
|
||||
2.39.2
|
||||
|
||||
@@ -0,0 +1,33 @@
|
||||
From 06e8d7a9db4efe1dc2b7e5865b801a5518b38fbd Mon Sep 17 00:00:00 2001
|
||||
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
|
||||
Date: Tue, 29 Apr 2025 17:31:13 +0300
|
||||
Subject: [PATCH 1/1] Fix cbfstool build error on GCC 15 host compiler
|
||||
|
||||
GCC 15 now considers the unterminated-string-initialization warning as
|
||||
part of -Werror by default. Coreboot compiles host utilities with the
|
||||
system compiler, which results in getting this error in some files.
|
||||
|
||||
Mark a hexadecimal translation table in cbfstool code as "nonstring" to
|
||||
avoid the warning-turned-error.
|
||||
|
||||
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
|
||||
---
|
||||
util/cbfstool/common.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
|
||||
index 539d0baccf..f6fe647503 100644
|
||||
--- a/util/cbfstool/common.c
|
||||
+++ b/util/cbfstool/common.c
|
||||
@@ -188,7 +188,7 @@ uint64_t intfiletype(const char *name)
|
||||
|
||||
char *bintohex(uint8_t *data, size_t len)
|
||||
{
|
||||
- static const char translate[16] = "0123456789abcdef";
|
||||
+ static const char translate[16] __attribute__((__nonstring__)) = "0123456789abcdef";
|
||||
|
||||
char *result = malloc(len * 2 + 1);
|
||||
if (result == NULL)
|
||||
--
|
||||
2.39.5
|
||||
|
||||
4
config/coreboot/coreboot413/target.cfg
Normal file
4
config/coreboot/coreboot413/target.cfg
Normal file
@@ -0,0 +1,4 @@
|
||||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
|
||||
tree="coreboot413"
|
||||
rev="5c186c6777c9438ff4681929c9c25c98dee28bef"
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -146,9 +145,9 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_DCACHE_RAM_BASE=0xfefc0000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x8000
|
||||
@@ -214,9 +213,6 @@ CONFIG_BOARD_INTEL_D510MO=y
|
||||
# Ptlrvp
|
||||
#
|
||||
# CONFIG_BOARD_INTEL_PTLRVP is not set
|
||||
# CONFIG_BOARD_INTEL_PTLRVP4ES is not set
|
||||
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set
|
||||
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC4ES is not set
|
||||
# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
|
||||
# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
|
||||
# CONFIG_BOARD_INTEL_STRAGO is not set
|
||||
@@ -233,7 +229,10 @@ CONFIG_D3COLD_SUPPORT=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_1024=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -272,7 +271,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x80000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -289,15 +287,12 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
CONFIG_INTEL_HAS_TOP_SWAP=y
|
||||
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
|
||||
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
|
||||
# CONFIG_TOP_SWAP_REDUNDANCY is not set
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -322,6 +317,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -377,6 +373,7 @@ CONFIG_SUPERIO_WINBOND_W83627THG=y
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -389,6 +386,7 @@ CONFIG_AP_IN_SIPI_WAIT=y
|
||||
CONFIG_SIPI_VECTOR_IN_ROM=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -426,7 +424,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -445,17 +442,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_DRAM_SUPPORT_DDR2=y
|
||||
CONFIG_USE_DDR3=y
|
||||
CONFIG_USE_DDR2=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
# CONFIG_SMMSTORE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
@@ -647,7 +642,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -146,9 +145,9 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_DCACHE_RAM_BASE=0xfefc0000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x8000
|
||||
@@ -214,9 +213,6 @@ CONFIG_BOARD_INTEL_D510MO=y
|
||||
# Ptlrvp
|
||||
#
|
||||
# CONFIG_BOARD_INTEL_PTLRVP is not set
|
||||
# CONFIG_BOARD_INTEL_PTLRVP4ES is not set
|
||||
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set
|
||||
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC4ES is not set
|
||||
# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
|
||||
# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
|
||||
# CONFIG_BOARD_INTEL_STRAGO is not set
|
||||
@@ -233,7 +229,10 @@ CONFIG_D3COLD_SUPPORT=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_1024=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -272,7 +271,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x80000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -289,15 +287,12 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
CONFIG_INTEL_HAS_TOP_SWAP=y
|
||||
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
|
||||
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
|
||||
# CONFIG_TOP_SWAP_REDUNDANCY is not set
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -322,6 +317,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -377,6 +373,7 @@ CONFIG_SUPERIO_WINBOND_W83627THG=y
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -389,6 +386,7 @@ CONFIG_AP_IN_SIPI_WAIT=y
|
||||
CONFIG_SIPI_VECTOR_IN_ROM=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -426,7 +424,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -445,17 +442,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_DRAM_SUPPORT_DDR2=y
|
||||
CONFIG_USE_DDR3=y
|
||||
CONFIG_USE_DDR2=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
# CONFIG_SMMSTORE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
@@ -647,7 +642,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -147,9 +146,9 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_DCACHE_RAM_BASE=0xfefc0000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x8000
|
||||
@@ -215,9 +214,6 @@ CONFIG_BOARD_INTEL_D945GCLF=y
|
||||
# Ptlrvp
|
||||
#
|
||||
# CONFIG_BOARD_INTEL_PTLRVP is not set
|
||||
# CONFIG_BOARD_INTEL_PTLRVP4ES is not set
|
||||
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set
|
||||
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC4ES is not set
|
||||
# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
|
||||
# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
|
||||
# CONFIG_BOARD_INTEL_STRAGO is not set
|
||||
@@ -232,7 +228,10 @@ CONFIG_D3COLD_SUPPORT=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_512=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_512=y
|
||||
@@ -271,7 +270,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -288,15 +286,12 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
CONFIG_INTEL_HAS_TOP_SWAP=y
|
||||
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
|
||||
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
|
||||
# CONFIG_TOP_SWAP_REDUNDANCY is not set
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -321,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -376,6 +372,7 @@ CONFIG_SUPERIO_SMSC_LPC47M15X=y
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -388,6 +385,7 @@ CONFIG_AP_IN_SIPI_WAIT=y
|
||||
CONFIG_SIPI_VECTOR_IN_ROM=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -425,7 +423,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -441,16 +438,14 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR2=y
|
||||
CONFIG_USE_DDR2=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
# CONFIG_SMMSTORE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
@@ -646,7 +641,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -147,9 +146,9 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_DCACHE_RAM_BASE=0xfefc0000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x8000
|
||||
@@ -215,9 +214,6 @@ CONFIG_BOARD_INTEL_D945GCLF=y
|
||||
# Ptlrvp
|
||||
#
|
||||
# CONFIG_BOARD_INTEL_PTLRVP is not set
|
||||
# CONFIG_BOARD_INTEL_PTLRVP4ES is not set
|
||||
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set
|
||||
# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC4ES is not set
|
||||
# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
|
||||
# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
|
||||
# CONFIG_BOARD_INTEL_STRAGO is not set
|
||||
@@ -232,7 +228,10 @@ CONFIG_D3COLD_SUPPORT=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_512=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -271,7 +270,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -288,15 +286,12 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
CONFIG_INTEL_HAS_TOP_SWAP=y
|
||||
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
|
||||
CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
|
||||
# CONFIG_TOP_SWAP_REDUNDANCY is not set
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -321,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -376,6 +372,7 @@ CONFIG_SUPERIO_SMSC_LPC47M15X=y
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -388,6 +385,7 @@ CONFIG_AP_IN_SIPI_WAIT=y
|
||||
CONFIG_SIPI_VECTOR_IN_ROM=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -425,7 +423,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -441,16 +438,14 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR2=y
|
||||
CONFIG_USE_DDR2=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
# CONFIG_SMMSTORE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
@@ -646,7 +641,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -1,18 +0,0 @@
|
||||
3rdparty/fsp/EagleStreamFspBinPkg
|
||||
3rdparty/fsp/MeteorLakeFspBinPkg
|
||||
3rdparty/fsp/IceLakeFspBinPkg
|
||||
3rdparty/fsp/AmberLakeFspBinPkg
|
||||
3rdparty/fsp/DenvertonNSFspBinPkg
|
||||
3rdparty/fsp/TigerLakeFspBinPkg
|
||||
3rdparty/fsp/CedarIslandFspBinPkg
|
||||
3rdparty/fsp/ElkhartLakeFspBinPkg
|
||||
3rdparty/fsp/CometLakeFspBinPkg
|
||||
3rdparty/fsp/WhitleyFspBinPkg
|
||||
3rdparty/fsp/ArrowLakeFspBinPkg
|
||||
3rdparty/fsp/IdavilleFspBinPkg
|
||||
3rdparty/fsp/BraswellFspBinPkg
|
||||
3rdparty/fsp/CoffeeLakeFspBinPkg
|
||||
3rdparty/fsp/RaptorLakeFspBinPkg
|
||||
3rdparty/fsp/ApolloLakeFspBinPkg
|
||||
3rdparty/fsp/SkylakeFspBinPkg
|
||||
3rdparty/vboot/tests
|
||||
@@ -1,7 +1,7 @@
|
||||
From 4e350ac1b7d5f27ae0887bb016d748b0987ad14d Mon Sep 17 00:00:00 2001
|
||||
From bd959c38f6ee21db1ff8f4fbb0675e38bfbe1147 Mon Sep 17 00:00:00 2001
|
||||
From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
|
||||
Date: Wed, 27 Oct 2021 13:36:01 +0200
|
||||
Subject: [PATCH 01/41] add c3 and clockgen to apple/macbook21
|
||||
Subject: [PATCH 01/37] add c3 and clockgen to apple/macbook21
|
||||
|
||||
---
|
||||
src/mainboard/apple/macbook21/Kconfig | 1 +
|
||||
@@ -64,5 +64,5 @@ index fd86e939b9..263fbabcd1 100644
|
||||
end
|
||||
end
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 0322228c25be7d95e7dbcc905dec81960905152b Mon Sep 17 00:00:00 2001
|
||||
From e5eab4c8043b89a325b4a28bf7da456d68475144 Mon Sep 17 00:00:00 2001
|
||||
From: persmule <persmule@gmail.com>
|
||||
Date: Sun, 31 Oct 2021 23:33:26 +0000
|
||||
Subject: [PATCH 02/41] lenovo/t400: Enable all SATA ports
|
||||
Subject: [PATCH 02/37] lenovo/t400: Enable all SATA ports
|
||||
|
||||
There are 2 SATA ports on the chassis of t400(s), but at least one dock for
|
||||
t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
|
||||
@@ -15,7 +15,7 @@ This patch unmasked all SATA ports found within t400s with factory firmware.
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb
|
||||
index 9e056772e9..9361f330d2 100644
|
||||
index 259c3e1b21..3d007533a4 100644
|
||||
--- a/src/mainboard/lenovo/t400/devicetree.cb
|
||||
+++ b/src/mainboard/lenovo/t400/devicetree.cb
|
||||
@@ -46,8 +46,8 @@ chip northbridge/intel/gm45
|
||||
@@ -30,5 +30,5 @@ index 9e056772e9..9361f330d2 100644
|
||||
register "sata_traffic_monitor" = "0"
|
||||
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 4714f4388bf90fc7ff3d25dd62feec07de5f4c7e Mon Sep 17 00:00:00 2001
|
||||
From fd398cc10600cccce3dd4931651a5294ffebde9a Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Mon, 3 Jan 2022 19:06:22 +0000
|
||||
Subject: [PATCH 03/41] lenovo/x230: set me_state=Disabled in cmos.default
|
||||
Subject: [PATCH 03/37] lenovo/x230: set me_state=Disabled in cmos.default
|
||||
|
||||
I only recently found out about this. It's possible to use me_cleaner to
|
||||
do the same thing, but some people might just flash coreboot and not do
|
||||
@@ -33,5 +33,5 @@ index 732e214b32..8454f0eac0 100644
|
||||
-me_state=Normal
|
||||
+me_state=Disabled
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 0d8c12b68060ebfe4df4cf0d7cb1abd4c2b2243b Mon Sep 17 00:00:00 2001
|
||||
From 74230d8123cb7c31afd084658720084b1a5ac5d9 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Wed, 2 Mar 2022 21:50:01 +0000
|
||||
Subject: [PATCH 04/41] set me_state=Disabled on all cmos.default files!
|
||||
Subject: [PATCH 04/37] set me_state=Disabled on all cmos.default files!
|
||||
|
||||
yeah. why the hell isn't this the default
|
||||
|
||||
@@ -120,5 +120,5 @@ index d61046df6b..8c793fd1c3 100644
|
||||
-me_state=Enable
|
||||
+me_state=Disabled
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From a3bc9753261ebd534df6c6752169b3edbb588a97 Mon Sep 17 00:00:00 2001
|
||||
From f592ac32892d7f99fa2e68504bb147e5d06184ca Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Sun, 19 Feb 2023 18:21:43 +0000
|
||||
Subject: [PATCH 05/41] util/ifdtool: add --nuke flag (all 0xFF on region)
|
||||
Subject: [PATCH 05/37] util/ifdtool: add --nuke flag (all 0xFF on region)
|
||||
|
||||
When this option is used, the region's contents are overwritten
|
||||
with all ones (0xFF).
|
||||
@@ -16,22 +16,22 @@ Rebased since the last revision update in lbmk.
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
util/ifdtool/ifdtool.c | 116 +++++++++++++++++++++++++++++------------
|
||||
1 file changed, 84 insertions(+), 32 deletions(-)
|
||||
util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
|
||||
1 file changed, 83 insertions(+), 31 deletions(-)
|
||||
|
||||
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
|
||||
index 75238c73b2..ea8dfc788d 100644
|
||||
index b21a89c0e1..fc91d4c239 100644
|
||||
--- a/util/ifdtool/ifdtool.c
|
||||
+++ b/util/ifdtool/ifdtool.c
|
||||
@@ -2240,6 +2240,7 @@ static void print_usage(const char *name)
|
||||
@@ -2230,6 +2230,7 @@ static void print_usage(const char *name)
|
||||
" tgl - Tiger Lake\n"
|
||||
" wbg - Wellsburg\n"
|
||||
" -S | --setpchstrap Write a PCH strap\n"
|
||||
+ " -N | --nuke <region> Overwrite the specified region with 0xFF (all ones)\n"
|
||||
" -V | --newvalue The new value to write into PCH strap specified by -S\n"
|
||||
" -T | --topswapsize Set the Top Swap Block Size PCH strap value\n"
|
||||
" Possible values: 0x10000, 0x20000, 0x40000, 0x80000,\n"
|
||||
@@ -2251,6 +2252,60 @@ static void print_usage(const char *name)
|
||||
" -v | --version: print the version\n"
|
||||
" -h | --help: print this help\n\n"
|
||||
@@ -2238,6 +2239,60 @@ static void print_usage(const char *name)
|
||||
"\n");
|
||||
}
|
||||
|
||||
@@ -92,23 +92,23 @@ index 75238c73b2..ea8dfc788d 100644
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
int opt, option_index = 0;
|
||||
@@ -2258,6 +2313,7 @@ int main(int argc, char *argv[])
|
||||
@@ -2245,6 +2300,7 @@ int main(int argc, char *argv[])
|
||||
int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
|
||||
int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
|
||||
int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
|
||||
+ int mode_nuke = 0;
|
||||
int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
|
||||
int mode_settopswapsize = 0;
|
||||
char *region_type_string = NULL, *region_fname = NULL, *layout_fname = NULL;
|
||||
@@ -2294,6 +2350,7 @@ int main(int argc, char *argv[])
|
||||
char *new_filename = NULL;
|
||||
@@ -2279,6 +2335,7 @@ int main(int argc, char *argv[])
|
||||
{"validate", 0, NULL, 't'},
|
||||
{"setpchstrap", 1, NULL, 'S'},
|
||||
{"newvalue", 1, NULL, 'V'},
|
||||
{"topswapsize", 1, NULL, 'T'},
|
||||
+ {"nuke", 1, NULL, 'N'},
|
||||
{0, 0, 0, 0}
|
||||
};
|
||||
|
||||
@@ -2343,35 +2400,8 @@ int main(int argc, char *argv[])
|
||||
@@ -2328,35 +2385,8 @@ int main(int argc, char *argv[])
|
||||
region_fname++;
|
||||
// Descriptor, BIOS, ME, GbE, Platform
|
||||
// valid type?
|
||||
@@ -146,11 +146,10 @@ index 75238c73b2..ea8dfc788d 100644
|
||||
fprintf(stderr, "No such region type: '%s'\n\n",
|
||||
region_type_string);
|
||||
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
|
||||
@@ -2552,7 +2582,23 @@ int main(int argc, char *argv[])
|
||||
mode_settopswapsize = 1;
|
||||
top_swap_size_arg = optarg;
|
||||
@@ -2533,6 +2563,22 @@ int main(int argc, char *argv[])
|
||||
case 't':
|
||||
mode_validate = 1;
|
||||
break;
|
||||
- case 'v':
|
||||
+ case 'N':
|
||||
+ region_type_string = strdup(optarg);
|
||||
+ if (!region_type_string) {
|
||||
@@ -167,13 +166,12 @@ index 75238c73b2..ea8dfc788d 100644
|
||||
+ }
|
||||
+ mode_nuke = 1;
|
||||
+ break;
|
||||
+ Case 'v':
|
||||
case 'v':
|
||||
print_version();
|
||||
exit(EXIT_SUCCESS);
|
||||
break;
|
||||
@@ -2571,7 +2617,8 @@ int main(int argc, char *argv[])
|
||||
@@ -2552,7 +2598,8 @@ int main(int argc, char *argv[])
|
||||
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
|
||||
mode_setstrap + mode_settopswapsize + mode_newlayout + (mode_spifreq | mode_em100 |
|
||||
mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
|
||||
mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
|
||||
- (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) {
|
||||
+ (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
|
||||
@@ -181,9 +179,9 @@ index 75238c73b2..ea8dfc788d 100644
|
||||
fprintf(stderr, "You may not specify more than one mode.\n\n");
|
||||
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
|
||||
exit(EXIT_FAILURE);
|
||||
@@ -2580,7 +2627,8 @@ int main(int argc, char *argv[])
|
||||
@@ -2561,7 +2608,8 @@ int main(int argc, char *argv[])
|
||||
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
|
||||
mode_setstrap + mode_settopswapsize + mode_newlayout + mode_spifreq + mode_em100 +
|
||||
mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
|
||||
mode_locked + mode_unlocked + mode_density + mode_altmedisable +
|
||||
- mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) {
|
||||
+ mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
|
||||
@@ -191,7 +189,7 @@ index 75238c73b2..ea8dfc788d 100644
|
||||
fprintf(stderr, "You need to specify a mode.\n\n");
|
||||
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
|
||||
exit(EXIT_FAILURE);
|
||||
@@ -2746,6 +2794,10 @@ int main(int argc, char *argv[])
|
||||
@@ -2674,6 +2722,10 @@ int main(int argc, char *argv[])
|
||||
write_image(new_filename, image, size);
|
||||
}
|
||||
|
||||
@@ -203,5 +201,5 @@ index 75238c73b2..ea8dfc788d 100644
|
||||
struct fpsba *fpsba = find_fpsba(image, size);
|
||||
struct fmsba *fmsba = find_fmsba(image, size);
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,20 +1,20 @@
|
||||
From c3f93c58ddeb1e44daf76db9d67e33bcd2c54a62 Mon Sep 17 00:00:00 2001
|
||||
From 18069af7c0c6beedfadb615cca9127e82a0d8007 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Sat, 6 May 2023 15:53:41 -0600
|
||||
Subject: [PATCH 06/41] mb/dell/e6400: Enable 01.0 device in devicetree for
|
||||
Subject: [PATCH 06/37] mb/dell/e6400: Enable 01.0 device in devicetree for
|
||||
dGPU models
|
||||
|
||||
Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
|
||||
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
---
|
||||
src/mainboard/dell/gm45_latitude/devicetree.cb | 2 +-
|
||||
src/mainboard/dell/e6400/devicetree.cb | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/mainboard/dell/gm45_latitude/devicetree.cb b/src/mainboard/dell/gm45_latitude/devicetree.cb
|
||||
index 5919803be2..76dae87153 100644
|
||||
--- a/src/mainboard/dell/gm45_latitude/devicetree.cb
|
||||
+++ b/src/mainboard/dell/gm45_latitude/devicetree.cb
|
||||
@@ -18,7 +18,7 @@ chip northbridge/intel/gm45
|
||||
diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/e6400/devicetree.cb
|
||||
index bb954cbd7b..e9f3915d17 100644
|
||||
--- a/src/mainboard/dell/e6400/devicetree.cb
|
||||
+++ b/src/mainboard/dell/e6400/devicetree.cb
|
||||
@@ -19,7 +19,7 @@ chip northbridge/intel/gm45
|
||||
ops gm45_pci_domain_ops
|
||||
|
||||
device pci 00.0 on end # host bridge
|
||||
@@ -24,5 +24,5 @@ index 5919803be2..76dae87153 100644
|
||||
device pci 02.1 on end # Display
|
||||
device pci 03.0 on end # ME
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 9c0234bac4d37670da6831e3ff9545a0c6119237 Mon Sep 17 00:00:00 2001
|
||||
From 9563c107a4b40e66b610d7205a21590c7c181c78 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Fri, 12 May 2023 19:55:15 -0600
|
||||
Subject: [PATCH 07/41] Remove warning for coreboot images built without a
|
||||
Subject: [PATCH 07/37] Remove warning for coreboot images built without a
|
||||
payload
|
||||
|
||||
I added this in upstream to prevent people from accidentally flashing
|
||||
@@ -35,5 +35,5 @@ index 5f988dac1b..516133880f 100644
|
||||
-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
|
||||
+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 495eab54f7c2224a0ad3da3dc79905182eca6eee Mon Sep 17 00:00:00 2001
|
||||
From 7f650a19d30fe6157b150c5248d6086007323d72 Mon Sep 17 00:00:00 2001
|
||||
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
|
||||
Date: Thu, 22 Jun 2023 16:44:27 +0300
|
||||
Subject: [PATCH 08/41] HACK: Disable coreboot related BL31 features
|
||||
Subject: [PATCH 08/37] HACK: Disable coreboot related BL31 features
|
||||
|
||||
I don't know why, but removing this BL31 make argument lets gru-kevin
|
||||
power off properly when shut down from Linux. Needs investigation.
|
||||
@@ -10,7 +10,7 @@ power off properly when shut down from Linux. Needs investigation.
|
||||
1 file changed, 3 deletions(-)
|
||||
|
||||
diff --git a/src/arch/arm64/Makefile.mk b/src/arch/arm64/Makefile.mk
|
||||
index 279d31fb47..3d436179fe 100644
|
||||
index f54c6d22fc..b075abfd42 100644
|
||||
--- a/src/arch/arm64/Makefile.mk
|
||||
+++ b/src/arch/arm64/Makefile.mk
|
||||
@@ -162,9 +162,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
|
||||
@@ -24,5 +24,5 @@ index 279d31fb47..3d436179fe 100644
|
||||
BL31_MAKEARGS += BUILD_PLAT="$(BL31_BUILD)"
|
||||
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From bf464f17367c0dfa7f2c667d699800f3c6e60040 Mon Sep 17 00:00:00 2001
|
||||
From 3f6f65ed6a435fe49534c8a0b5cb98c3eac71150 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Sun, 5 Nov 2023 11:41:41 +0000
|
||||
Subject: [PATCH 09/41] dell/e6430: use ME Soft Temporary Disable
|
||||
Subject: [PATCH 09/37] dell/e6430: use ME Soft Temporary Disable
|
||||
|
||||
i overlooked this. it's set on other boards.
|
||||
|
||||
@@ -26,5 +26,5 @@ index 2a5b30f2b7..279415dfd1 100644
|
||||
-me_state=Normal
|
||||
+me_state=Disabled
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 5c27543224963e7fa17ad18dea27d186685e9f13 Mon Sep 17 00:00:00 2001
|
||||
From b4d48233a8d829d7285501f662d999aad898be21 Mon Sep 17 00:00:00 2001
|
||||
From: Riku Viitanen <riku.viitanen@protonmail.com>
|
||||
Date: Sat, 23 Dec 2023 19:02:10 +0200
|
||||
Subject: [PATCH 10/41] mb/hp: Add Compaq Elite 8300 CMT port
|
||||
Subject: [PATCH 10/37] mb/hp: Add Compaq Elite 8300 CMT port
|
||||
|
||||
Based on autoport and Z220 SuperIO code.
|
||||
|
||||
@@ -868,5 +868,5 @@ index 0000000000..8dbd95ef96
|
||||
+ .enable_dev = mainboard_enable,
|
||||
+};
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 062b28da685d1c9f7cbe8333e98257a83ce4ca82 Mon Sep 17 00:00:00 2001
|
||||
From a16ff494adb1f706d402a2e167d0d53c775d0897 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Sat, 2 Mar 2024 22:51:09 +0000
|
||||
Subject: [PATCH 11/41] nb/intel/haswell: make IOMMU a runtime option
|
||||
Subject: [PATCH 11/37] nb/intel/haswell: make IOMMU a runtime option
|
||||
|
||||
When I tested graphics cards on a coreboot port for Dell
|
||||
OptiPlex 9020 SFF, I could not use a graphics card unless
|
||||
@@ -288,5 +288,5 @@ index e47deb5da6..1a7e0b1076 100644
|
||||
if (capid0_a & VTD_DISABLE)
|
||||
return;
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 5bd5bc755af744b51e0577970dc6f5214bd0cfee Mon Sep 17 00:00:00 2001
|
||||
From 4b0536ce7cd55eedc52d13497bea59d91e8924d8 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Sat, 2 Mar 2024 23:00:09 +0000
|
||||
Subject: [PATCH 12/41] dell/optiplex_9020: Disable IOMMU by default
|
||||
Subject: [PATCH 12/37] dell/optiplex_9020: Disable IOMMU by default
|
||||
|
||||
Needed to make graphics cards work. Turning it on is
|
||||
recommended if only using iGPU, otherwise leave it off
|
||||
@@ -25,5 +25,5 @@ index 8000eea8c0..0700f971ee 100644
|
||||
-iommu=Enable
|
||||
+iommu=Disable
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 78da1e003a69a4cc6bd5e71e4bc43a4844d05f16 Mon Sep 17 00:00:00 2001
|
||||
From c8329f84b2d06581dcbeecedc38b7c4715a9cba7 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Sat, 6 Apr 2024 01:22:47 +0100
|
||||
Subject: [PATCH 13/41] nb/haswell: Fully disable iGPU when dGPU is used
|
||||
Subject: [PATCH 13/37] nb/haswell: Fully disable iGPU when dGPU is used
|
||||
|
||||
My earlier patch disabled decode *and* disabled the iGPU itself, but
|
||||
a subsequent revision disabled only VGA decode. Upon revisiting, I
|
||||
@@ -47,5 +47,5 @@ index f7fad3183d..1b188e92e1 100644
|
||||
|
||||
static struct device_operations gma_func0_ops = {
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 0a982ec4b606b6c236f71478350b69f532f30719 Mon Sep 17 00:00:00 2001
|
||||
From 73dbf291631fdbae2d8e8a761c147523c8d9e65c Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Fri, 3 May 2024 11:03:32 -0600
|
||||
Subject: [PATCH 14/41] ec/dell/mec5035: Add S3 suspend SMI handler
|
||||
Subject: [PATCH 14/37] ec/dell/mec5035: Add S3 suspend SMI handler
|
||||
|
||||
This is necessary for S3 resume to work on SNB and newer Dell Latitude
|
||||
laptops. If a command isn't sent, the EC cuts power to the DIMMs,
|
||||
@@ -28,10 +28,10 @@ Change-Id: I655868aba46911d128f6c24f410dc6fdf83f3070
|
||||
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
---
|
||||
src/ec/dell/mec5035/Makefile.mk | 1 +
|
||||
src/ec/dell/mec5035/mec5035.c | 13 +++++++++++++
|
||||
src/ec/dell/mec5035/mec5035.c | 14 ++++++++++++++
|
||||
src/ec/dell/mec5035/mec5035.h | 22 ++++++++++++++++++++++
|
||||
src/ec/dell/mec5035/smihandler.c | 17 +++++++++++++++++
|
||||
4 files changed, 53 insertions(+)
|
||||
4 files changed, 54 insertions(+)
|
||||
create mode 100644 src/ec/dell/mec5035/smihandler.c
|
||||
|
||||
diff --git a/src/ec/dell/mec5035/Makefile.mk b/src/ec/dell/mec5035/Makefile.mk
|
||||
@@ -46,13 +46,13 @@ index 4ebdd811f9..be557e4599 100644
|
||||
|
||||
endif
|
||||
diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
|
||||
index 17ac2c1dab..c5067c16f6 100644
|
||||
index dffbb7960c..85c2ab0140 100644
|
||||
--- a/src/ec/dell/mec5035/mec5035.c
|
||||
+++ b/src/ec/dell/mec5035/mec5035.c
|
||||
@@ -100,6 +100,19 @@ static void mec5035_power_button_route(enum ec_power_button_route target)
|
||||
write_mailbox_regs(&buf, 2, 1);
|
||||
ec_command(CMD_POWER_BUTTON_TO_HOST);
|
||||
@@ -94,6 +94,20 @@ void mec5035_control_radio(enum ec_radio_dev dev, enum ec_radio_state state)
|
||||
ec_command(CMD_RADIO_CTRL);
|
||||
}
|
||||
|
||||
+void mec5035_change_wake(u8 source, enum ec_wake_change change)
|
||||
+{
|
||||
+ u8 buf[ACPI_WAKEUP_NUM_ARGS] = {change, source, 0, 0x40};
|
||||
@@ -66,14 +66,15 @@ index 17ac2c1dab..c5067c16f6 100644
|
||||
+ write_mailbox_regs(buf, 2, SLEEP_EN_NUM_ARGS);
|
||||
+ ec_command(CMD_SLEEP_ENABLE);
|
||||
+}
|
||||
|
||||
+
|
||||
void mec5035_early_init(void)
|
||||
{
|
||||
/* If this isn't sent the EC shuts down the system after about 15
|
||||
diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
|
||||
index 5fdf56631b..5cd907bf71 100644
|
||||
index 32f791cb01..8d4fded28b 100644
|
||||
--- a/src/ec/dell/mec5035/mec5035.h
|
||||
+++ b/src/ec/dell/mec5035/mec5035.h
|
||||
@@ -4,6 +4,7 @@
|
||||
@@ -4,12 +4,15 @@
|
||||
#define _EC_DELL_MEC5035_H_
|
||||
|
||||
#include <stdint.h>
|
||||
@@ -81,17 +82,16 @@ index 5fdf56631b..5cd907bf71 100644
|
||||
|
||||
#define NUM_REGISTERS 32
|
||||
|
||||
@@ -11,6 +12,8 @@ enum mec5035_cmd {
|
||||
enum mec5035_cmd {
|
||||
CMD_MOUSE_TP = 0x1a,
|
||||
CMD_RADIO_CTRL = 0x2b,
|
||||
CMD_POWER_BUTTON_TO_HOST = 0x3e,
|
||||
+ CMD_ACPI_WAKEUP_CHANGE = 0x4a,
|
||||
+ CMD_SLEEP_ENABLE = 0x64,
|
||||
CMD_CPU_OK = 0xc2,
|
||||
};
|
||||
|
||||
@@ -39,9 +42,28 @@ enum ec_power_button_route {
|
||||
HOST
|
||||
@@ -33,9 +36,28 @@ enum ec_radio_state {
|
||||
RADIO_ON
|
||||
};
|
||||
|
||||
+#define ACPI_WAKEUP_NUM_ARGS 4
|
||||
@@ -143,5 +143,5 @@ index 0000000000..958733bf97
|
||||
+ }
|
||||
+}
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 9ca5c919339049518e842980041f528d48d79124 Mon Sep 17 00:00:00 2001
|
||||
From a507fe609a2e99c95218ec430916eaf4c3cb61d9 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Sat, 4 May 2024 02:00:53 +0100
|
||||
Subject: [PATCH 15/41] nb/haswell: lock policy regs when disabling IOMMU
|
||||
Subject: [PATCH 15/37] nb/haswell: lock policy regs when disabling IOMMU
|
||||
|
||||
Angel Pons told me I should do it. See comments here:
|
||||
https://review.coreboot.org/c/coreboot/+/81016
|
||||
@@ -51,5 +51,5 @@ index 1a7e0b1076..e9506ee830 100644
|
||||
/* Set L3HIT2PEND_DIS, lock GFXVTBAR policy config registers */
|
||||
u32 reg32;
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From e74c4ee6a62ef9f91a8efb257658f627498b91fa Mon Sep 17 00:00:00 2001
|
||||
From 9e0a6aa376db81f9409eda92b6783a8262c1fedb Mon Sep 17 00:00:00 2001
|
||||
From: Angel Pons <th3fanbus@gmail.com>
|
||||
Date: Mon, 10 May 2021 22:40:59 +0200
|
||||
Subject: [PATCH 16/41] nb/intel/gm45: Make DDR2 raminit work
|
||||
Subject: [PATCH 16/37] nb/intel/gm45: Make DDR2 raminit work
|
||||
|
||||
List of changes:
|
||||
- Update some timing and ODT values
|
||||
@@ -20,7 +20,7 @@ Signed-off-by: Angel Pons <th3fanbus@gmail.com>
|
||||
3 files changed, 106 insertions(+), 13 deletions(-)
|
||||
|
||||
diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
|
||||
index f68bfdee7a..b76117bc3a 100644
|
||||
index 5d9ac56606..338260ea7a 100644
|
||||
--- a/src/northbridge/intel/gm45/gm45.h
|
||||
+++ b/src/northbridge/intel/gm45/gm45.h
|
||||
@@ -420,7 +420,7 @@ void igd_compute_ggc(sysinfo_t *const sysinfo);
|
||||
@@ -31,9 +31,9 @@ index f68bfdee7a..b76117bc3a 100644
|
||||
+void raminit_rcomp_calibration(int ddr_type, stepping_t stepping);
|
||||
void raminit_reset_readwrite_pointers(void);
|
||||
void raminit_receive_enable_calibration(int ddr_type, const timings_t *, const dimminfo_t *);
|
||||
void raminit_write_training(const mem_clock_t, const dimminfo_t *, bool s3resume);
|
||||
void raminit_write_training(const mem_clock_t, const dimminfo_t *, int s3resume);
|
||||
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
|
||||
index def9e1e331..7b091cc567 100644
|
||||
index b7e013959a..df8f46fbbc 100644
|
||||
--- a/src/northbridge/intel/gm45/raminit.c
|
||||
+++ b/src/northbridge/intel/gm45/raminit.c
|
||||
@@ -1047,7 +1047,7 @@ static void rcomp_initialization(const int spd_type, const stepping_t stepping,
|
||||
@@ -70,7 +70,7 @@ index def9e1e331..7b091cc567 100644
|
||||
}
|
||||
mchbar_write32(CxODT_HIGH(ch), reg);
|
||||
|
||||
@@ -2209,6 +2209,84 @@ void raminit(sysinfo_t *const sysinfo, const bool s3resume)
|
||||
@@ -2209,6 +2209,84 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
|
||||
raminit_write_training(timings->mem_clock, dimms, s3resume);
|
||||
}
|
||||
|
||||
@@ -219,5 +219,5 @@ index aef863f05a..b74765fd9c 100644
|
||||
+ mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20);
|
||||
}
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From da433a5d9a7d1d7856b55761b8392864343de5a8 Mon Sep 17 00:00:00 2001
|
||||
From 6acc310c1d695d47c148296da9da189de21d58be Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Tue, 6 Aug 2024 00:50:24 +0100
|
||||
Subject: [PATCH 17/41] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
|
||||
Subject: [PATCH 17/37] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
|
||||
|
||||
We add this patch:
|
||||
|
||||
@@ -32,7 +32,7 @@ Signed-off-by: Leah Rowe <info@minifree.org>
|
||||
2 files changed, 88 insertions(+), 82 deletions(-)
|
||||
|
||||
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
|
||||
index 7b091cc567..478898564a 100644
|
||||
index df8f46fbbc..433db3a68c 100644
|
||||
--- a/src/northbridge/intel/gm45/raminit.c
|
||||
+++ b/src/northbridge/intel/gm45/raminit.c
|
||||
@@ -1117,7 +1117,10 @@ static void dram_program_timings(const int spd_type, const timings_t *const timi
|
||||
@@ -47,7 +47,7 @@ index 7b091cc567..478898564a 100644
|
||||
} else if (timings->mem_clock != MEM_CLOCK_1067MT) {
|
||||
reg = (reg & ~(0x7 << 15)) | ((9 - timings->CAS) << 15);
|
||||
reg = (reg & ~(0xf << 10)) | ((timings->CAS - 3) << 10);
|
||||
@@ -2209,83 +2212,85 @@ void raminit(sysinfo_t *const sysinfo, const bool s3resume)
|
||||
@@ -2209,83 +2212,85 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
|
||||
raminit_write_training(timings->mem_clock, dimms, s3resume);
|
||||
}
|
||||
|
||||
@@ -236,5 +236,5 @@ index b74765fd9c..5d4505e063 100644
|
||||
+ }
|
||||
}
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From b4443cfe4b63a49b8170bdfb6dacbc8d52110eff Mon Sep 17 00:00:00 2001
|
||||
From 7461210ecc7c8e41f3f941bd5ce7943e5f66c711 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Mon, 20 May 2024 10:24:16 -0600
|
||||
Subject: [PATCH 18/41] mb/dell/e6400: Use 100 MHz reference clock for display
|
||||
Subject: [PATCH 18/37] mb/dell/e6400: Use 100 MHz reference clock for display
|
||||
|
||||
The E6400 uses a 100 MHz reference clock for spread spectrum support on
|
||||
LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For
|
||||
@@ -14,25 +14,26 @@ display in the pre-OS graphics environment provided by libgfxinit.
|
||||
|
||||
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
---
|
||||
src/mainboard/dell/gm45_latitude/Kconfig | 2 ++
|
||||
src/northbridge/intel/gm45/Kconfig | 4 ++++
|
||||
2 files changed, 6 insertions(+)
|
||||
src/mainboard/dell/e6400/Kconfig | 3 +++
|
||||
src/northbridge/intel/gm45/Kconfig | 4 ++++
|
||||
2 files changed, 7 insertions(+)
|
||||
|
||||
diff --git a/src/mainboard/dell/gm45_latitude/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
|
||||
index edc79b0d43..5020744990 100644
|
||||
--- a/src/mainboard/dell/gm45_latitude/Kconfig
|
||||
+++ b/src/mainboard/dell/gm45_latitude/Kconfig
|
||||
@@ -22,6 +22,8 @@ config BOARD_DELL_E6400
|
||||
select BOARD_DELL_GM45_LATITUDE_COMMON
|
||||
diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/e6400/Kconfig
|
||||
index 417d95fd5d..6fe1b1c456 100644
|
||||
--- a/src/mainboard/dell/e6400/Kconfig
|
||||
+++ b/src/mainboard/dell/e6400/Kconfig
|
||||
@@ -19,6 +19,9 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select EC_DELL_MEC5035
|
||||
|
||||
if BOARD_DELL_GM45_LATITUDE_COMMON
|
||||
+config INTEL_GMA_DPLL_REF_FREQ
|
||||
+ default 100000000
|
||||
|
||||
+
|
||||
config MAINBOARD_DIR
|
||||
default "dell/gm45_latitude"
|
||||
default "dell/e6400"
|
||||
|
||||
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
|
||||
index a776217475..35e89b0c88 100644
|
||||
index fef0d735b3..fc5df8b11a 100644
|
||||
--- a/src/northbridge/intel/gm45/Kconfig
|
||||
+++ b/src/northbridge/intel/gm45/Kconfig
|
||||
@@ -14,6 +14,10 @@ config NORTHBRIDGE_INTEL_GM45
|
||||
@@ -47,5 +48,5 @@ index a776217475..35e89b0c88 100644
|
||||
select VBOOT_STARTS_IN_BOOTBLOCK
|
||||
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From d3d97fccab40cfe50eac92796bb7f16bd245b189 Mon Sep 17 00:00:00 2001
|
||||
From a683dffd774dbbe25cc77c0f7d3853232c17c2bf Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Mon, 12 Aug 2024 02:15:24 +0100
|
||||
Subject: [PATCH 19/41] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
|
||||
Subject: [PATCH 19/37] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
|
||||
|
||||
set it to 96MHz. fixes the following build error when
|
||||
building for x4x boards e.g. gigabyte ga-g41m-es2l:
|
||||
@@ -33,7 +33,7 @@ Signed-off-by: Leah Rowe <info@minifree.org>
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
|
||||
index 6fa4551957..646af3510b 100644
|
||||
index 097e11126c..6430319f6a 100644
|
||||
--- a/src/northbridge/intel/x4x/Kconfig
|
||||
+++ b/src/northbridge/intel/x4x/Kconfig
|
||||
@@ -14,6 +14,10 @@ config NORTHBRIDGE_INTEL_X4X
|
||||
@@ -48,5 +48,5 @@ index 6fa4551957..646af3510b 100644
|
||||
default 0x100000 if !SOUTHBRIDGE_INTEL_I82801GX
|
||||
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
|
||||
@@ -0,0 +1,243 @@
|
||||
From a48ba23bb4a24730fa49b5a10b56c9de873dea8a Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Thu, 26 Sep 2024 19:48:26 -0600
|
||||
Subject: [PATCH 20/37] mb/dell: Convert E6400 into a variant
|
||||
|
||||
All the GM45 Dell Latitudes should be nearly identical, so convert the
|
||||
E6400 port into a variant so that future ports for the other systems can
|
||||
share code with each other.
|
||||
|
||||
Change-Id: I8094fce56eaaadb20aef173644cd3b2c0b008e95
|
||||
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
---
|
||||
src/mainboard/dell/e6400/Makefile.mk | 10 --------
|
||||
.../dell/{e6400 => gm45_latitude}/Kconfig | 22 +++++++++++++-----
|
||||
.../{e6400 => gm45_latitude}/Kconfig.name | 0
|
||||
src/mainboard/dell/gm45_latitude/Makefile.mk | 11 +++++++++
|
||||
.../dell/{e6400 => gm45_latitude}/acpi/ec.asl | 0
|
||||
.../acpi/ich9_pci_irqs.asl | 0
|
||||
.../{e6400 => gm45_latitude}/acpi/superio.asl | 0
|
||||
.../dell/{e6400 => gm45_latitude}/blc.c | 0
|
||||
.../{e6400 => gm45_latitude}/board_info.txt | 0
|
||||
.../dell/{e6400 => gm45_latitude}/bootblock.c | 0
|
||||
.../{e6400 => gm45_latitude}/cmos.default | 0
|
||||
.../dell/{e6400 => gm45_latitude}/cmos.layout | 0
|
||||
.../dell/{e6400 => gm45_latitude}/cstates.c | 0
|
||||
.../{e6400 => gm45_latitude}/devicetree.cb | 1 -
|
||||
.../dell/{e6400 => gm45_latitude}/dsdt.asl | 0
|
||||
.../dell/{e6400 => gm45_latitude}/mainboard.c | 0
|
||||
.../dell/{e6400 => gm45_latitude}/romstage.c | 0
|
||||
.../variants}/e6400/data.vbt | Bin
|
||||
.../variants}/e6400/gma-mainboard.ads | 0
|
||||
.../{ => gm45_latitude/variants}/e6400/gpio.c | 0
|
||||
.../variants}/e6400/hda_verb.c | 0
|
||||
.../variants/e6400/overridetree.cb | 7 ++++++
|
||||
22 files changed, 34 insertions(+), 17 deletions(-)
|
||||
delete mode 100644 src/mainboard/dell/e6400/Makefile.mk
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/Kconfig (64%)
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/Kconfig.name (100%)
|
||||
create mode 100644 src/mainboard/dell/gm45_latitude/Makefile.mk
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/ec.asl (100%)
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/ich9_pci_irqs.asl (100%)
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/superio.asl (100%)
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/blc.c (100%)
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/board_info.txt (100%)
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/bootblock.c (100%)
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/cmos.default (100%)
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/cmos.layout (100%)
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/cstates.c (100%)
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/devicetree.cb (98%)
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/dsdt.asl (100%)
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/mainboard.c (100%)
|
||||
rename src/mainboard/dell/{e6400 => gm45_latitude}/romstage.c (100%)
|
||||
rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/data.vbt (100%)
|
||||
rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/gma-mainboard.ads (100%)
|
||||
rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/gpio.c (100%)
|
||||
rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/hda_verb.c (100%)
|
||||
create mode 100644 src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
|
||||
|
||||
diff --git a/src/mainboard/dell/e6400/Makefile.mk b/src/mainboard/dell/e6400/Makefile.mk
|
||||
deleted file mode 100644
|
||||
index ca3a82db48..0000000000
|
||||
--- a/src/mainboard/dell/e6400/Makefile.mk
|
||||
+++ /dev/null
|
||||
@@ -1,10 +0,0 @@
|
||||
-## SPDX-License-Identifier: GPL-2.0-only
|
||||
-
|
||||
-bootblock-y += bootblock.c
|
||||
-
|
||||
-romstage-y += gpio.c
|
||||
-
|
||||
-ramstage-y += cstates.c
|
||||
-ramstage-y += blc.c
|
||||
-
|
||||
-ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
|
||||
diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
|
||||
similarity index 64%
|
||||
rename from src/mainboard/dell/e6400/Kconfig
|
||||
rename to src/mainboard/dell/gm45_latitude/Kconfig
|
||||
index 6fe1b1c456..ba76fb6e8c 100644
|
||||
--- a/src/mainboard/dell/e6400/Kconfig
|
||||
+++ b/src/mainboard/dell/gm45_latitude/Kconfig
|
||||
@@ -1,9 +1,7 @@
|
||||
## SPDX-License-Identifier: GPL-2.0-only
|
||||
|
||||
-if BOARD_DELL_E6400
|
||||
-
|
||||
-config BOARD_SPECIFIC_OPTIONS
|
||||
- def_bool y
|
||||
+config BOARD_DELL_GM45_LATITUDE_COMMON
|
||||
+ def_bool n
|
||||
select SYSTEM_TYPE_LAPTOP
|
||||
select CPU_INTEL_SOCKET_P
|
||||
select NORTHBRIDGE_INTEL_GM45
|
||||
@@ -19,19 +17,31 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select EC_DELL_MEC5035
|
||||
|
||||
+
|
||||
+config BOARD_DELL_E6400
|
||||
+ select BOARD_DELL_GM45_LATITUDE_COMMON
|
||||
+
|
||||
+if BOARD_DELL_GM45_LATITUDE_COMMON
|
||||
+
|
||||
config INTEL_GMA_DPLL_REF_FREQ
|
||||
default 100000000
|
||||
|
||||
config MAINBOARD_DIR
|
||||
- default "dell/e6400"
|
||||
+ default "dell/gm45_latitude"
|
||||
|
||||
config MAINBOARD_PART_NUMBER
|
||||
default "Latitude E6400" if BOARD_DELL_E6400
|
||||
|
||||
+config OVERRIDE_DEVICETREE
|
||||
+ default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
|
||||
+
|
||||
+config VARIANT_DIR
|
||||
+ default "e6400" if BOARD_DELL_E6400
|
||||
+
|
||||
config USBDEBUG_HCD_INDEX
|
||||
default 1
|
||||
|
||||
config CBFS_SIZE
|
||||
default 0x1A0000
|
||||
|
||||
-endif # BOARD_DELL_E6400
|
||||
+endif # BOARD_DELL_GM45_LATITUDE_COMMON
|
||||
diff --git a/src/mainboard/dell/e6400/Kconfig.name b/src/mainboard/dell/gm45_latitude/Kconfig.name
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/Kconfig.name
|
||||
rename to src/mainboard/dell/gm45_latitude/Kconfig.name
|
||||
diff --git a/src/mainboard/dell/gm45_latitude/Makefile.mk b/src/mainboard/dell/gm45_latitude/Makefile.mk
|
||||
new file mode 100644
|
||||
index 0000000000..5295d5be22
|
||||
--- /dev/null
|
||||
+++ b/src/mainboard/dell/gm45_latitude/Makefile.mk
|
||||
@@ -0,0 +1,11 @@
|
||||
+## SPDX-License-Identifier: GPL-2.0-only
|
||||
+
|
||||
+bootblock-y += bootblock.c
|
||||
+
|
||||
+romstage-y += variants/$(VARIANT_DIR)/gpio.c
|
||||
+
|
||||
+ramstage-y += cstates.c
|
||||
+ramstage-y += blc.c
|
||||
+ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
|
||||
+
|
||||
+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
|
||||
diff --git a/src/mainboard/dell/e6400/acpi/ec.asl b/src/mainboard/dell/gm45_latitude/acpi/ec.asl
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/acpi/ec.asl
|
||||
rename to src/mainboard/dell/gm45_latitude/acpi/ec.asl
|
||||
diff --git a/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl b/src/mainboard/dell/gm45_latitude/acpi/ich9_pci_irqs.asl
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl
|
||||
rename to src/mainboard/dell/gm45_latitude/acpi/ich9_pci_irqs.asl
|
||||
diff --git a/src/mainboard/dell/e6400/acpi/superio.asl b/src/mainboard/dell/gm45_latitude/acpi/superio.asl
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/acpi/superio.asl
|
||||
rename to src/mainboard/dell/gm45_latitude/acpi/superio.asl
|
||||
diff --git a/src/mainboard/dell/e6400/blc.c b/src/mainboard/dell/gm45_latitude/blc.c
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/blc.c
|
||||
rename to src/mainboard/dell/gm45_latitude/blc.c
|
||||
diff --git a/src/mainboard/dell/e6400/board_info.txt b/src/mainboard/dell/gm45_latitude/board_info.txt
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/board_info.txt
|
||||
rename to src/mainboard/dell/gm45_latitude/board_info.txt
|
||||
diff --git a/src/mainboard/dell/e6400/bootblock.c b/src/mainboard/dell/gm45_latitude/bootblock.c
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/bootblock.c
|
||||
rename to src/mainboard/dell/gm45_latitude/bootblock.c
|
||||
diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/gm45_latitude/cmos.default
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/cmos.default
|
||||
rename to src/mainboard/dell/gm45_latitude/cmos.default
|
||||
diff --git a/src/mainboard/dell/e6400/cmos.layout b/src/mainboard/dell/gm45_latitude/cmos.layout
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/cmos.layout
|
||||
rename to src/mainboard/dell/gm45_latitude/cmos.layout
|
||||
diff --git a/src/mainboard/dell/e6400/cstates.c b/src/mainboard/dell/gm45_latitude/cstates.c
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/cstates.c
|
||||
rename to src/mainboard/dell/gm45_latitude/cstates.c
|
||||
diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/gm45_latitude/devicetree.cb
|
||||
similarity index 98%
|
||||
rename from src/mainboard/dell/e6400/devicetree.cb
|
||||
rename to src/mainboard/dell/gm45_latitude/devicetree.cb
|
||||
index e9f3915d17..76dae87153 100644
|
||||
--- a/src/mainboard/dell/e6400/devicetree.cb
|
||||
+++ b/src/mainboard/dell/gm45_latitude/devicetree.cb
|
||||
@@ -15,7 +15,6 @@ chip northbridge/intel/gm45
|
||||
register "pci_mmio_size" = "2048"
|
||||
|
||||
device domain 0 on
|
||||
- subsystemid 0x1028 0x0233 inherit
|
||||
ops gm45_pci_domain_ops
|
||||
|
||||
device pci 00.0 on end # host bridge
|
||||
diff --git a/src/mainboard/dell/e6400/dsdt.asl b/src/mainboard/dell/gm45_latitude/dsdt.asl
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/dsdt.asl
|
||||
rename to src/mainboard/dell/gm45_latitude/dsdt.asl
|
||||
diff --git a/src/mainboard/dell/e6400/mainboard.c b/src/mainboard/dell/gm45_latitude/mainboard.c
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/mainboard.c
|
||||
rename to src/mainboard/dell/gm45_latitude/mainboard.c
|
||||
diff --git a/src/mainboard/dell/e6400/romstage.c b/src/mainboard/dell/gm45_latitude/romstage.c
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/romstage.c
|
||||
rename to src/mainboard/dell/gm45_latitude/romstage.c
|
||||
diff --git a/src/mainboard/dell/e6400/data.vbt b/src/mainboard/dell/gm45_latitude/variants/e6400/data.vbt
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/data.vbt
|
||||
rename to src/mainboard/dell/gm45_latitude/variants/e6400/data.vbt
|
||||
diff --git a/src/mainboard/dell/e6400/gma-mainboard.ads b/src/mainboard/dell/gm45_latitude/variants/e6400/gma-mainboard.ads
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/gma-mainboard.ads
|
||||
rename to src/mainboard/dell/gm45_latitude/variants/e6400/gma-mainboard.ads
|
||||
diff --git a/src/mainboard/dell/e6400/gpio.c b/src/mainboard/dell/gm45_latitude/variants/e6400/gpio.c
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/gpio.c
|
||||
rename to src/mainboard/dell/gm45_latitude/variants/e6400/gpio.c
|
||||
diff --git a/src/mainboard/dell/e6400/hda_verb.c b/src/mainboard/dell/gm45_latitude/variants/e6400/hda_verb.c
|
||||
similarity index 100%
|
||||
rename from src/mainboard/dell/e6400/hda_verb.c
|
||||
rename to src/mainboard/dell/gm45_latitude/variants/e6400/hda_verb.c
|
||||
diff --git a/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb b/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
|
||||
new file mode 100644
|
||||
index 0000000000..acc34a2252
|
||||
--- /dev/null
|
||||
+++ b/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
|
||||
@@ -0,0 +1,7 @@
|
||||
+## SPDX-License-Identifier: GPL-2.0-or-later
|
||||
+
|
||||
+chip northbridge/intel/gm45
|
||||
+ device domain 0 on
|
||||
+ subsystemid 0x1028 0x0233 inherit
|
||||
+ end
|
||||
+end
|
||||
--
|
||||
2.39.5
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From c2a05f102ca378d8e23f0485d680845584efa290 Mon Sep 17 00:00:00 2001
|
||||
From b87e6774f0407ea48610c83ea54ab6a4b4a78a24 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Thu, 26 Sep 2024 19:51:25 -0600
|
||||
Subject: [PATCH 20/41] mb/dell/gm45_latitudes: Add E4300 variant
|
||||
Subject: [PATCH 21/37] mb/dell/gm45_latitudes: Add E4300 variant
|
||||
|
||||
Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2
|
||||
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
@@ -21,7 +21,7 @@ Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb
|
||||
|
||||
diff --git a/src/mainboard/dell/gm45_latitude/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
|
||||
index 5020744990..d27d5728a8 100644
|
||||
index ba76fb6e8c..144f9bcdf0 100644
|
||||
--- a/src/mainboard/dell/gm45_latitude/Kconfig
|
||||
+++ b/src/mainboard/dell/gm45_latitude/Kconfig
|
||||
@@ -21,6 +21,9 @@ config BOARD_DELL_GM45_LATITUDE_COMMON
|
||||
@@ -32,9 +32,9 @@ index 5020744990..d27d5728a8 100644
|
||||
+ select BOARD_DELL_GM45_LATITUDE_COMMON
|
||||
+
|
||||
if BOARD_DELL_GM45_LATITUDE_COMMON
|
||||
|
||||
config INTEL_GMA_DPLL_REF_FREQ
|
||||
default 100000000
|
||||
@@ -30,12 +33,14 @@ config MAINBOARD_DIR
|
||||
@@ -31,12 +34,14 @@ config MAINBOARD_DIR
|
||||
|
||||
config MAINBOARD_PART_NUMBER
|
||||
default "Latitude E6400" if BOARD_DELL_E6400
|
||||
@@ -328,5 +328,5 @@ index 0000000000..20dfa245fb
|
||||
+ end
|
||||
+end
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 2305cfb93110003613caa1dec8c5f574b5e400bd Mon Sep 17 00:00:00 2001
|
||||
From 0bc9ca409793836dcdb386db97b7a9464d92a973 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Fri, 3 May 2024 16:31:12 -0600
|
||||
Subject: [PATCH 21/41] mb/dell: Add S3 SMI handler for Dell Latitudes
|
||||
Subject: [PATCH 22/37] mb/dell: Add S3 SMI handler for Dell Latitudes
|
||||
|
||||
Integrate the previously added mec5035_smi_sleep() function into
|
||||
mainboard code to fix S3 suspend on the SNB/IVB Latitudes and the E7240.
|
||||
@@ -12,19 +12,19 @@ the power LED while in S3. Without it, all LEDs turn off during S3.
|
||||
Change-Id: Ic0d887f75be13c3fb9f6df62153ac458895e0283
|
||||
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
---
|
||||
src/mainboard/dell/e7240/smihandler.c | 9 +++++++++
|
||||
src/mainboard/dell/gm45_latitude/smihandler.c | 9 +++++++++
|
||||
src/mainboard/dell/haswell_latitude/smihandler.c | 9 +++++++++
|
||||
src/mainboard/dell/snb_ivb_latitude/smihandler.c | 9 +++++++++
|
||||
3 files changed, 27 insertions(+)
|
||||
create mode 100644 src/mainboard/dell/e7240/smihandler.c
|
||||
create mode 100644 src/mainboard/dell/gm45_latitude/smihandler.c
|
||||
create mode 100644 src/mainboard/dell/haswell_latitude/smihandler.c
|
||||
create mode 100644 src/mainboard/dell/snb_ivb_latitude/smihandler.c
|
||||
|
||||
diff --git a/src/mainboard/dell/gm45_latitude/smihandler.c b/src/mainboard/dell/gm45_latitude/smihandler.c
|
||||
diff --git a/src/mainboard/dell/e7240/smihandler.c b/src/mainboard/dell/e7240/smihandler.c
|
||||
new file mode 100644
|
||||
index 0000000000..00e55b51db
|
||||
--- /dev/null
|
||||
+++ b/src/mainboard/dell/gm45_latitude/smihandler.c
|
||||
+++ b/src/mainboard/dell/e7240/smihandler.c
|
||||
@@ -0,0 +1,9 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
+
|
||||
@@ -35,11 +35,11 @@ index 0000000000..00e55b51db
|
||||
+{
|
||||
+ mec5035_smi_sleep(slp_typ);
|
||||
+}
|
||||
diff --git a/src/mainboard/dell/haswell_latitude/smihandler.c b/src/mainboard/dell/haswell_latitude/smihandler.c
|
||||
diff --git a/src/mainboard/dell/gm45_latitude/smihandler.c b/src/mainboard/dell/gm45_latitude/smihandler.c
|
||||
new file mode 100644
|
||||
index 0000000000..00e55b51db
|
||||
--- /dev/null
|
||||
+++ b/src/mainboard/dell/haswell_latitude/smihandler.c
|
||||
+++ b/src/mainboard/dell/gm45_latitude/smihandler.c
|
||||
@@ -0,0 +1,9 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
+
|
||||
@@ -66,5 +66,5 @@ index 0000000000..00e55b51db
|
||||
+ mec5035_smi_sleep(slp_typ);
|
||||
+}
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
@@ -0,0 +1,92 @@
|
||||
From d91dc168d6b8eca5e78aef9e48571d6edb156d45 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Tue, 18 Jun 2024 21:31:08 -0600
|
||||
Subject: [PATCH 23/37] ec/dell/mec5035: Route power button event to host
|
||||
|
||||
If command 0x3e with an argument of 1 isn't sent to the EC, pressing the
|
||||
power button results in the EC powering off the system without letting
|
||||
the OS cleanly shutting itself down. This command and argument tells the
|
||||
EC to route power button events to the host so that it can determine
|
||||
what to do.
|
||||
|
||||
The EC command was identified from the ec/google/wilco code, which is
|
||||
used for Dell's Latitude Chromebooks. According to the EC_GOOGLE_WILCO
|
||||
Kconfig help text, those ECs run a modified version of Dell's typical
|
||||
Latitude EC firmware, so it is likely that the two firmware
|
||||
implementations use similar commands. Examining LPC traffic between the
|
||||
host and the EC on the Latitude E6400 did reveal that the same command
|
||||
was being sent by the vendor firmware to the EC, but this does not
|
||||
confirm that it has the same meaning as the command from the Wilco code.
|
||||
Sending the command using inb/outb calls in a userspace C program while
|
||||
running coreboot without this patch did allow subsequent power button
|
||||
events to be handled by the host, confirming that the command was indeed
|
||||
the same.
|
||||
|
||||
Change-Id: I5ded315270c0e1efbbc90cfa9d9d894b872e99a2
|
||||
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
---
|
||||
src/ec/dell/mec5035/mec5035.c | 8 ++++++++
|
||||
src/ec/dell/mec5035/mec5035.h | 7 +++++++
|
||||
2 files changed, 15 insertions(+)
|
||||
|
||||
diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
|
||||
index 85c2ab0140..bdae929a27 100644
|
||||
--- a/src/ec/dell/mec5035/mec5035.c
|
||||
+++ b/src/ec/dell/mec5035/mec5035.c
|
||||
@@ -94,6 +94,13 @@ void mec5035_control_radio(enum ec_radio_dev dev, enum ec_radio_state state)
|
||||
ec_command(CMD_RADIO_CTRL);
|
||||
}
|
||||
|
||||
+void mec5035_power_button_route(enum ec_power_button_route target)
|
||||
+{
|
||||
+ u8 buf = (u8)target;
|
||||
+ write_mailbox_regs(&buf, 2, 1);
|
||||
+ ec_command(CMD_POWER_BUTTON_TO_HOST);
|
||||
+}
|
||||
+
|
||||
void mec5035_change_wake(u8 source, enum ec_wake_change change)
|
||||
{
|
||||
u8 buf[ACPI_WAKEUP_NUM_ARGS] = {change, source, 0, 0x40};
|
||||
@@ -121,6 +128,7 @@ static void mec5035_init(struct device *dev)
|
||||
/* Unconditionally use this argument for now as this setting
|
||||
is probably the most sensible default out of the 3 choices. */
|
||||
mec5035_mouse_touchpad(TP_PS2_MOUSE);
|
||||
+ mec5035_power_button_route(HOST);
|
||||
|
||||
pc_keyboard_init(NO_AUX_DEVICE);
|
||||
|
||||
diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
|
||||
index 8d4fded28b..51422598c4 100644
|
||||
--- a/src/ec/dell/mec5035/mec5035.h
|
||||
+++ b/src/ec/dell/mec5035/mec5035.h
|
||||
@@ -11,6 +11,7 @@
|
||||
enum mec5035_cmd {
|
||||
CMD_MOUSE_TP = 0x1a,
|
||||
CMD_RADIO_CTRL = 0x2b,
|
||||
+ CMD_POWER_BUTTON_TO_HOST = 0x3e,
|
||||
CMD_ACPI_WAKEUP_CHANGE = 0x4a,
|
||||
CMD_SLEEP_ENABLE = 0x64,
|
||||
CMD_CPU_OK = 0xc2,
|
||||
@@ -36,6 +37,11 @@ enum ec_radio_state {
|
||||
RADIO_ON
|
||||
};
|
||||
|
||||
+enum ec_power_button_route {
|
||||
+ EC = 0,
|
||||
+ HOST
|
||||
+};
|
||||
+
|
||||
#define ACPI_WAKEUP_NUM_ARGS 4
|
||||
enum ec_wake_change {
|
||||
WAKE_OFF = 0,
|
||||
@@ -55,6 +61,7 @@ u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting);
|
||||
void mec5035_cpu_ok(void);
|
||||
void mec5035_early_init(void);
|
||||
void mec5035_control_radio(enum ec_radio_dev device, enum ec_radio_state state);
|
||||
+void mec5035_power_button_route(enum ec_power_button_route target);
|
||||
void mec5035_change_wake(u8 source, enum ec_wake_change change);
|
||||
void mec5035_sleep_enable(void);
|
||||
|
||||
--
|
||||
2.39.5
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From aafddebf91f185d9c72fa1492af9128ee4803239 Mon Sep 17 00:00:00 2001
|
||||
From b6bd33b0430f72c2fce16a3b1e41927ef540923b Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Tue, 31 Dec 2024 14:42:24 +0000
|
||||
Subject: [PATCH 22/41] Disable compression on refcode insertion
|
||||
Subject: [PATCH 24/37] Disable compression on refcode insertion
|
||||
|
||||
Compression is not reliably reproducible. In an lbmk release
|
||||
context, this means we cannot rely on vendorfile insertion.
|
||||
@@ -14,10 +14,10 @@ Signed-off-by: Leah Rowe <info@minifree.org>
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/Makefile.mk b/Makefile.mk
|
||||
index 75787b32d4..3616f4fe68 100644
|
||||
index 3969bfbd05..15346569f8 100644
|
||||
--- a/Makefile.mk
|
||||
+++ b/Makefile.mk
|
||||
@@ -1422,7 +1422,7 @@ endif
|
||||
@@ -1392,7 +1392,7 @@ endif
|
||||
cbfs-files-$(CONFIG_HAVE_REFCODE_BLOB) += $(CONFIG_CBFS_PREFIX)/refcode
|
||||
$(CONFIG_CBFS_PREFIX)/refcode-file := $(REFCODE_BLOB)
|
||||
$(CONFIG_CBFS_PREFIX)/refcode-type := stage
|
||||
@@ -27,5 +27,5 @@ index 75787b32d4..3616f4fe68 100644
|
||||
cbfs-files-$(CONFIG_SEABIOS_VGA_COREBOOT) += vgaroms/seavgabios.bin
|
||||
vgaroms/seavgabios.bin-file := $(CONFIG_PAYLOAD_VGABIOS_FILE)
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 09febfb85eb176c8bf0e416412ed0b971dc2cefc Mon Sep 17 00:00:00 2001
|
||||
From fc4c65f3bb807b9fc766745a70f92729b0b8d99e Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Mon, 21 Apr 2025 02:58:47 +0100
|
||||
Subject: [PATCH 23/41] nb/intel/*: Disable stack overflow debug options
|
||||
Subject: [PATCH 25/37] nb/intel/*: Disable stack overflow debug options
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
@@ -34,7 +34,7 @@ index 039a7396f8..ddcb986f10 100644
|
||||
+ bool
|
||||
+ default n
|
||||
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
|
||||
index 35e89b0c88..c5456d0ddf 100644
|
||||
index fc5df8b11a..95e3644b73 100644
|
||||
--- a/src/northbridge/intel/gm45/Kconfig
|
||||
+++ b/src/northbridge/intel/gm45/Kconfig
|
||||
@@ -58,4 +58,13 @@ config FIXED_DMIBAR_MMIO_BASE
|
||||
@@ -52,7 +52,7 @@ index 35e89b0c88..c5456d0ddf 100644
|
||||
+
|
||||
endif
|
||||
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
|
||||
index c57f1ec380..0a5181b183 100644
|
||||
index 6191cb6ccf..0f5b5c7241 100644
|
||||
--- a/src/northbridge/intel/haswell/Kconfig
|
||||
+++ b/src/northbridge/intel/haswell/Kconfig
|
||||
@@ -10,6 +10,15 @@ config NORTHBRIDGE_INTEL_HASWELL
|
||||
@@ -93,7 +93,7 @@ index dbb2d7436b..5e9418b6a9 100644
|
||||
+
|
||||
+endif
|
||||
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
|
||||
index c4e17f90bf..b12f5be091 100644
|
||||
index 32eff1a611..9479d75c07 100644
|
||||
--- a/src/northbridge/intel/i945/Kconfig
|
||||
+++ b/src/northbridge/intel/i945/Kconfig
|
||||
@@ -89,4 +89,13 @@ config FIXED_DMIBAR_MMIO_BASE
|
||||
@@ -111,7 +111,7 @@ index c4e17f90bf..b12f5be091 100644
|
||||
+
|
||||
endif
|
||||
diff --git a/src/northbridge/intel/ironlake/Kconfig b/src/northbridge/intel/ironlake/Kconfig
|
||||
index 39566a6e5f..f46acf6937 100644
|
||||
index 2bafebf92e..16b81705bb 100644
|
||||
--- a/src/northbridge/intel/ironlake/Kconfig
|
||||
+++ b/src/northbridge/intel/ironlake/Kconfig
|
||||
@@ -63,4 +63,13 @@ config FIXED_DMIBAR_MMIO_BASE
|
||||
@@ -129,7 +129,7 @@ index 39566a6e5f..f46acf6937 100644
|
||||
+
|
||||
endif
|
||||
diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig
|
||||
index a05b866dad..50e3a7cdb9 100644
|
||||
index 59cfcd5e0a..a3ad8d3425 100644
|
||||
--- a/src/northbridge/intel/pineview/Kconfig
|
||||
+++ b/src/northbridge/intel/pineview/Kconfig
|
||||
@@ -42,4 +42,13 @@ config FIXED_EPBAR_MMIO_BASE
|
||||
@@ -147,7 +147,7 @@ index a05b866dad..50e3a7cdb9 100644
|
||||
+
|
||||
endif
|
||||
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
|
||||
index 9972a43da0..fe4ac5106c 100644
|
||||
index 973eed8bbd..6387cf926d 100644
|
||||
--- a/src/northbridge/intel/sandybridge/Kconfig
|
||||
+++ b/src/northbridge/intel/sandybridge/Kconfig
|
||||
@@ -208,4 +208,13 @@ config IGD_DEFAULT_UMA_INDEX
|
||||
@@ -165,7 +165,7 @@ index 9972a43da0..fe4ac5106c 100644
|
||||
+
|
||||
endif
|
||||
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
|
||||
index 646af3510b..069fa0244d 100644
|
||||
index 6430319f6a..1803ef5733 100644
|
||||
--- a/src/northbridge/intel/x4x/Kconfig
|
||||
+++ b/src/northbridge/intel/x4x/Kconfig
|
||||
@@ -53,4 +53,13 @@ config FIXED_DMIBAR_MMIO_BASE
|
||||
@@ -183,5 +183,5 @@ index 646af3510b..069fa0244d 100644
|
||||
+
|
||||
endif
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
@@ -0,0 +1,94 @@
|
||||
From 14002b2575d73d3edbc72584502a463e6802cba6 Mon Sep 17 00:00:00 2001
|
||||
From: Felix Singer <felixsinger@posteo.net>
|
||||
Date: Wed, 26 Jun 2024 04:24:31 +0200
|
||||
Subject: [PATCH 26/37] soc/intel/skylake: configure usb acpi
|
||||
|
||||
Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d
|
||||
Signed-off-by: Felix Singer <felixsinger@posteo.net>
|
||||
---
|
||||
src/soc/intel/skylake/Kconfig | 1 +
|
||||
src/soc/intel/skylake/chipset.cb | 56 +++++++++++++++++++++++++++++++-
|
||||
2 files changed, 56 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
|
||||
index 4ad33496b2..9191ed0ff8 100644
|
||||
--- a/src/soc/intel/skylake/Kconfig
|
||||
+++ b/src/soc/intel/skylake/Kconfig
|
||||
@@ -10,6 +10,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
|
||||
select CPU_INTEL_COMMON
|
||||
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
|
||||
select CPU_SUPPORTS_PM_TIMER_EMULATION
|
||||
+ select DRIVERS_USB_ACPI
|
||||
select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
|
||||
select FSP_COMPRESS_FSP_S_LZ4
|
||||
select FSP_M_XIP
|
||||
diff --git a/src/soc/intel/skylake/chipset.cb b/src/soc/intel/skylake/chipset.cb
|
||||
index 6538a1475b..dfb81d496e 100644
|
||||
--- a/src/soc/intel/skylake/chipset.cb
|
||||
+++ b/src/soc/intel/skylake/chipset.cb
|
||||
@@ -13,7 +13,61 @@ chip soc/intel/skylake
|
||||
device pci 07.0 alias chap off end
|
||||
device pci 08.0 alias gmm off end # Gaussian Mixture Model
|
||||
device pci 13.0 alias ish off end # SensorHub
|
||||
- device pci 14.0 alias south_xhci off ops usb_xhci_ops end
|
||||
+ device pci 14.0 alias south_xhci off ops usb_xhci_ops
|
||||
+ chip drivers/usb/acpi
|
||||
+ register "type" = "UPC_TYPE_HUB"
|
||||
+ device usb 0.0 alias xhci_root_hub off
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 2.0 alias usb2_port1 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 2.1 alias usb2_port2 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 2.2 alias usb2_port3 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 2.3 alias usb2_port4 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 2.4 alias usb2_port5 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 2.5 alias usb2_port6 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 2.6 alias usb2_port7 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 2.7 alias usb2_port8 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 2.8 alias usb2_port9 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 2.9 alias usb2_port10 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 3.0 alias usb3_port1 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 3.1 alias usb3_port2 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 3.2 alias usb3_port3 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 3.3 alias usb3_port4 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 3.4 alias usb3_port5 off end
|
||||
+ end
|
||||
+ chip drivers/usb/acpi
|
||||
+ device usb 3.5 alias usb3_port6 off end
|
||||
+ end
|
||||
+ end
|
||||
+ end
|
||||
+ end
|
||||
device pci 14.1 alias south_xdci off ops usb_xdci_ops end
|
||||
device pci 14.2 alias thermal off end
|
||||
device pci 14.3 alias cio off end
|
||||
--
|
||||
2.39.5
|
||||
|
||||
@@ -0,0 +1,30 @@
|
||||
From 3bb65b7f2a02ecb93e15ae037da38ad8f812747b Mon Sep 17 00:00:00 2001
|
||||
From: Mate Kukri <km@mkukri.xyz>
|
||||
Date: Fri, 22 Nov 2024 21:26:48 +0000
|
||||
Subject: [PATCH 27/37] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
|
||||
bootblock
|
||||
|
||||
Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173
|
||||
Signed-off-by: Mate Kukri <km@mkukri.xyz>
|
||||
---
|
||||
src/soc/intel/skylake/bootblock/pch.c | 4 ++--
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c
|
||||
index df00bb85a9..beaece960b 100644
|
||||
--- a/src/soc/intel/skylake/bootblock/pch.c
|
||||
+++ b/src/soc/intel/skylake/bootblock/pch.c
|
||||
@@ -100,8 +100,8 @@ static void soc_config_pwrmbase(void)
|
||||
|
||||
void pch_early_iorange_init(void)
|
||||
{
|
||||
- uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 |
|
||||
- LPC_IOE_EC_62_66;
|
||||
+ uint16_t io_enables = LPC_IOE_EC_4E_4F | LPC_IOE_SUPERIO_2E_2F |
|
||||
+ LPC_IOE_KBC_60_64 | LPC_IOE_EC_62_66;
|
||||
|
||||
const config_t *config = config_of_soc();
|
||||
|
||||
--
|
||||
2.39.5
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,7 +1,7 @@
|
||||
From 70f588b7cc66af2e427d9045d36ac2f5f4835dae Mon Sep 17 00:00:00 2001
|
||||
From 75cc0ea09234064318046624845b0afc5afb0ce5 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Mon, 30 Sep 2024 20:44:38 -0400
|
||||
Subject: [PATCH 24/41] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
|
||||
Subject: [PATCH 29/37] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
|
||||
|
||||
Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
|
||||
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
@@ -704,5 +704,5 @@ index 0000000000..555b1c1f5c
|
||||
+ end
|
||||
+end
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 463148c9773f3dd44f60c2cf2ac17900c3e68619 Mon Sep 17 00:00:00 2001
|
||||
From 6725ec0bb976c61cbe87e61bf0e8b02e38d14de9 Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Wed, 30 Oct 2024 20:55:25 -0600
|
||||
Subject: [PATCH 25/41] mb/dell/optiplex_780: Add USFF variant
|
||||
Subject: [PATCH 30/37] mb/dell/optiplex_780: Add USFF variant
|
||||
|
||||
Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
|
||||
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
@@ -322,5 +322,5 @@ index 0000000000..555b1c1f5c
|
||||
+ end
|
||||
+end
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 4739f197ee3d4c95809ba48671bc5c409766b9c7 Mon Sep 17 00:00:00 2001
|
||||
From 4ffaddc37d30d39f25faeaef73046a6e2ce525e8 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Wed, 11 Dec 2024 01:06:01 +0000
|
||||
Subject: [PATCH 28/41] dell/3050micro: disable nvme hotplug
|
||||
Subject: [PATCH 31/37] dell/3050micro: disable nvme hotplug
|
||||
|
||||
in my testing, when running my 3050micro for a few days,
|
||||
the nvme would sometimes randomly rename.
|
||||
@@ -26,22 +26,24 @@ for the nvme, so apply the same fix here for 3050 micro
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
.../dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
src/mainboard/dell/optiplex_3050/devicetree.cb | 4 +++-
|
||||
1 file changed, 3 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/mainboard/dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb b/src/mainboard/dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb
|
||||
index c5f1749b2c..ff48a8121a 100644
|
||||
--- a/src/mainboard/dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb
|
||||
+++ b/src/mainboard/dell/sklkbl_desktops/variants/optiplex_3050/overridetree.cb
|
||||
@@ -46,7 +46,7 @@ chip soc/intel/skylake
|
||||
diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
|
||||
index da11085ab6..2a97306c5d 100644
|
||||
--- a/src/mainboard/dell/optiplex_3050/devicetree.cb
|
||||
+++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
|
||||
@@ -45,7 +45,9 @@ chip soc/intel/skylake
|
||||
register "PcieRpAdvancedErrorReporting[20]" = "1"
|
||||
register "PcieRpLtrEnable[20]" = "true"
|
||||
register "PcieRpClkSrcNumber[20]" = "3"
|
||||
- register "PcieRpHotPlug[20]" = "1"
|
||||
+# disable hotplug on nvme to prevent renaming e.g. nvme0n1 rename to nvme0n2,
|
||||
+# which could cause crashes in linux if booting from nvme
|
||||
+ register "PcieRpHotPlug[20]" = "0"
|
||||
end
|
||||
|
||||
end
|
||||
# Realtek LAN
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From c0bb0e62f169e07ab11c434fbd79a6a26b4e7690 Mon Sep 17 00:00:00 2001
|
||||
From 5d8930edfa1d9537ba80e24c0cf8f0c9e4e9ec72 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Wed, 18 Dec 2024 02:06:18 +0000
|
||||
Subject: [PATCH 31/41] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
|
||||
Subject: [PATCH 32/37] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
|
||||
|
||||
This is used by lbmk to know where a tb.bin file goes,
|
||||
when extracting and padding TBT.bin from Lenovo ThunderBolt
|
||||
@@ -74,5 +74,5 @@ index 2ffbaab85f..512b326381 100644
|
||||
+
|
||||
endif # VENDOR_LENOVO
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
@@ -1,30 +0,0 @@
|
||||
From 2c3a31547a14eb1b1145a5d153289b2eef6d71d8 Mon Sep 17 00:00:00 2001
|
||||
From: Riku Viitanen <riku.viitanen@protonmail.com>
|
||||
Date: Sat, 27 Sep 2025 23:30:46 +0300
|
||||
Subject: [PATCH 33/41] soc/intel/alderlake: Disable
|
||||
MRC_CACHE_USING_MRC_VERSION
|
||||
|
||||
There's some issue with building against the FSP headers in src/vendorcode.
|
||||
Headers in 3rdparty/fsp work, but since FspProducerDataHeaer.h is missing
|
||||
from there, we need to disable MRC_CACHE_USING_MRC_VERSION by force.
|
||||
|
||||
Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
|
||||
---
|
||||
src/soc/intel/alderlake/Kconfig | 1 -
|
||||
1 file changed, 1 deletion(-)
|
||||
|
||||
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
|
||||
index 97c2ecca70..a2074fe05a 100644
|
||||
--- a/src/soc/intel/alderlake/Kconfig
|
||||
+++ b/src/soc/intel/alderlake/Kconfig
|
||||
@@ -36,7 +36,6 @@ config SOC_INTEL_ALDERLAKE
|
||||
select INTEL_GMA_VERSION_2
|
||||
select INTEL_TXT_LIB
|
||||
select MP_SERVICES_PPI_V2
|
||||
- select MRC_CACHE_USING_MRC_VERSION if (SOC_INTEL_ALDERLAKE_PCH_N || SOC_INTEL_RAPTORLAKE) && !FSP_USE_REPO
|
||||
select MRC_SETTINGS_PROTECT
|
||||
select PARALLEL_MP_AP_WORK
|
||||
select PLATFORM_USES_FSP2_2
|
||||
--
|
||||
2.47.3
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 287a6d09ac6f5cdfc8255c2020e37441ddb870c7 Mon Sep 17 00:00:00 2001
|
||||
From 49cee334bc7fe9a78b9355b5256a37984bac385a Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Thu, 26 Dec 2024 19:45:20 +0000
|
||||
Subject: [PATCH 30/41] soc/intel/skylake: Don't compress FSP-S
|
||||
Subject: [PATCH 33/37] soc/intel/skylake: Don't compress FSP-S
|
||||
|
||||
Build systems like lbmk need to reproducibly insert
|
||||
certain vendor files on release images.
|
||||
@@ -19,11 +19,11 @@ Signed-off-by: Leah Rowe <info@minifree.org>
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
|
||||
index 70c2a7643c..a2854923e7 100644
|
||||
index 9191ed0ff8..d51ffaef7b 100644
|
||||
--- a/src/soc/intel/skylake/Kconfig
|
||||
+++ b/src/soc/intel/skylake/Kconfig
|
||||
@@ -14,7 +14,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
|
||||
select DRAM_SUPPORT_DDR4
|
||||
@@ -12,7 +12,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
|
||||
select CPU_SUPPORTS_PM_TIMER_EMULATION
|
||||
select DRIVERS_USB_ACPI
|
||||
select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
|
||||
- select FSP_COMPRESS_FSP_S_LZ4
|
||||
@@ -32,5 +32,5 @@ index 70c2a7643c..a2854923e7 100644
|
||||
select GENERIC_GPIO_LIB
|
||||
select HAVE_FSP_GOP
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
@@ -1,76 +0,0 @@
|
||||
From 8eeb1de057b19938f1221b85e00699c58de90069 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Sun, 28 Sep 2025 03:17:50 +0100
|
||||
Subject: [PATCH 34/41] Subject: [PATCH 1/1] Add a -p option (skip FPTR checks)
|
||||
|
||||
if you pass -k (keep fptr modules), don't use -r, don't
|
||||
use -t, you can essentially just use me_cleaner to
|
||||
extract a ME image without changing it. this is useful
|
||||
when for example, you just want to set the HAP bit.
|
||||
|
||||
however, me_cleaner still performs a FPTR check.
|
||||
|
||||
on some newer ME versions, it's always invalid according
|
||||
to me_cleaner, because for example it doesn't handle
|
||||
ME16 very well yet.
|
||||
|
||||
this patch adds an option to override the FPTR check
|
||||
|
||||
either pass -p or --pass-fptr
|
||||
|
||||
NOTE: we probably won't use this on coreboot's me_cleaner,
|
||||
which is the corna version. we only need it on the newer
|
||||
me_cleaner versions for e.g. ME16, on certain setups.
|
||||
still, it's best to have the patch here too, just in case.
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
util/me_cleaner/me_cleaner.py | 14 ++++++++++----
|
||||
1 file changed, 10 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/util/me_cleaner/me_cleaner.py b/util/me_cleaner/me_cleaner.py
|
||||
index fae5e56732..228bac899f 100755
|
||||
--- a/util/me_cleaner/me_cleaner.py
|
||||
+++ b/util/me_cleaner/me_cleaner.py
|
||||
@@ -246,8 +246,10 @@ def check_partition_signature(f, offset):
|
||||
return "{:#x}".format(decrypted_sig).endswith(sha256.hexdigest()) # FIXME
|
||||
|
||||
|
||||
-def print_check_partition_signature(f, offset):
|
||||
- if check_partition_signature(f, offset):
|
||||
+def print_check_partition_signature(f, offset, pass_fptr):
|
||||
+ if pass_fptr:
|
||||
+ print("Skipping FPTR checks because the user told us to")
|
||||
+ elif check_partition_signature(f, offset):
|
||||
print("VALID")
|
||||
else:
|
||||
print("INVALID!!")
|
||||
@@ -486,6 +488,8 @@ if __name__ == "__main__":
|
||||
"--extract-me)", action="store_true")
|
||||
parser.add_argument("-k", "--keep-modules", help="don't remove the FTPR "
|
||||
"modules, even when possible", action="store_true")
|
||||
+ parser.add_argument("-p", "--pass-fptr", help="skip FTPR signature checks"
|
||||
+ "regardless of other operations", action="store_true")
|
||||
bw_list.add_argument("-w", "--whitelist", metavar="whitelist",
|
||||
help="Comma separated list of additional partitions "
|
||||
"to keep in the final image. This can be used to "
|
||||
@@ -871,12 +875,14 @@ if __name__ == "__main__":
|
||||
print("Checking the FTPR RSA signature of the extracted ME "
|
||||
"image... ", end="")
|
||||
print_check_partition_signature(mef_copy,
|
||||
- ftpr_offset + ftpr_mn2_offset)
|
||||
+ ftpr_offset + ftpr_mn2_offset,
|
||||
+ args.pass_fptr)
|
||||
mef_copy.close()
|
||||
|
||||
if not me6_ignition:
|
||||
print("Checking the FTPR RSA signature... ", end="")
|
||||
- print_check_partition_signature(mef, ftpr_offset + ftpr_mn2_offset)
|
||||
+ print_check_partition_signature(mef, ftpr_offset + ftpr_mn2_offset,
|
||||
+ args.pass_fptr)
|
||||
|
||||
f.close()
|
||||
|
||||
--
|
||||
2.47.3
|
||||
|
||||
@@ -0,0 +1,82 @@
|
||||
From 09740dc9d43a8dc24b7416b70476796515af6581 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <info@minifree.org>
|
||||
Date: Tue, 31 Dec 2024 01:40:42 +0000
|
||||
Subject: [PATCH 34/37] soc/intel/pmc: Hardcoded poweroff after power fail
|
||||
|
||||
Coreboot can set the power state for power on after previous
|
||||
power failure, based on the option table. On the ThinkPad T480,
|
||||
we have no nvram and, due to coreboot's design, we therefore
|
||||
have no option table, so the default setting is enabled.
|
||||
|
||||
In my testing, this seems to be that the system will turn on
|
||||
after a power failure. If your ThinkPad was previously in a state
|
||||
where it wouldn't turn on when plugging in the power, it'd be fine.
|
||||
|
||||
If your battery ran out later on, this would be triggered and
|
||||
your ThinkPad would permanently turn on, when plugging in a charger,
|
||||
and there is currently no way to configure this behaviour.
|
||||
|
||||
We currently only use the common SoC PMC code on the ThinkPad
|
||||
T480, T480s and the Dell OptiPlex 3050 Micro, at the time of
|
||||
this patch, and it is desirable that the system be set to power
|
||||
off after power fail anyway.
|
||||
|
||||
In some cases, you might want the opposite, for example if you're
|
||||
running a server. This will be documented on the website, for that
|
||||
reason.
|
||||
|
||||
Signed-off-by: Leah Rowe <info@minifree.org>
|
||||
---
|
||||
src/soc/intel/common/block/pmc/pmclib.c | 36 +++----------------------
|
||||
1 file changed, 4 insertions(+), 32 deletions(-)
|
||||
|
||||
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
|
||||
index 64b9bb997c..7823775bcb 100644
|
||||
--- a/src/soc/intel/common/block/pmc/pmclib.c
|
||||
+++ b/src/soc/intel/common/block/pmc/pmclib.c
|
||||
@@ -776,38 +776,10 @@ void pmc_clear_pmcon_sts(void)
|
||||
|
||||
void pmc_set_power_failure_state(const bool target_on)
|
||||
{
|
||||
- const unsigned int state = get_uint_option("power_on_after_fail",
|
||||
- CONFIG_MAINBOARD_POWER_FAILURE_STATE);
|
||||
-
|
||||
- /*
|
||||
- * On the shutdown path (target_on == false), we only need to
|
||||
- * update the register for MAINBOARD_POWER_STATE_PREVIOUS. For
|
||||
- * all other cases, we don't write the register to avoid clob-
|
||||
- * bering the value set on the boot path. This is necessary,
|
||||
- * for instance, when we can't access the option backend in SMM.
|
||||
- */
|
||||
-
|
||||
- switch (state) {
|
||||
- case MAINBOARD_POWER_STATE_OFF:
|
||||
- if (!target_on)
|
||||
- break;
|
||||
- printk(BIOS_INFO, "Set power off after power failure.\n");
|
||||
- pmc_soc_set_afterg3_en(false);
|
||||
- break;
|
||||
- case MAINBOARD_POWER_STATE_ON:
|
||||
- if (!target_on)
|
||||
- break;
|
||||
- printk(BIOS_INFO, "Set power on after power failure.\n");
|
||||
- pmc_soc_set_afterg3_en(true);
|
||||
- break;
|
||||
- case MAINBOARD_POWER_STATE_PREVIOUS:
|
||||
- printk(BIOS_INFO, "Keep power state after power failure.\n");
|
||||
- pmc_soc_set_afterg3_en(target_on);
|
||||
- break;
|
||||
- default:
|
||||
- printk(BIOS_WARNING, "Unknown power-failure state: %d\n", state);
|
||||
- break;
|
||||
- }
|
||||
+ if (!target_on)
|
||||
+ return;
|
||||
+ printk(BIOS_INFO, "Set power off after power failure.\n");
|
||||
+ pmc_soc_set_afterg3_en(false);
|
||||
}
|
||||
|
||||
/* This function returns the highest assertion duration of the SLP_Sx assertion widths */
|
||||
--
|
||||
2.39.5
|
||||
|
||||
@@ -1,35 +0,0 @@
|
||||
From be79f8b72a098dcd51639210935ba02d2f5ff808 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Sat, 4 Oct 2025 21:57:43 +0100
|
||||
Subject: [PATCH 35/41] soc/intel/alderlake: Don't compress FSP-S
|
||||
|
||||
Build systems like lbmk need to reproducibly insert
|
||||
certain vendor files on release images.
|
||||
|
||||
Compression isn't always reproducible, and making it
|
||||
so costs a lot more time than simply disabling compression.
|
||||
|
||||
With this change, FSP-S uses slightly more space inside
|
||||
the flash, but it's not that much.
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
src/soc/intel/alderlake/Kconfig | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
|
||||
index a2074fe05a..08137d2706 100644
|
||||
--- a/src/soc/intel/alderlake/Kconfig
|
||||
+++ b/src/soc/intel/alderlake/Kconfig
|
||||
@@ -16,7 +16,7 @@ config SOC_INTEL_ALDERLAKE
|
||||
select DRAM_SUPPORT_DDR5
|
||||
select DRIVERS_USB_ACPI
|
||||
select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
|
||||
- select FSP_COMPRESS_FSP_S_LZ4
|
||||
+# select FSP_COMPRESS_FSP_S_LZ4
|
||||
select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW
|
||||
select FSP_M_XIP
|
||||
select FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN
|
||||
--
|
||||
2.47.3
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From a6fdf61bb4779775fa330fc3f9b79be651c6854a Mon Sep 17 00:00:00 2001
|
||||
From 18f4e970ebda43dd538f74398aea463a67040dd3 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Mon, 6 Jan 2025 01:36:23 +0000
|
||||
Subject: [PATCH 29/41] src/intel/skylake: Disable stack overflow debug options
|
||||
Subject: [PATCH 35/37] src/intel/skylake: Disable stack overflow debug options
|
||||
|
||||
The option was appearing in T480/3050micro configs of lbmk,
|
||||
after updating on the coreboot/next uprev for 20241206 rev8:
|
||||
@@ -37,10 +37,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
|
||||
index 7c530f2c75..70c2a7643c 100644
|
||||
index d51ffaef7b..42af82a5d8 100644
|
||||
--- a/src/soc/intel/skylake/Kconfig
|
||||
+++ b/src/soc/intel/skylake/Kconfig
|
||||
@@ -131,6 +131,15 @@ config DCACHE_RAM_SIZE
|
||||
@@ -129,6 +129,15 @@ config DCACHE_RAM_SIZE
|
||||
The size of the cache-as-ram region required during bootblock
|
||||
and/or romstage.
|
||||
|
||||
@@ -57,5 +57,5 @@ index 7c530f2c75..70c2a7643c 100644
|
||||
hex
|
||||
default 0x20400 if FSP_USES_CB_STACK
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
@@ -1,33 +0,0 @@
|
||||
From 226df168b34467ca8555e953b6d793f273c0b82c Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Sat, 4 Oct 2025 22:20:11 +0100
|
||||
Subject: [PATCH 36/41] alderlake: don't require full fsp repo for fd path
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
src/soc/intel/alderlake/Kconfig | 9 ++++++++-
|
||||
1 file changed, 8 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
|
||||
index 08137d2706..67e47c2e36 100644
|
||||
--- a/src/soc/intel/alderlake/Kconfig
|
||||
+++ b/src/soc/intel/alderlake/Kconfig
|
||||
@@ -417,7 +417,14 @@ config FSP_HEADER_PATH
|
||||
|
||||
config FSP_FD_PATH
|
||||
string
|
||||
- depends on FSP_USE_REPO
|
||||
+# dependency removed for lbmk purposes, so that the path is present
|
||||
+# in the config regardless of whether it's used. this is for ./mk -d
|
||||
+# on alderlake boards, which is used by lbmk to manually split fsp,
|
||||
+# even though the result is identical to what coreboot produces, because
|
||||
+# this enables lbmk to strip the fsp in release archives, and re-insert
|
||||
+# for compliance reasons (due to technicalities in intel's licensing),
|
||||
+# and to enable lbmk's advanced checksum verification of vendor files
|
||||
+# depends on FSP_USE_REPO
|
||||
default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/FSP.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE
|
||||
default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/FSP.fd" if FSP_TYPE_IOT && SOC_INTEL_RAPTORLAKE_PCH_S
|
||||
default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Fsp.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P
|
||||
--
|
||||
2.47.3
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From bf3c3df864cae045c82d1c032ced834a60239401 Mon Sep 17 00:00:00 2001
|
||||
From 8dcd86c34d92b9b17bcfe4c7c61793042dc97268 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Mon, 6 Jan 2025 01:53:53 +0000
|
||||
Subject: [PATCH 26/41] src/intel/x4x: Disable stack overflow debug
|
||||
Subject: [PATCH 36/37] src/intel/x4x: Disable stack overflow debug
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
@@ -9,7 +9,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
|
||||
index 069fa0244d..8c70344846 100644
|
||||
index 1803ef5733..7129aabf72 100644
|
||||
--- a/src/northbridge/intel/x4x/Kconfig
|
||||
+++ b/src/northbridge/intel/x4x/Kconfig
|
||||
@@ -32,6 +32,15 @@ config ECAM_MMCONF_BUS_NUMBER
|
||||
@@ -29,5 +29,5 @@ index 069fa0244d..8c70344846 100644
|
||||
config DOMAIN_RESOURCE_32BIT_LIMIT
|
||||
default 0xfec00000
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From c25cf16fb0d278354c7e2c19f534a04e27ac46dd Mon Sep 17 00:00:00 2001
|
||||
From 9b547c2029611793f895117a807fa2d2c22a5332 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Mon, 21 Apr 2025 05:14:45 +0100
|
||||
Subject: [PATCH 32/41] Conditional TBFW setting for kabylake thinkpads
|
||||
Subject: [PATCH 37/37] Conditional TBFW setting for T480/T480S
|
||||
|
||||
Otherwise, other boards will define it, which
|
||||
might trigger the vendor download script, and
|
||||
@@ -13,14 +13,14 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
diff --git a/src/mainboard/lenovo/Kconfig b/src/mainboard/lenovo/Kconfig
|
||||
index 512b326381..b2c7763198 100644
|
||||
index 512b326381..3d3490b35d 100644
|
||||
--- a/src/mainboard/lenovo/Kconfig
|
||||
+++ b/src/mainboard/lenovo/Kconfig
|
||||
@@ -18,6 +18,8 @@ config MAINBOARD_FAMILY
|
||||
string
|
||||
default MAINBOARD_PART_NUMBER
|
||||
|
||||
+if BOARD_LENOVO_T480 || BOARD_LENOVO_T480S || BOARD_LENOVO_X280 || BOARD_LENOVO_T470S || BOARD_LENOVO_T580
|
||||
+if BOARD_LENOVO_T480 || BOARD_LENOVO_T480S
|
||||
+
|
||||
config LENOVO_TBFW_BIN
|
||||
string "Lenovo ThunderBolt firmware bin file"
|
||||
@@ -29,9 +29,9 @@ index 512b326381..b2c7763198 100644
|
||||
Just leave this blank if you don't care about this option. It's not
|
||||
useful for every ThinkPad, only certain models.
|
||||
|
||||
+endif # BOARD_LENOVO_T480 || BOARD_LENOVO_T480S || BOARD_LENOVO_X280 || BOARD_LENOVO_T470S || BOARD_LENOVO_T580
|
||||
+endif # BOARD LENOVO_T480 || BOARD_LENOVO_T480S
|
||||
+
|
||||
endif # VENDOR_LENOVO
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
@@ -1,46 +0,0 @@
|
||||
From 30366be45e5b7521b93475f68c7143bd683b25f3 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Mon, 6 Oct 2025 04:47:06 +0100
|
||||
Subject: [PATCH 37/41] soc/alderlake: disable stack overflow debug option
|
||||
|
||||
same as on other boards. based on this commit:
|
||||
|
||||
commit 51cc2bacb6b07279b97e9934d079060475481fb6
|
||||
Author: Subrata Banik <subratabanik@google.com>
|
||||
Author: Subrata Banik <subratabanik@google.com>
|
||||
Date: Fri Dec 13 13:07:28 2024 +0530
|
||||
|
||||
soc/intel/pantherlake: Disable stack overflow debug options
|
||||
|
||||
yeah, i've been replicating this change per platform.
|
||||
|
||||
we do alderlake now in libreboot, so let's set that here too.
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
src/soc/intel/alderlake/Kconfig | 9 +++++++++
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
|
||||
index 67e47c2e36..e9c56fc6b9 100644
|
||||
--- a/src/soc/intel/alderlake/Kconfig
|
||||
+++ b/src/soc/intel/alderlake/Kconfig
|
||||
@@ -331,6 +331,15 @@ config SOC_INTEL_UFS_CLK_FREQ_HZ
|
||||
int
|
||||
default 19200000
|
||||
|
||||
+# Override DEBUG Kconfig to avoid false alarm about stack overflow.
|
||||
+config DEBUG_STACK_OVERFLOW_BREAKPOINTS
|
||||
+ bool
|
||||
+ default n
|
||||
+
|
||||
+config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
|
||||
+ bool
|
||||
+ default n
|
||||
+
|
||||
config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ
|
||||
int
|
||||
default 133
|
||||
--
|
||||
2.47.3
|
||||
|
||||
@@ -0,0 +1,153 @@
|
||||
From 49204919e885dca2be45ffbaf2f5af62109ec3a7 Mon Sep 17 00:00:00 2001
|
||||
From: gaspar-ilom <gasparilom@riseup.net>
|
||||
Date: Thu, 6 Mar 2025 23:00:00 +0000
|
||||
Subject: [PATCH 1/1] do not break building other thinkpads with the hacks for
|
||||
the t480/s made Mate Kukri
|
||||
|
||||
still not fixing things properly but at least it should now be possible to build older thinkpads without regressions.
|
||||
prior, some code was just commented or unreachable. now we make this explicit with preprocessor directives.
|
||||
heads should build all boards on this coreboot version from the same coreboot tree.
|
||||
|
||||
Signed-off-by: gaspar-ilom <gasparilom@riseup.net>
|
||||
---
|
||||
src/device/pci_rom.c | 9 ++++++---
|
||||
src/ec/lenovo/h8/acpi/ec.asl | 4 +++-
|
||||
src/ec/lenovo/h8/bluetooth.c | 14 ++++++++++----
|
||||
src/ec/lenovo/h8/wwan.c | 14 ++++++++++----
|
||||
4 files changed, 29 insertions(+), 12 deletions(-)
|
||||
|
||||
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
|
||||
index bba98d9dea..db3dbbe2ce 100644
|
||||
--- a/src/device/pci_rom.c
|
||||
+++ b/src/device/pci_rom.c
|
||||
@@ -396,16 +396,19 @@ void pci_rom_ssdt(const struct device *device)
|
||||
rom = cbrom;
|
||||
}
|
||||
|
||||
-#if 0
|
||||
+
|
||||
+ #if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
|
||||
+ const char *scope = "\\_SB.PCI0.RP01.PEGP";
|
||||
+ #else
|
||||
const char *scope = acpi_device_path(device);
|
||||
+ #endif
|
||||
if (!scope) {
|
||||
printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device));
|
||||
return;
|
||||
}
|
||||
-#endif
|
||||
|
||||
/* write _ROM method */
|
||||
- acpigen_write_scope("\\_SB.PCI0.RP01.PEGP");
|
||||
+ acpigen_write_scope(scope);
|
||||
acpigen_write_rom((void *)rom, rom->size * 512);
|
||||
acpigen_pop_len(); /* pop scope */
|
||||
}
|
||||
diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl
|
||||
index 8f4a8e1986..f80c15106c 100644
|
||||
--- a/src/ec/lenovo/h8/acpi/ec.asl
|
||||
+++ b/src/ec/lenovo/h8/acpi/ec.asl
|
||||
@@ -331,7 +331,9 @@ Device(EC)
|
||||
#include "sleepbutton.asl"
|
||||
#include "lid.asl"
|
||||
#include "beep.asl"
|
||||
-//#include "thermal.asl"
|
||||
+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
|
||||
+#include "thermal.asl"
|
||||
+#endif
|
||||
#include "systemstatus.asl"
|
||||
#include "thinkpad.asl"
|
||||
}
|
||||
diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c
|
||||
index be71a24ced..e60b6c088c 100644
|
||||
--- a/src/ec/lenovo/h8/bluetooth.c
|
||||
+++ b/src/ec/lenovo/h8/bluetooth.c
|
||||
@@ -1,6 +1,8 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
-// #include <southbridge/intel/common/gpio.h>
|
||||
+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
|
||||
+#include <southbridge/intel/common/gpio.h>
|
||||
+#endif
|
||||
#include <console/console.h>
|
||||
#include <device/device.h>
|
||||
#include <ec/acpi/ec.h>
|
||||
@@ -26,23 +28,27 @@ void h8_bluetooth_enable(int on)
|
||||
*/
|
||||
bool h8_has_bdc(const struct device *dev)
|
||||
{
|
||||
+ #if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
|
||||
+ printk(BIOS_INFO, "H8: BDC detection not implemented. "
|
||||
+ "Assuming BDC installed\n");
|
||||
+ return true;
|
||||
+ #else
|
||||
struct ec_lenovo_h8_config *conf = dev->chip_info;
|
||||
|
||||
- if (1 || !conf->has_bdc_detection) {
|
||||
+ if (!conf->has_bdc_detection) {
|
||||
printk(BIOS_INFO, "H8: BDC detection not implemented. "
|
||||
"Assuming BDC installed\n");
|
||||
return true;
|
||||
}
|
||||
|
||||
-#if 0
|
||||
if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) {
|
||||
printk(BIOS_INFO, "H8: BDC installed\n");
|
||||
return true;
|
||||
}
|
||||
-#endif
|
||||
|
||||
printk(BIOS_INFO, "H8: BDC not installed\n");
|
||||
return false;
|
||||
+ #endif
|
||||
}
|
||||
|
||||
/*
|
||||
diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c
|
||||
index 5cdcf77406..b4f5787e01 100644
|
||||
--- a/src/ec/lenovo/h8/wwan.c
|
||||
+++ b/src/ec/lenovo/h8/wwan.c
|
||||
@@ -1,6 +1,8 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
-// #include <southbridge/intel/common/gpio.h>
|
||||
+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
|
||||
+#include <southbridge/intel/common/gpio.h>
|
||||
+#endif
|
||||
#include <console/console.h>
|
||||
#include <device/device.h>
|
||||
#include <ec/acpi/ec.h>
|
||||
@@ -24,23 +26,27 @@ void h8_wwan_enable(int on)
|
||||
*/
|
||||
bool h8_has_wwan(const struct device *dev)
|
||||
{
|
||||
+ #if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
|
||||
+ printk(BIOS_INFO, "H8: WWAN detection not implemented. "
|
||||
+ "Assuming WWAN installed\n");
|
||||
+ return true;
|
||||
+ #else
|
||||
struct ec_lenovo_h8_config *conf = dev->chip_info;
|
||||
|
||||
- if (1 || !conf->has_wwan_detection) {
|
||||
+ if (!conf->has_wwan_detection) {
|
||||
printk(BIOS_INFO, "H8: WWAN detection not implemented. "
|
||||
"Assuming WWAN installed\n");
|
||||
return true;
|
||||
}
|
||||
|
||||
-#if 0
|
||||
if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) {
|
||||
printk(BIOS_INFO, "H8: WWAN installed\n");
|
||||
return true;
|
||||
}
|
||||
-#endif
|
||||
|
||||
printk(BIOS_INFO, "H8: WWAN not installed\n");
|
||||
return false;
|
||||
+ #endif
|
||||
}
|
||||
|
||||
/*
|
||||
--
|
||||
2.39.5
|
||||
|
||||
@@ -1,92 +0,0 @@
|
||||
From 90332fe96aca0de4d99d58d1593048c77e1bdecf Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Sun, 11 May 2025 15:41:22 -0600
|
||||
Subject: [PATCH 38/41] ec/dell/mec5035: Add command to disable EC-initiated
|
||||
thermal shutdown
|
||||
|
||||
If command 0xBF isn't sent, the EC shuts down the system without warning
|
||||
as soon as the CPU temperature reaches about 87 degrees, without letting
|
||||
the CPU thermal throttle to try and reduce the temperature. With vendor
|
||||
firmware, the CPU is able to reach around 100 degrees before thermal
|
||||
throttling.
|
||||
|
||||
This command was found by collecting EC commands by logging the LPC bus
|
||||
while running with vendor firmware and then replaying observed commands
|
||||
from coreboot. By systematically replaying subsets of commands in a
|
||||
binary search pattern and then stress testing the system, the command to
|
||||
disable the shutdown was isolated.
|
||||
|
||||
The exact meaning of the parameters for this command are unknown at this
|
||||
time, but do seem to differ between different generations of these
|
||||
laptops. Due to this, the commmand should be called by mainboard
|
||||
specific code which passes the specific parameter value used.
|
||||
|
||||
The Google Wilco EC code, which runs on Latitude Chromebooks and shares
|
||||
many commands with the standard Latitude ECs, suggests that command 0xBF
|
||||
tells the EC about the processors CPUID. However, the values observed in
|
||||
LPC bus logs do not seem to correspond with any CPUID values on the
|
||||
non-Chromebook systems I tested.
|
||||
|
||||
Observed command parameter values (sent on mailbox registers 2-4):
|
||||
- E6430 (Ivy Bridge): 0x07, 0x00, 0x00
|
||||
- M6800 (Haswell): 0x14, 0x00, 0x00
|
||||
|
||||
Change-Id: I42f09a3ef681007f64d9c5b1a29248b594737a86
|
||||
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
---
|
||||
src/ec/dell/mec5035/mec5035.c | 19 +++++++++++++++++++
|
||||
src/ec/dell/mec5035/mec5035.h | 2 ++
|
||||
2 files changed, 21 insertions(+)
|
||||
|
||||
diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
|
||||
index c5067c16f6..b316fa4989 100644
|
||||
--- a/src/ec/dell/mec5035/mec5035.c
|
||||
+++ b/src/ec/dell/mec5035/mec5035.c
|
||||
@@ -114,6 +114,25 @@ void mec5035_sleep_enable(void)
|
||||
ec_command(CMD_SLEEP_ENABLE);
|
||||
}
|
||||
|
||||
+void mec5035_cmd_bf(u8 i)
|
||||
+{
|
||||
+ /*
|
||||
+ * If this command isn't sent, the EC shuts down the system as soon as
|
||||
+ * the CPU temperature reaches about 87 degrees. It is unknown exactly
|
||||
+ * what the parameters represent. The Google Wilco EC code, which runs
|
||||
+ * on Latitude Chromebooks and shares some commands with the standard
|
||||
+ * Latitude EC code, suggests command 0xBF tells the EC the CPUID, but
|
||||
+ * the values observed in LPC bus logs don't seem to match any CPUID
|
||||
+ * values of the normal Latitudes this was tested with.
|
||||
+ * Observed i values:
|
||||
+ * - E6430 (Ivy Bridge): 0x7
|
||||
+ * - M6800 (Haswell): 0x14
|
||||
+ */
|
||||
+ u8 buf[3] = {i, 0, 0};
|
||||
+ write_mailbox_regs(buf, 2, 3);
|
||||
+ ec_command(CMD_BF);
|
||||
+}
|
||||
+
|
||||
void mec5035_early_init(void)
|
||||
{
|
||||
/* If this isn't sent the EC shuts down the system after about 15
|
||||
diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
|
||||
index 5cd907bf71..71d1a71075 100644
|
||||
--- a/src/ec/dell/mec5035/mec5035.h
|
||||
+++ b/src/ec/dell/mec5035/mec5035.h
|
||||
@@ -14,6 +14,7 @@ enum mec5035_cmd {
|
||||
CMD_POWER_BUTTON_TO_HOST = 0x3e,
|
||||
CMD_ACPI_WAKEUP_CHANGE = 0x4a,
|
||||
CMD_SLEEP_ENABLE = 0x64,
|
||||
+ CMD_BF = 0xbf,
|
||||
CMD_CPU_OK = 0xc2,
|
||||
};
|
||||
|
||||
@@ -65,5 +66,6 @@ void mec5035_change_wake(u8 source, enum ec_wake_change change);
|
||||
void mec5035_sleep_enable(void);
|
||||
|
||||
void mec5035_smi_sleep(int slp_type);
|
||||
+void mec5035_cmd_bf(u8 i);
|
||||
|
||||
#endif /* _EC_DELL_MEC5035_H_ */
|
||||
--
|
||||
2.47.3
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
From 0ad074869ec2a25508b1d6fc97c6ce61a9982fbd Mon Sep 17 00:00:00 2001
|
||||
From b313c1d4bae17fc6eb3a8217c503187d1cd5453d Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Tue, 22 Apr 2025 10:21:59 +0100
|
||||
Subject: [PATCH 27/41] hp/8300cmt: remove xhci_overcurrent_mapping
|
||||
Subject: [PATCH 1/1] hp/8300cmt: remove xhci_overcurrent_mapping
|
||||
|
||||
No longer needed, as per the following commit:
|
||||
|
||||
@@ -38,5 +38,5 @@ index 3d21739b72..3a0b6d5c59 100644
|
||||
register "usb_port_config" = "{
|
||||
{ 1, 0, 0 },
|
||||
--
|
||||
2.47.3
|
||||
2.39.5
|
||||
|
||||
@@ -1,36 +0,0 @@
|
||||
From 68048f4afe369ece02143f9a4a7da2104ff2d10b Mon Sep 17 00:00:00 2001
|
||||
From: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
Date: Sun, 11 May 2025 16:28:23 -0600
|
||||
Subject: [PATCH 39/41] mb/dell/snb_ivb_latitude: Disable EC initiated shutdown
|
||||
at 87 degrees
|
||||
|
||||
If command 0xBF isn't sent, the EC will shut down the system without
|
||||
warning once the CPU reaches approximately 87 degrees, without the
|
||||
system thermal throttling first. Call the newly added function from the
|
||||
MEC5035 code to send this command and disable this behavior.
|
||||
|
||||
Tested on the Latitude E6430.
|
||||
|
||||
Change-Id: I2b2dc1e3ab115e05d05eaac06892343394d37fdf
|
||||
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
|
||||
---
|
||||
src/mainboard/dell/snb_ivb_latitude/early_init.c | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
diff --git a/src/mainboard/dell/snb_ivb_latitude/early_init.c b/src/mainboard/dell/snb_ivb_latitude/early_init.c
|
||||
index ff83db095b..ef385a0a70 100644
|
||||
--- a/src/mainboard/dell/snb_ivb_latitude/early_init.c
|
||||
+++ b/src/mainboard/dell/snb_ivb_latitude/early_init.c
|
||||
@@ -11,4 +11,9 @@ void bootblock_mainboard_early_init(void)
|
||||
| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
|
||||
| COMB_LPC_EN | COMA_LPC_EN);
|
||||
mec5035_early_init();
|
||||
+
|
||||
+ /* Observed from LPC logs with vendor firmware. Seems to disable
|
||||
+ * EC-initiated shutdown when the CPU reaches approximately 87 degrees.
|
||||
+ * The exact meaning of the parameter is currently unknown. */
|
||||
+ mec5035_cmd_bf(0x07);
|
||||
}
|
||||
--
|
||||
2.47.3
|
||||
|
||||
@@ -0,0 +1,62 @@
|
||||
From 281151d85240bd8a60545b6415e0f44ce6a2af33 Mon Sep 17 00:00:00 2001
|
||||
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
|
||||
Date: Tue, 29 Apr 2025 17:31:13 +0300
|
||||
Subject: [PATCH] WIP: Fix build with GCC 15 as host compiler
|
||||
|
||||
GCC 15 now considers the unterminated-string-initialization warning as
|
||||
part of -Werror by default. Coreboot compiles host utilities with the
|
||||
system compiler, which results in getting this error in some files.
|
||||
|
||||
Mark a hexadecimal translation table in cbfstool code as "nonstring" to
|
||||
avoid the warning-turned-error.
|
||||
|
||||
The bios log prefixes are non-null-terminated as well, but I couldn't
|
||||
figure out how to mark them as non-strings. Temporarily disable the
|
||||
warning with a pragma to avoid the error. That pragma causes an error on
|
||||
GCC 14, so disable pragma warnings along with it to avoid that as well.
|
||||
|
||||
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
|
||||
---
|
||||
src/commonlib/include/commonlib/loglevel.h | 4 ++++
|
||||
util/cbfstool/common.c | 2 +-
|
||||
2 files changed, 5 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/commonlib/include/commonlib/loglevel.h b/src/commonlib/include/commonlib/loglevel.h
|
||||
index 79fbcfc6d92b..31438c945ff5 100644
|
||||
--- a/src/commonlib/include/commonlib/loglevel.h
|
||||
+++ b/src/commonlib/include/commonlib/loglevel.h
|
||||
@@ -163,6 +163,9 @@
|
||||
* When printing logs, lines should be printed with the following prefixes in
|
||||
* front of them according to the BIOS_LOG_PREFIX_PATTERN printf() pattern.
|
||||
*/
|
||||
+#pragma GCC diagnostic push
|
||||
+#pragma GCC diagnostic ignored "-Wpragmas"
|
||||
+#pragma GCC diagnostic ignored "-Wunterminated-string-initialization"
|
||||
#define BIOS_LOG_PREFIX_PATTERN "[%.5s] "
|
||||
#define BIOS_LOG_PREFIX_MAX_LEVEL BIOS_SPEW
|
||||
static const char bios_log_prefix[BIOS_LOG_PREFIX_MAX_LEVEL + 1][5] = {
|
||||
@@ -177,6 +180,7 @@ static const char bios_log_prefix[BIOS_LOG_PREFIX_MAX_LEVEL + 1][5] = {
|
||||
[BIOS_DEBUG] = "DEBUG",
|
||||
[BIOS_SPEW] = "SPEW ",
|
||||
};
|
||||
+#pragma GCC diagnostic pop
|
||||
|
||||
/*
|
||||
* When printing to terminals supporting ANSI escape sequences, the following
|
||||
diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
|
||||
index 7154bc9d5425..cb08c9e8ec11 100644
|
||||
--- a/util/cbfstool/common.c
|
||||
+++ b/util/cbfstool/common.c
|
||||
@@ -192,7 +192,7 @@ uint64_t intfiletype(const char *name)
|
||||
|
||||
char *bintohex(uint8_t *data, size_t len)
|
||||
{
|
||||
- static const char translate[16] = "0123456789abcdef";
|
||||
+ static const char translate[16] __attribute__((__nonstring__)) = "0123456789abcdef";
|
||||
|
||||
char *result = malloc(len * 2 + 1);
|
||||
if (result == NULL)
|
||||
|
||||
--
|
||||
2.49.0
|
||||
|
||||
@@ -0,0 +1,71 @@
|
||||
From ee3925486f3567b9fe45cb98a88b9acc64991127 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Tue, 29 Apr 2025 21:15:22 +0100
|
||||
Subject: [PATCH 1/1] crossgcc/gmp: Add upstream fix for GCC 15
|
||||
|
||||
See:
|
||||
https://gmplib.org/list-archives/gmp-devel/2025-January/006279.html
|
||||
|
||||
by default, upstream GCC-15 now defaults to -std=c23, instead
|
||||
of -std=c17, which can cause some build issues.
|
||||
|
||||
GMP has this patch on their mailing list for GCC-15 (see link).
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
.../gmp-6.3.0_acinclude-m4-fix-std-c23.patch | 43 +++++++++++++++++++
|
||||
1 file changed, 43 insertions(+)
|
||||
create mode 100644 util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
|
||||
|
||||
diff --git a/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
|
||||
new file mode 100644
|
||||
index 0000000000..b884b62df7
|
||||
--- /dev/null
|
||||
+++ b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
|
||||
@@ -0,0 +1,43 @@
|
||||
+From b1b61bc8ab19659f0fb8c0f87edcd79ae1bfef7e Mon Sep 17 00:00:00 2001
|
||||
+From: Rudi Heitbaum <rudi@heitbaum.com>
|
||||
+Date: Wed, 22 Jan 2025 02:34:09 +0100
|
||||
+Subject: [PATCH 1/1] acinclude.m4: fix -std=c23 build failure
|
||||
+
|
||||
+Add prototype to configure test function as c23 removes unprototyped
|
||||
+functions.
|
||||
+
|
||||
+gcc-15 switched to -std=c23 by default:
|
||||
+
|
||||
+ https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=55e3bd376b2214e200fa76d12b67ff259b06c212
|
||||
+
|
||||
+As a result `configure` fails with:
|
||||
+ conftest.c: In function 'f':
|
||||
+ conftest.c:12:48: error: too many arguments to function 'g'; expected 0, have 6
|
||||
+ 12 | for(i=0;i<1;i++){if(e(got,got,9,d[i].n)==0)h();g(i,d[i].src,d[i].n,got,d[i].want,9);if(d[i].n)h();}}
|
||||
+ | ^ ~
|
||||
+ conftest.c:7:6: note: declared here
|
||||
+ 7 | void g(){}
|
||||
+ | ^
|
||||
+
|
||||
+Link: https://gmplib.org/list-archives/gmp-bugs/2024-November/005550.html
|
||||
+Signed-off-by: Rudi Heitbaum <rudi@heitbaum.com>
|
||||
+---
|
||||
+ acinclude.m4 | 2 +-
|
||||
+ 1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
+
|
||||
+diff --git a/acinclude.m4 b/acinclude.m4
|
||||
+index 9cf9483..1eed843 100644
|
||||
+--- a/acinclude.m4
|
||||
++++ b/acinclude.m4
|
||||
+@@ -609,7 +609,7 @@ GMP_PROG_CC_WORKS_PART([$1], [long long reliability test 1],
|
||||
+
|
||||
+ #if defined (__GNUC__) && ! defined (__cplusplus)
|
||||
+ typedef unsigned long long t1;typedef t1*t2;
|
||||
+-void g(){}
|
||||
++void g(int,const t1 *,t1,t1 *,const t1 *,int){}
|
||||
+ void h(){}
|
||||
+ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
|
||||
+ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;}
|
||||
+--
|
||||
+2.39.5
|
||||
+
|
||||
--
|
||||
2.39.5
|
||||
|
||||
@@ -1,28 +0,0 @@
|
||||
From 6e084398d4e6847b0f64325dadd4cfee0b43d7ea Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Sat, 20 Dec 2025 20:12:48 +0100
|
||||
Subject: [PATCH 1/1] fix ifdtool build
|
||||
|
||||
not my mistake. someone messed up.
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
util/ifdtool/ifdtool.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
|
||||
index ea8dfc788d..33f00436bc 100644
|
||||
--- a/util/ifdtool/ifdtool.c
|
||||
+++ b/util/ifdtool/ifdtool.c
|
||||
@@ -2598,7 +2598,7 @@ int main(int argc, char *argv[])
|
||||
}
|
||||
mode_nuke = 1;
|
||||
break;
|
||||
- Case 'v':
|
||||
+ case 'v':
|
||||
print_version();
|
||||
exit(EXIT_SUCCESS);
|
||||
break;
|
||||
--
|
||||
2.47.3
|
||||
|
||||
@@ -0,0 +1,54 @@
|
||||
From 983835d1470dde4559d9ee58c60e65c0bb3873c2 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Tue, 29 Apr 2025 23:13:42 +0100
|
||||
Subject: [PATCH 1/1] further gcc-15 fix for compiling gmp
|
||||
|
||||
same as the previous fix, but we needed to apply
|
||||
the exact same change to the configure file, in
|
||||
the appropriate place.
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
...6.3.0_acinclude-m4-fix-std-c23-extra.patch | 30 +++++++++++++++++++
|
||||
1 file changed, 30 insertions(+)
|
||||
create mode 100644 util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
|
||||
|
||||
diff --git a/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
|
||||
new file mode 100644
|
||||
index 0000000000..bee0159abf
|
||||
--- /dev/null
|
||||
+++ b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
|
||||
@@ -0,0 +1,30 @@
|
||||
+From f1da82325f91ccf8f3a251c0f94388acf091c1fe Mon Sep 17 00:00:00 2001
|
||||
+From: Leah Rowe <leah@libreboot.org>
|
||||
+Date: Tue, 29 Apr 2025 23:11:25 +0100
|
||||
+Subject: [PATCH 1/1] further gcc-15 -std=23 mitigation
|
||||
+
|
||||
+the same fix as in the previous revision, also needs
|
||||
+to be applied here. this make the coreboot build process
|
||||
+pass, when compiling gmp.
|
||||
+
|
||||
+Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
+---
|
||||
+ configure | 2 +-
|
||||
+ 1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
+
|
||||
+diff --git a/configure b/configure
|
||||
+index 7910aa0..bd4342d 100755
|
||||
+--- a/configure
|
||||
++++ b/configure
|
||||
+@@ -6568,7 +6568,7 @@ if test "$gmp_prog_cc_works" = yes; then
|
||||
+
|
||||
+ #if defined (__GNUC__) && ! defined (__cplusplus)
|
||||
+ typedef unsigned long long t1;typedef t1*t2;
|
||||
+-void g(){}
|
||||
++void g(int,const t1 *,t1,t1 *,const t1 *,int){}
|
||||
+ void h(){}
|
||||
+ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
|
||||
+ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;}
|
||||
+--
|
||||
+2.39.5
|
||||
+
|
||||
--
|
||||
2.39.5
|
||||
|
||||
@@ -1,30 +0,0 @@
|
||||
From ca27517cb5752d078a3f8328ff6b220f652b0849 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Sat, 20 Dec 2025 22:36:18 +0100
|
||||
Subject: [PATCH 1/1] tests/Makefile.mk: use 3rdparty/cmocka by default
|
||||
|
||||
(tests)
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
tests/Makefile.mk | 4 +++-
|
||||
1 file changed, 3 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/tests/Makefile.mk b/tests/Makefile.mk
|
||||
index f3f122dd38..33bb2a2d07 100644
|
||||
--- a/tests/Makefile.mk
|
||||
+++ b/tests/Makefile.mk
|
||||
@@ -25,7 +25,9 @@ TEST_LDFLAGS += --coverage
|
||||
endif
|
||||
|
||||
# Use system cmoka in default, or build from 3rdparty source code if requested
|
||||
-USE_SYSTEM_CMOCKA ?= 1
|
||||
+# PATCH NOTE: lbmk sets it to 0 by default. You can still override it to 1
|
||||
+# if you wish; upstream sets this to 1 by default, but we do 0
|
||||
+USE_SYSTEM_CMOCKA ?= 0
|
||||
ifeq ($(USE_SYSTEM_CMOCKA),1)
|
||||
ifeq ($(shell $(HOSTPKG_CONFIG) --exists cmocka || echo 1),1)
|
||||
$(warning No system cmocka, build from 3rdparty instead...)
|
||||
--
|
||||
2.47.3
|
||||
|
||||
@@ -1,51 +0,0 @@
|
||||
From 22076426d1de6d2e49b8728b3cf206bfcfc6742d Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Tue, 23 Dec 2025 18:41:27 +0100
|
||||
Subject: [PATCH 1/2] mb/dell/optiplex_780: use legacy HDA verb table
|
||||
|
||||
See:
|
||||
|
||||
commit 31fc5b06a6be62b30739d33eeabe6c2727679bb1
|
||||
Author: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
|
||||
Date: Thu Aug 7 08:31:24 2025 +0900
|
||||
|
||||
device: Introduce reworked azalia verb table
|
||||
|
||||
and:
|
||||
|
||||
commit 50a59d4464917503847eeeb2df4320c35cf2f6cc
|
||||
Author: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
|
||||
Date: Mon Sep 15 16:25:21 2025 +0900
|
||||
|
||||
device: Add Kconfig to prepare for reworked verb table implementation
|
||||
|
||||
Without this change, lbmk gets the following error
|
||||
when building for Dell OptiPlex 780:
|
||||
|
||||
i386-elf-ld.bfd: build/ramstage/device/azalia_device.o: in function `azalia_codecs_init':
|
||||
/path/to/corebootclone/src/device/azalia_device.c:318:(.text.azalia_codecs_init+0xa): undefined reference to `mainboard_azalia_codecs'
|
||||
|
||||
This is a temporary fix. Upstream will require that the code
|
||||
be fully adapted at a future date. Therefore, one could consider
|
||||
the current functionality to be "deprecated".
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
src/mainboard/dell/optiplex_780/Kconfig | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/src/mainboard/dell/optiplex_780/Kconfig b/src/mainboard/dell/optiplex_780/Kconfig
|
||||
index fc649e35d5..172bb2fa87 100644
|
||||
--- a/src/mainboard/dell/optiplex_780/Kconfig
|
||||
+++ b/src/mainboard/dell/optiplex_780/Kconfig
|
||||
@@ -2,6 +2,7 @@
|
||||
|
||||
config BOARD_DELL_OPTIPLEX_780_COMMON
|
||||
def_bool n
|
||||
+ select AZALIA_USE_LEGACY_VERB_TABLE
|
||||
select BOARD_ROMSIZE_KB_8192
|
||||
select CPU_INTEL_SOCKET_LGA775
|
||||
select DRIVERS_I2C_CK505
|
||||
--
|
||||
2.47.3
|
||||
|
||||
@@ -1,30 +0,0 @@
|
||||
From 6cea443cf12eb94b3eafcbba4ce6370b31f716cc Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Tue, 23 Dec 2025 18:46:45 +0100
|
||||
Subject: [PATCH 2/2] hp8300cmt: use legacy verb table
|
||||
|
||||
same as for the 780 optiplex patch
|
||||
|
||||
coreboot is making some changes to the way verbs are
|
||||
handled. for now, this change is being made to adapt.
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
src/mainboard/hp/compaq_elite_8300_cmt/Kconfig | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
|
||||
index d2bfd35dc4..30be7fb3fe 100644
|
||||
--- a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
|
||||
+++ b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
|
||||
@@ -2,6 +2,7 @@ if BOARD_HP_COMPAQ_ELITE_8300_CMT
|
||||
|
||||
config BOARD_SPECIFIC_OPTIONS
|
||||
def_bool y
|
||||
+ select AZALIA_USE_LEGACY_VERB_TABLE
|
||||
select BOARD_ROMSIZE_KB_16384
|
||||
select HAVE_ACPI_RESUME
|
||||
select HAVE_ACPI_TABLES
|
||||
--
|
||||
2.47.3
|
||||
|
||||
@@ -1,34 +0,0 @@
|
||||
From 3bb05d0486186400df8ed9ac66cfadcbff7a48a6 Mon Sep 17 00:00:00 2001
|
||||
From: Leah Rowe <leah@libreboot.org>
|
||||
Date: Tue, 6 Jan 2026 21:42:21 +0000
|
||||
Subject: [PATCH 1/1] topton x2e n150: use old fsp
|
||||
|
||||
i added the old fsp back, so that we didn't have to
|
||||
mess around with vendor files in lbmk, because coreboot
|
||||
upstream updated the fsp repo, which modified this
|
||||
fsp file.
|
||||
|
||||
we know the old fsp worked. there's no point testing
|
||||
the new one yet, unless someone can tell me about
|
||||
real bugs that got fixed.
|
||||
|
||||
Signed-off-by: Leah Rowe <leah@libreboot.org>
|
||||
---
|
||||
src/soc/intel/alderlake/Kconfig | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
|
||||
index e9c56fc6b9..43cd6f8efe 100644
|
||||
--- a/src/soc/intel/alderlake/Kconfig
|
||||
+++ b/src/soc/intel/alderlake/Kconfig
|
||||
@@ -438,6 +438,7 @@ config FSP_FD_PATH
|
||||
default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/FSP.fd" if FSP_TYPE_IOT && SOC_INTEL_RAPTORLAKE_PCH_S
|
||||
default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Fsp.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P
|
||||
default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeS/Fsp.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_S
|
||||
+ default "3rdparty/fspcc36ae2b5775fa7400cb3282680afc0f6cb37a3c/AlderLakeFspBinPkg/IoT/AlderLakeN/Fsp.fd" if BOARD_TOPTON_X2E_N150
|
||||
default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Fsp.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_N
|
||||
default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P
|
||||
default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeS/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_S
|
||||
--
|
||||
2.47.3
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
|
||||
tree="default"
|
||||
rev="fcd716d9a272461da1fdbaf1c048eb5a52c7896b"
|
||||
rev="c247f62749b967143e58c33aa0e5e234711a628f"
|
||||
|
||||
@@ -16,13 +16,11 @@ CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_IWYU is not set
|
||||
# CONFIG_FMD_GENPARSER is not set
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
# CONFIG_OPTION_BACKEND_NONE is not set
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_OPTION_BACKEND_NONE=y
|
||||
# CONFIG_USE_OPTION_TABLE is not set
|
||||
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -115,9 +113,10 @@ CONFIG_VENDOR_DELL=y
|
||||
# CONFIG_VENDOR_TOPTON is not set
|
||||
# CONFIG_VENDOR_UP is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
|
||||
CONFIG_MAINBOARD_VERSION="1.0"
|
||||
CONFIG_MAINBOARD_DIR="dell/sklkbl_desktops"
|
||||
CONFIG_MAINBOARD_DIR="dell/optiplex_3050"
|
||||
CONFIG_VGA_BIOS_ID="8086,0406"
|
||||
CONFIG_DIMM_MAX=4
|
||||
CONFIG_DIMM_SPD_SIZE=512
|
||||
@@ -133,8 +132,7 @@ CONFIG_MAX_CPUS=16
|
||||
CONFIG_POST_DEVICE=y
|
||||
CONFIG_POST_IO=y
|
||||
CONFIG_UART_FOR_CONSOLE=0
|
||||
CONFIG_VARIANT_DIR="optiplex_3050"
|
||||
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
|
||||
CONFIG_OVERRIDE_DEVICETREE=""
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
# CONFIG_VBOOT is not set
|
||||
# CONFIG_VGA_BIOS is not set
|
||||
@@ -146,25 +144,24 @@ CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
|
||||
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
|
||||
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
|
||||
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
||||
# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_USE_PM_ACPI_TIMER=y
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_USE_PM_ACPI_TIMER=y
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_3050=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_3050=y
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -179,7 +176,6 @@ CONFIG_BOARD_DELL_OPTIPLEX_3050=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
|
||||
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
|
||||
# CONFIG_BOARD_DELL_XPS_8300 is not set
|
||||
CONFIG_BOARD_DELL_SKLKBL_DESKTOPS_COMMON=y
|
||||
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
|
||||
@@ -209,7 +205,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -253,7 +252,6 @@ CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
||||
CONFIG_ACPI_BERT_SIZE=0x0
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
|
||||
CONFIG_ACPI_CPU_STRING="CP%02X"
|
||||
@@ -271,6 +269,7 @@ CONFIG_SOC_INTEL_I2C_DEV_MAX=6
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
|
||||
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
|
||||
CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
|
||||
CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
|
||||
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
|
||||
CONFIG_INTEL_GMA_BCLV_WIDTH=16
|
||||
@@ -288,8 +287,6 @@ CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
|
||||
CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
|
||||
CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
|
||||
CONFIG_SOC_INTEL_KABYLAKE=y
|
||||
CONFIG_SKYLAKE_SOC_PCH_H=y
|
||||
@@ -299,7 +296,7 @@ CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
|
||||
CONFIG_FSP_T_LOCATION=0xfffe0000
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
CONFIG_SOC_INTEL_COMMON=y
|
||||
|
||||
#
|
||||
@@ -437,6 +434,7 @@ CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -486,6 +484,7 @@ CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_UDK_BASE=y
|
||||
CONFIG_UDK_2017_BINDING=y
|
||||
CONFIG_UDK_2013_VERSION=2013
|
||||
@@ -505,6 +504,7 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -552,7 +552,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -568,8 +567,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR4=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
@@ -577,8 +574,8 @@ CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
@@ -616,7 +613,6 @@ CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
|
||||
CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
|
||||
# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
|
||||
# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
|
||||
CONFIG_FSP_VGA_MODE12_BPP=0x0
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
|
||||
# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
|
||||
|
||||
@@ -16,13 +16,11 @@ CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_IWYU is not set
|
||||
# CONFIG_FMD_GENPARSER is not set
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
# CONFIG_OPTION_BACKEND_NONE is not set
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_OPTION_BACKEND_NONE=y
|
||||
# CONFIG_USE_OPTION_TABLE is not set
|
||||
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -115,9 +113,10 @@ CONFIG_VENDOR_DELL=y
|
||||
# CONFIG_VENDOR_TOPTON is not set
|
||||
# CONFIG_VENDOR_UP is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
|
||||
CONFIG_MAINBOARD_VERSION="1.0"
|
||||
CONFIG_MAINBOARD_DIR="dell/sklkbl_desktops"
|
||||
CONFIG_MAINBOARD_DIR="dell/optiplex_3050"
|
||||
CONFIG_VGA_BIOS_ID="8086,0406"
|
||||
CONFIG_DIMM_MAX=4
|
||||
CONFIG_DIMM_SPD_SIZE=512
|
||||
@@ -131,8 +130,7 @@ CONFIG_MAX_CPUS=16
|
||||
CONFIG_POST_DEVICE=y
|
||||
CONFIG_POST_IO=y
|
||||
CONFIG_UART_FOR_CONSOLE=0
|
||||
CONFIG_VARIANT_DIR="optiplex_3050"
|
||||
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
|
||||
CONFIG_OVERRIDE_DEVICETREE=""
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
# CONFIG_VBOOT is not set
|
||||
# CONFIG_VGA_BIOS is not set
|
||||
@@ -144,25 +142,24 @@ CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
|
||||
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
|
||||
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
|
||||
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
||||
# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_USE_PM_ACPI_TIMER=y
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_USE_PM_ACPI_TIMER=y
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_3050=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_3050=y
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -177,7 +174,6 @@ CONFIG_BOARD_DELL_OPTIPLEX_3050=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
|
||||
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
|
||||
# CONFIG_BOARD_DELL_XPS_8300 is not set
|
||||
CONFIG_BOARD_DELL_SKLKBL_DESKTOPS_COMMON=y
|
||||
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
|
||||
@@ -207,7 +203,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -251,7 +250,6 @@ CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
||||
CONFIG_ACPI_BERT_SIZE=0x0
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
|
||||
CONFIG_ACPI_CPU_STRING="CP%02X"
|
||||
@@ -269,6 +267,7 @@ CONFIG_SOC_INTEL_I2C_DEV_MAX=6
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
|
||||
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
|
||||
CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
|
||||
CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
|
||||
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
|
||||
CONFIG_INTEL_GMA_BCLV_WIDTH=16
|
||||
@@ -286,8 +285,6 @@ CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
|
||||
CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
|
||||
CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
|
||||
CONFIG_SOC_INTEL_KABYLAKE=y
|
||||
CONFIG_SKYLAKE_SOC_PCH_H=y
|
||||
@@ -297,7 +294,7 @@ CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
|
||||
CONFIG_FSP_T_LOCATION=0xfffe0000
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
CONFIG_SOC_INTEL_COMMON=y
|
||||
|
||||
#
|
||||
@@ -435,6 +432,7 @@ CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -484,6 +482,7 @@ CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_UDK_BASE=y
|
||||
CONFIG_UDK_2017_BINDING=y
|
||||
CONFIG_UDK_2013_VERSION=2013
|
||||
@@ -503,6 +502,7 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -544,7 +544,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -560,8 +559,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR4=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
@@ -569,8 +566,8 @@ CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
@@ -608,7 +605,6 @@ CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
|
||||
CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
|
||||
# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
|
||||
# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
|
||||
CONFIG_FSP_VGA_MODE12_BPP=0x0
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
|
||||
# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
|
||||
|
||||
@@ -6,8 +6,8 @@ payload_seabios="y"
|
||||
payload_grub="y"
|
||||
payload_memtest="y"
|
||||
grub_scan_disk="nvme ahci"
|
||||
grubtree="xhci_nvme"
|
||||
grubtree="xhci"
|
||||
vcfg="3050micro"
|
||||
build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot"
|
||||
build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
|
||||
IFD_platform="sklkbl"
|
||||
payload_uboot="amd64"
|
||||
payload_uboot_amd64="y"
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -150,19 +149,19 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Precision T1650"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -211,7 +210,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
@@ -252,9 +254,8 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -273,11 +274,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -300,6 +299,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -384,6 +384,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -395,6 +396,7 @@ CONFIG_HAVE_X86_64_SUPPORT=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -434,7 +436,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -453,16 +454,14 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_USE_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
@@ -699,7 +698,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci"
|
||||
grubtree="nvme"
|
||||
vcfg="t1650"
|
||||
build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
|
||||
payload_uboot="amd64"
|
||||
payload_uboot_amd64="y"
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -150,18 +149,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -208,7 +207,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -248,7 +250,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -265,11 +266,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -297,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -360,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -373,6 +374,7 @@ CONFIG_AP_IN_SIPI_WAIT=y
|
||||
CONFIG_SIPI_VECTOR_IN_ROM=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -414,7 +416,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -433,17 +434,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_DRAM_SUPPORT_DDR2=y
|
||||
CONFIG_USE_DDR3=y
|
||||
CONFIG_USE_DDR2=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
CONFIG_MRC_STASH_TO_CBMEM=y
|
||||
@@ -669,7 +668,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -148,18 +147,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -206,7 +205,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -246,7 +248,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -263,11 +264,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -295,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -358,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -371,6 +372,7 @@ CONFIG_AP_IN_SIPI_WAIT=y
|
||||
CONFIG_SIPI_VECTOR_IN_ROM=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -410,7 +412,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -429,17 +430,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_DRAM_SUPPORT_DDR2=y
|
||||
CONFIG_USE_DDR3=y
|
||||
CONFIG_USE_DDR2=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
CONFIG_MRC_STASH_TO_CBMEM=y
|
||||
@@ -665,7 +664,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -8,4 +8,4 @@ payload_memtest="y"
|
||||
grub_scan_disk="nvme ahci ata"
|
||||
grubtree="nvme"
|
||||
build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
|
||||
payload_uboot="amd64"
|
||||
payload_uboot_amd64="y"
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -150,18 +149,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -208,7 +207,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -248,7 +250,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -265,11 +266,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -297,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -360,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -373,6 +374,7 @@ CONFIG_AP_IN_SIPI_WAIT=y
|
||||
CONFIG_SIPI_VECTOR_IN_ROM=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -414,7 +416,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -433,17 +434,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_DRAM_SUPPORT_DDR2=y
|
||||
CONFIG_USE_DDR3=y
|
||||
CONFIG_USE_DDR2=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
CONFIG_MRC_STASH_TO_CBMEM=y
|
||||
@@ -669,7 +668,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -148,18 +147,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -206,7 +205,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -246,7 +248,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -263,11 +264,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -295,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -358,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -371,6 +372,7 @@ CONFIG_AP_IN_SIPI_WAIT=y
|
||||
CONFIG_SIPI_VECTOR_IN_ROM=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -410,7 +412,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -429,17 +430,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_DRAM_SUPPORT_DDR2=y
|
||||
CONFIG_USE_DDR3=y
|
||||
CONFIG_USE_DDR2=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
CONFIG_MRC_STASH_TO_CBMEM=y
|
||||
@@ -665,7 +664,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -8,4 +8,4 @@ payload_memtest="y"
|
||||
grub_scan_disk="nvme ahci ata"
|
||||
grubtree="nvme"
|
||||
build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
|
||||
payload_uboot="amd64"
|
||||
payload_uboot_amd64="y"
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -150,18 +149,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -208,7 +207,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -248,7 +250,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -265,11 +266,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -297,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -360,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -373,6 +374,7 @@ CONFIG_AP_IN_SIPI_WAIT=y
|
||||
CONFIG_SIPI_VECTOR_IN_ROM=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -414,7 +416,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -433,17 +434,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_DRAM_SUPPORT_DDR2=y
|
||||
CONFIG_USE_DDR3=y
|
||||
CONFIG_USE_DDR2=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
CONFIG_MRC_STASH_TO_CBMEM=y
|
||||
@@ -669,7 +668,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -148,18 +147,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -206,7 +205,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -246,7 +248,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -263,11 +264,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -295,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -358,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -371,6 +372,7 @@ CONFIG_AP_IN_SIPI_WAIT=y
|
||||
CONFIG_SIPI_VECTOR_IN_ROM=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -410,7 +412,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -429,17 +430,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_DRAM_SUPPORT_DDR2=y
|
||||
CONFIG_USE_DDR3=y
|
||||
CONFIG_USE_DDR2=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
CONFIG_MRC_STASH_TO_CBMEM=y
|
||||
@@ -665,7 +664,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -8,4 +8,4 @@ payload_memtest="y"
|
||||
grub_scan_disk="nvme ahci ata"
|
||||
grubtree="nvme"
|
||||
build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
|
||||
payload_uboot="amd64"
|
||||
payload_uboot_amd64="y"
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -150,18 +149,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -208,7 +207,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -248,7 +250,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -265,11 +266,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -297,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -360,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -373,6 +374,7 @@ CONFIG_AP_IN_SIPI_WAIT=y
|
||||
CONFIG_SIPI_VECTOR_IN_ROM=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -414,7 +416,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -433,17 +434,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_DRAM_SUPPORT_DDR2=y
|
||||
CONFIG_USE_DDR3=y
|
||||
CONFIG_USE_DDR2=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
CONFIG_MRC_STASH_TO_CBMEM=y
|
||||
@@ -669,7 +668,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -148,18 +147,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -206,7 +205,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -246,7 +248,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -263,11 +264,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -295,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -358,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -371,6 +372,7 @@ CONFIG_AP_IN_SIPI_WAIT=y
|
||||
CONFIG_SIPI_VECTOR_IN_ROM=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -410,7 +412,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -429,17 +430,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_DRAM_SUPPORT_DDR2=y
|
||||
CONFIG_USE_DDR3=y
|
||||
CONFIG_USE_DDR2=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
CONFIG_MRC_STASH_TO_CBMEM=y
|
||||
@@ -665,7 +664,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -8,4 +8,4 @@ payload_memtest="y"
|
||||
grub_scan_disk="nvme ahci ata"
|
||||
grubtree="nvme"
|
||||
build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
|
||||
payload_uboot="amd64"
|
||||
payload_uboot_amd64="y"
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -151,19 +150,19 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -208,7 +207,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
@@ -250,7 +252,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
|
||||
CONFIG_EHCI_BAR=0xe8000000
|
||||
@@ -271,11 +272,9 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_DISABLE_ME_PCI=y
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -298,6 +297,7 @@ CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -369,6 +369,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -379,6 +380,7 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -420,7 +422,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -436,16 +437,14 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_USE_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
@@ -685,7 +684,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -149,19 +148,19 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -206,7 +205,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
@@ -248,7 +250,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
|
||||
CONFIG_EHCI_BAR=0xe8000000
|
||||
@@ -269,11 +270,9 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_DISABLE_ME_PCI=y
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -296,6 +295,7 @@ CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -367,6 +367,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -377,6 +378,7 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -416,7 +418,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -432,16 +433,14 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_USE_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
@@ -682,7 +681,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -6,7 +6,7 @@ payload_seabios="y"
|
||||
payload_grub="y"
|
||||
payload_memtest="y"
|
||||
grub_scan_disk="nvme ahci"
|
||||
grubtree="xhci_nvme"
|
||||
grubtree="xhci"
|
||||
vcfg="haswell"
|
||||
build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot"
|
||||
payload_uboot="amd64"
|
||||
build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
|
||||
payload_uboot_amd64="y"
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -151,19 +150,19 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -208,7 +207,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
@@ -250,7 +252,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
|
||||
CONFIG_EHCI_BAR=0xe8000000
|
||||
@@ -271,11 +272,9 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_DISABLE_ME_PCI=y
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -298,6 +297,7 @@ CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -369,6 +369,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -379,6 +380,7 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -420,7 +422,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -436,16 +437,14 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_USE_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
@@ -685,7 +684,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -149,19 +148,19 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -206,7 +205,10 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
@@ -248,7 +250,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
|
||||
CONFIG_EHCI_BAR=0xe8000000
|
||||
@@ -269,11 +270,9 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_DISABLE_ME_PCI=y
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -296,6 +295,7 @@ CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -367,6 +367,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -377,6 +378,7 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -416,7 +418,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -432,16 +433,14 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_USE_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
@@ -682,7 +681,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -6,7 +6,7 @@ payload_seabios="y"
|
||||
payload_grub="y"
|
||||
payload_memtest="y"
|
||||
grub_scan_disk="nvme ahci"
|
||||
grubtree="xhci_nvme"
|
||||
grubtree="xhci"
|
||||
vcfg="haswell"
|
||||
build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot"
|
||||
payload_uboot="amd64"
|
||||
build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
|
||||
payload_uboot_amd64="y"
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -149,18 +148,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
CONFIG_BOARD_DELL_E4300=y
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -204,7 +203,10 @@ CONFIG_D3COLD_SUPPORT=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_4096=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -246,7 +248,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -263,11 +264,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -293,6 +292,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -357,6 +357,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -369,6 +370,7 @@ CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_AP_IN_SIPI_WAIT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -410,7 +412,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -429,17 +430,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_DRAM_SUPPORT_DDR2=y
|
||||
CONFIG_USE_DDR3=y
|
||||
CONFIG_USE_DDR2=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
# CONFIG_SMMSTORE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
@@ -646,7 +645,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -147,18 +146,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
CONFIG_BOARD_DELL_E4300=y
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -202,7 +201,10 @@ CONFIG_D3COLD_SUPPORT=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_4096=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -244,7 +246,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -261,11 +262,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
# CONFIG_PCIEXP_COMMON_CLOCK is not set
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -291,6 +290,7 @@ CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_SETUP_XIP_CACHE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
@@ -355,6 +355,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -367,6 +368,7 @@ CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_AP_IN_SIPI_WAIT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -406,7 +408,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -425,17 +426,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_DRAM_SUPPORT_DDR2=y
|
||||
CONFIG_USE_DDR3=y
|
||||
CONFIG_USE_DDR2=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
# CONFIG_SMMSTORE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
@@ -642,7 +641,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -6,4 +6,4 @@ payload_seabios="y"
|
||||
payload_grub="y"
|
||||
payload_memtest="y"
|
||||
grub_scan_disk="ahci"
|
||||
payload_uboot="amd64"
|
||||
payload_uboot_amd64="y"
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -150,18 +149,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5420"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
CONFIG_BOARD_DELL_LATITUDE_E5420=y
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -205,7 +204,10 @@ CONFIG_D3COLD_SUPPORT=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_6144=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -247,9 +249,8 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -268,11 +269,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -295,6 +294,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -378,6 +378,7 @@ CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -389,6 +390,7 @@ CONFIG_HAVE_X86_64_SUPPORT=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -430,7 +432,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -449,16 +450,14 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_USE_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
@@ -666,7 +665,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -148,18 +147,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5420"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
CONFIG_BOARD_DELL_LATITUDE_E5420=y
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -203,7 +202,10 @@ CONFIG_D3COLD_SUPPORT=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_6144=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -245,9 +247,8 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -266,11 +267,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -293,6 +292,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -376,6 +376,7 @@ CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -387,6 +388,7 @@ CONFIG_HAVE_X86_64_SUPPORT=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -426,7 +428,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -445,16 +446,14 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_USE_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
@@ -663,7 +662,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -7,4 +7,4 @@ payload_grub="y"
|
||||
payload_memtest="y"
|
||||
grub_scan_disk="ahci"
|
||||
vcfg="sandybridge"
|
||||
payload_uboot="amd64"
|
||||
payload_uboot_amd64="y"
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -150,18 +149,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5520"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
CONFIG_BOARD_DELL_LATITUDE_E5520=y
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -205,7 +204,10 @@ CONFIG_D3COLD_SUPPORT=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_6144=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -247,9 +249,8 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -268,11 +269,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -295,6 +294,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -378,6 +378,7 @@ CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -389,6 +390,7 @@ CONFIG_HAVE_X86_64_SUPPORT=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -430,7 +432,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -449,16 +450,14 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_USE_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
@@ -666,7 +665,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -148,18 +147,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5520"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
CONFIG_BOARD_DELL_LATITUDE_E5520=y
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -203,7 +202,10 @@ CONFIG_D3COLD_SUPPORT=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_6144=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -245,9 +247,8 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -266,11 +267,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -293,6 +292,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -376,6 +376,7 @@ CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -387,6 +388,7 @@ CONFIG_HAVE_X86_64_SUPPORT=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -426,7 +428,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -445,16 +446,14 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_USE_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
@@ -663,7 +662,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -7,4 +7,4 @@ payload_grub="y"
|
||||
payload_memtest="y"
|
||||
grub_scan_disk="ahci"
|
||||
vcfg="sandybridge"
|
||||
payload_uboot="amd64"
|
||||
payload_uboot_amd64="y"
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -150,18 +149,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5530"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -205,7 +204,10 @@ CONFIG_D3COLD_SUPPORT=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -247,9 +249,8 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -268,11 +269,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -295,6 +294,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -378,6 +378,7 @@ CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -389,6 +390,7 @@ CONFIG_HAVE_X86_64_SUPPORT=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -430,7 +432,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -449,16 +450,14 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_USE_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
@@ -666,7 +665,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -148,18 +147,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5530"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
|
||||
@@ -203,7 +202,10 @@ CONFIG_D3COLD_SUPPORT=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -245,9 +247,8 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -266,11 +267,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -293,6 +292,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -376,6 +376,7 @@ CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -387,6 +388,7 @@ CONFIG_HAVE_X86_64_SUPPORT=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -426,7 +428,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -445,16 +446,14 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_USE_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
@@ -663,7 +662,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
@@ -7,4 +7,4 @@ payload_grub="y"
|
||||
payload_memtest="y"
|
||||
grub_scan_disk="ahci"
|
||||
vcfg="ivybridge"
|
||||
payload_uboot="amd64"
|
||||
payload_uboot_amd64="y"
|
||||
|
||||
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_STATIC_OPTION_TABLE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
# CONFIG_COMPRESS_RAMSTAGE_ZSTD is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
@@ -150,18 +149,18 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6220"
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_E4300 is not set
|
||||
# CONFIG_BOARD_DELL_E6400 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
|
||||
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
|
||||
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
|
||||
CONFIG_BOARD_DELL_LATITUDE_E6220=y
|
||||
@@ -206,7 +205,10 @@ CONFIG_D3COLD_SUPPORT=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
# CONFIG_DRIVERS_EFI_FW_INFO is not set
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
|
||||
CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
|
||||
CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
|
||||
CONFIG_BOARD_ROMSIZE_KB_10240=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
@@ -248,9 +250,8 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
# CONFIG_USE_X86_64_SUPPORT is not set
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
@@ -269,11 +270,9 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_UART_BITBANG_TX_DELAY_MS=5
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
|
||||
#
|
||||
# CPU
|
||||
@@ -296,6 +295,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=4
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@@ -381,6 +381,7 @@ CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
|
||||
# CONFIG_GOOGLE_PVMFW_CBMEM is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
@@ -392,6 +393,7 @@ CONFIG_HAVE_X86_64_SUPPORT=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
@@ -433,7 +435,6 @@ CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_USE_LEGACY_VERB_TABLE=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
@@ -452,16 +453,14 @@ CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
CONFIG_DRAM_SUPPORT_DDR3=y
|
||||
CONFIG_USE_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_DRIVERS_HWID_DMI is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_DRIVERS_OPTION_CFR is not set
|
||||
@@ -669,7 +668,6 @@ CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user