9020 sff/mt: add tpm enable patch from mate kukri

Signed-off-by: Leah Rowe <leah@libreboot.org>
lbmk: export TMPDIR from err.sh, not build
2026-03-25 21:39:03 +02:00 · 2024-04-25 20:18:01 +01:00 · 2024-04-25 19:08:53 +01:00 · 2024-04-25 19:03:43 +01:00 · 2024-04-25 12:47:46 +01:00 · 2024-04-24 05:27:27 +01:00
33 changed files with 297 additions and 83 deletions
--- a/18
+++ b/18
@@ -13,22 +13,10 @@ export LC_ALL=C
 . "include/err.sh"
 . "include/option.sh"

-eval "$(setvars "" option aur_notice tmpdir)"
-err="fail"
+export LBMK_RELEASE="$lbmk_release"

-tmpdir_was_set="y"
-set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
-if [ "${tmpdir_was_set}" = "y" ]; then
-	[ "${TMPDIR%_*}" = "/tmp/lbmk" ] || tmpdir_was_set="n"
-fi
-if [ "${tmpdir_was_set}" = "n" ]; then
-	export TMPDIR="/tmp"
-	tmpdir="$(mktemp -d -t lbmk_XXXXXXXX)"
-	export TMPDIR="${tmpdir}"
-else
-	export TMPDIR="${TMPDIR}"
-	tmpdir="${TMPDIR}"
-fi
+eval "$(setvars "" option aur_notice)"
+err="fail"

 linkpath="${0}"
 linkname="${linkpath##*/}"
--- a/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
+++ b/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
@@ -1,13 +1,13 @@
-From f6340f3fe21e948ba94d0429467882c2fb90b77e Mon Sep 17 00:00:00 2001
+From c58e0fea2a4e591e5ecd8a1f376c3b3af0fbb306 Mon Sep 17 00:00:00 2001
 From: Mate Kukri <kukri.mate@gmail.com>
-Date: Sat, 6 Apr 2024 23:25:15 +0100
+Date: Thu, 18 Apr 2024 20:28:45 +0100
 Subject: [PATCH 1/1] mb/dell/optiplex_9020: Implement late HWM initialization

 There are 4 different chassis types specified by vendor firmware, each
 with a slightly different HWM configuration.

 The chassis type to use is determined at runtime by reading a set of
-4 PCH GPIOs: 70, 38, 17, and 0.
+4 PCH GPIOs: 70, 38, 17, and 1.

 Additionally vendor firmware also provides an option to run the fans at
 full speed. This is substituted with a coreboot nvram option in this
@@ -26,10 +26,10 @@ Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
 src/mainboard/dell/optiplex_9020/bootblock.c  |  25 +-
 src/mainboard/dell/optiplex_9020/cmos.default |   1 +
 src/mainboard/dell/optiplex_9020/cmos.layout  |   5 +-
- src/mainboard/dell/optiplex_9020/mainboard.c  | 382 ++++++++++++++++++
+ src/mainboard/dell/optiplex_9020/mainboard.c  | 387 ++++++++++++++++++
 src/mainboard/dell/optiplex_9020/sch5555_ec.c |  54 +++
- src/mainboard/dell/optiplex_9020/sch5555_ec.h |   7 +
- 7 files changed, 455 insertions(+), 22 deletions(-)
+ src/mainboard/dell/optiplex_9020/sch5555_ec.h |  10 +
+ 7 files changed, 463 insertions(+), 22 deletions(-)
 create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.c
 create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.h

@@ -119,7 +119,7 @@ index 72ff9c4bee..4a1496a878 100644
 # coreboot config options: check sums
 984	16	h	0	check_sum
 diff --git a/src/mainboard/dell/optiplex_9020/mainboard.c b/src/mainboard/dell/optiplex_9020/mainboard.c
-index c834fea5d3..10b8aaca0e 100644
+index c834fea5d3..0b7829c736 100644
 --- a/src/mainboard/dell/optiplex_9020/mainboard.c
 +++ b/src/mainboard/dell/optiplex_9020/mainboard.c
@@ -1,7 +1,12 @@
@@ -130,18 +130,19 @@ index c834fea5d3..10b8aaca0e 100644
 #include <device/device.h>
 #include <drivers/intel/gma/int15.h>
 +#include <option.h>
-+#include <southbridge/intel/lynxpoint/lp_gpio.h>
+#include <southbridge/intel/common/gpio.h>
 +#include "sch5555_ec.h"
 
 static void mainboard_enable(struct device *dev)
 {
-@@ -13,3 +18,380 @@ static void mainboard_enable(struct device *dev)
+@@ -13,3 +18,385 @@ static void mainboard_enable(struct device *dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
 +
-+#define HWM_TAB_ADD_TEMP_TARGET 1
+#define HWM_TAB_ADD_TEMP_TARGET	1
 +#define HWM_TAB_PKG_POWER_ANY	0xffff
+#define CHASSIS_TYPE_UNKNOWN	0xff
 +
 +struct hwm_tab_entry {
 +	uint16_t addr;
@@ -390,7 +391,7 @@ index c834fea5d3..10b8aaca0e 100644
 +
 +	// Read chassis type from GPIO
 +	gpio_chassis_type = get_gpio(70) << 3 | get_gpio(38) << 2 |
-+			    get_gpio(17) << 1 | get_gpio(0);
+			    get_gpio(17) << 1 | get_gpio(1);
 +
 +	printk(BIOS_DEBUG, "GPIO chassis type = %#x\n", gpio_chassis_type);
 +
@@ -408,7 +409,7 @@ index c834fea5d3..10b8aaca0e 100644
 +	case 0x0f:
 +		return 6;
 +	default:
-+		die("Unknown GPIO chassis type\n");
+		return CHASSIS_TYPE_UNKNOWN;
 +	}
 +
 +}
@@ -469,9 +470,15 @@ index c834fea5d3..10b8aaca0e 100644
 +	ec_write(1, 0x2fc, 0xa0);
 +	ec_write(1, 0x2fd, 0x32);
 +
-+	// Apply HWM table based on chassis type
 +	chassis_type = get_chassis_type();
-+	printk(BIOS_DEBUG, "Chassis type = %#x\n", chassis_type);
+
+	if (chassis_type != CHASSIS_TYPE_UNKNOWN) {
+		printk(BIOS_DEBUG, "Chassis type = %#x\n", chassis_type);
+	} else {
+		printk(BIOS_DEBUG, "WARNING: Unknown chassis type\n");
+	}
+
+	// Apply HWM table based on chassis type
 +	switch (chassis_type) {
 +	case 3:
 +		apply_hwm_tab(HWM_TAB3, ARRAY_SIZE(HWM_TAB3));
@@ -485,19 +492,17 @@ index c834fea5d3..10b8aaca0e 100644
 +	case 6:
 +		apply_hwm_tab(HWM_TAB6, ARRAY_SIZE(HWM_TAB6));
 +		break;
-+	default:
-+		die("Unknown chassis type\n");
 +	}
 +
-+	if (CONFIG_MAX_CPUS > 2) {
-+		ec_write(1, 0x9e, 0x30);
-+		ec_write(1, 0xeb, ec_read(1, 0xea));
-+	}
+	// NOTE: vendor firmware applies these when "max core address" > 2
+	// i think this is always the case
+	ec_write(1, 0x9e, 0x30);
+	ec_write(1, 0xeb, ec_read(1, 0xea));
 +
 +	ec_write(1, 0x2fc, saved_2fc);
 +
-+	// Apply full speed fan config if requested
-+	if (get_uint_option("fan_full_speed", 0)) {
+	// Apply full speed fan config if requested or if the chassis type is unknown
+	if (chassis_type == CHASSIS_TYPE_UNKNOWN || get_uint_option("fan_full_speed", 0)) {
 +		printk(BIOS_DEBUG, "Setting full fan speed\n");
 +		ec_write(1, 0x80, 0x60 | ec_read(1, 0x80));
 +		ec_write(1, 0x81, 0x60 | ec_read(1, 0x81));
@@ -518,7 +523,7 @@ index c834fea5d3..10b8aaca0e 100644
 +BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
 diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.c b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
 new file mode 100644
-index 0000000000..92244da9ab
+index 0000000000..a1067ac063
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
@@ -0,0 +1,54 @@
@@ -546,7 +551,7 @@ index 0000000000..92244da9ab
 +	outb(1, SCH555x_EMI_IOBASE);
 +
 +	// wait for ack
-+	for (size_t timeout = 0; timeout < 0xfff; ++timeout)
+	for (size_t retry = 0; retry < 0xfff; ++retry)
 +		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
 +			break;
 +
@@ -572,23 +577,26 @@ index 0000000000..92244da9ab
 +	outb(1, SCH555x_EMI_IOBASE);
 +
 +	// wait for ack
-+	for (size_t timeout = 0; timeout < 0xfff; ++timeout)
+	for (size_t retry = 0; retry < 0xfff; ++retry)
 +		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
 +			break;
 +}
 diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.h b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
 new file mode 100644
-index 0000000000..6e703ff865
+index 0000000000..7e399e8e74
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
-@@ -0,0 +1,7 @@
+@@ -0,0 +1,10 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
 +
-+#pragma once
+#ifndef __SCH5555_EC_H__
+#define __SCH5555_EC_H__
 +
 +uint8_t ec_read(uint8_t addr1, uint16_t addr2);
 +
 +void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val);
+
+#endif
 -- 
 2.39.2

--- a/config/coreboot/default/patches/0043-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
+++ b/config/coreboot/default/patches/0043-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
@@ -0,0 +1,49 @@
+From cd3c553a313a26494e5dc31ff8323c3a919f190a Mon Sep 17 00:00:00 2001
+From: Mate Kukri <kukri.mate@gmail.com>
+Date: Wed, 10 Apr 2024 20:31:35 +0100
+Subject: [PATCH 1/1] mb/dell/optiplex_9020: Add support for TPM1.2 device
+
+These machines come with a TPM1.2 device by default. It is somewhat
+obsolete these days, but there is no harm in enabling it.
+
+Change-Id: Iec05321862aed58695c256b00494e5953219786d
+Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
+Reviewed-on: https://review.coreboot.org/c/coreboot/+/81827
+Reviewed-by: Angel Pons <th3fanbus@gmail.com>
+Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
+---
+ src/mainboard/dell/optiplex_9020/Kconfig       | 2 ++
+ src/mainboard/dell/optiplex_9020/devicetree.cb | 3 +++
+ 2 files changed, 5 insertions(+)
+
+diff --git a/src/mainboard/dell/optiplex_9020/Kconfig b/src/mainboard/dell/optiplex_9020/Kconfig
+index 774a72f161..296938aa8d 100644
+--- a/src/mainboard/dell/optiplex_9020/Kconfig
+++ b/src/mainboard/dell/optiplex_9020/Kconfig
+@@ -12,7 +12,9 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select INTEL_GMA_HAVE_VBT
+ 	select INTEL_INT15
+ 	select MAINBOARD_HAS_LIBGFXINIT
+	select MAINBOARD_HAS_TPM1
+ 	select MAINBOARD_USES_IFD_GBE_REGION
+	select MEMORY_MAPPED_TPM
+ 	select NORTHBRIDGE_INTEL_HASWELL
+ 	select SERIRQ_CONTINUOUS_MODE
+ 	select SOUTHBRIDGE_INTEL_LYNXPOINT
+diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb
+index 7bfa6736a6..e5cbd64127 100644
+--- a/src/mainboard/dell/optiplex_9020/devicetree.cb
+++ b/src/mainboard/dell/optiplex_9020/devicetree.cb
+@@ -70,6 +70,9 @@ chip northbridge/intel/haswell
+ 					device pnp 2e.b  off end	# Floppy Controller
+ 					device pnp 2e.11 off end	# Parallel Port
+ 				end
+				chip drivers/pc80/tpm
+					device pnp 0c31.0 on end
+				end
+ 			end
+ 			device pci 1f.2 on  end				# SATA controller 1
+ 			device pci 1f.3 on  end				# SMBus
+-- 
+2.39.2
+
--- a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
@@ -447,6 +448,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
 CONFIG_DRIVERS_MTK_WIFI=y
@@ -471,6 +474,9 @@ CONFIG_DRIVERS_MTK_WIFI=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
--- a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
@@ -443,6 +444,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
@@ -468,6 +471,9 @@ CONFIG_DRIVERS_MTK_WIFI=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
@@ -135,6 +135,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -458,6 +459,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
@@ -481,6 +484,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
@@ -133,6 +133,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -454,6 +455,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
@@ -478,6 +481,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
--- a/config/coreboot/dell9020mt_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
--- a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb
@@ -135,6 +135,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -458,6 +459,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
@@ -481,6 +484,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
--- a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode
@@ -133,6 +133,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -454,6 +455,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
@@ -478,6 +481,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
--- a/config/coreboot/dell9020mtbmrc_12mb/target.cfg
+++ b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
--- a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
@@ -447,6 +448,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
 CONFIG_DRIVERS_MTK_WIFI=y
@@ -471,6 +474,9 @@ CONFIG_DRIVERS_MTK_WIFI=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
--- a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
@@ -443,6 +444,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
@@ -468,6 +471,9 @@ CONFIG_DRIVERS_MTK_WIFI=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
--- a/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
@@ -135,6 +135,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -458,6 +459,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
@@ -481,6 +484,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
--- a/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
@@ -133,6 +133,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -454,6 +455,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
@@ -478,6 +481,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
--- a/config/coreboot/dell9020sff_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
--- a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb
@@ -135,6 +135,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -458,6 +459,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
@@ -481,6 +484,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
--- a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode
@@ -133,6 +133,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -454,6 +455,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
@@ -478,6 +481,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
--- a/config/coreboot/dell9020sffbmrc_12mb/target.cfg
+++ b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
--- a/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
+++ b/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
@@ -1,13 +1,13 @@
-From 08bae51a77c2c92fefef79e9c9b6ff963b3812cc Mon Sep 17 00:00:00 2001
+From 05cc767d1398f91533e87db5ceaa0aabb7918425 Mon Sep 17 00:00:00 2001
 From: Mate Kukri <kukri.mate@gmail.com>
-Date: Sat, 6 Apr 2024 23:25:15 +0100
-Subject: [PATCH 3/4] mb/dell/optiplex_9020: Implement late HWM initialization
+Date: Thu, 18 Apr 2024 20:28:45 +0100
+Subject: [PATCH 1/1] mb/dell/optiplex_9020: Implement late HWM initialization

 There are 4 different chassis types specified by vendor firmware, each
 with a slightly different HWM configuration.

 The chassis type to use is determined at runtime by reading a set of
-4 PCH GPIOs: 70, 38, 17, and 0.
+4 PCH GPIOs: 70, 38, 17, and 1.

 Additionally vendor firmware also provides an option to run the fans at
 full speed. This is substituted with a coreboot nvram option in this
@@ -26,10 +26,10 @@ Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
 src/mainboard/dell/optiplex_9020/bootblock.c  |  25 +-
 src/mainboard/dell/optiplex_9020/cmos.default |   1 +
 src/mainboard/dell/optiplex_9020/cmos.layout  |   5 +-
- src/mainboard/dell/optiplex_9020/mainboard.c  | 382 ++++++++++++++++++
+ src/mainboard/dell/optiplex_9020/mainboard.c  | 387 ++++++++++++++++++
 src/mainboard/dell/optiplex_9020/sch5555_ec.c |  54 +++
- src/mainboard/dell/optiplex_9020/sch5555_ec.h |   7 +
- 7 files changed, 455 insertions(+), 22 deletions(-)
+ src/mainboard/dell/optiplex_9020/sch5555_ec.h |  10 +
+ 7 files changed, 463 insertions(+), 22 deletions(-)
 create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.c
 create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.h

@@ -119,7 +119,7 @@ index 72ff9c4bee..4a1496a878 100644
 # coreboot config options: check sums
 984	16	h	0	check_sum
 diff --git a/src/mainboard/dell/optiplex_9020/mainboard.c b/src/mainboard/dell/optiplex_9020/mainboard.c
-index c834fea5d3..10b8aaca0e 100644
+index c834fea5d3..0b7829c736 100644
 --- a/src/mainboard/dell/optiplex_9020/mainboard.c
 +++ b/src/mainboard/dell/optiplex_9020/mainboard.c
@@ -1,7 +1,12 @@
@@ -130,18 +130,19 @@ index c834fea5d3..10b8aaca0e 100644
 #include <device/device.h>
 #include <drivers/intel/gma/int15.h>
 +#include <option.h>
-+#include <southbridge/intel/lynxpoint/lp_gpio.h>
+#include <southbridge/intel/common/gpio.h>
 +#include "sch5555_ec.h"
 
 static void mainboard_enable(struct device *dev)
 {
-@@ -13,3 +18,380 @@ static void mainboard_enable(struct device *dev)
+@@ -13,3 +18,385 @@ static void mainboard_enable(struct device *dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
 +
-+#define HWM_TAB_ADD_TEMP_TARGET 1
+#define HWM_TAB_ADD_TEMP_TARGET	1
 +#define HWM_TAB_PKG_POWER_ANY	0xffff
+#define CHASSIS_TYPE_UNKNOWN	0xff
 +
 +struct hwm_tab_entry {
 +	uint16_t addr;
@@ -390,7 +391,7 @@ index c834fea5d3..10b8aaca0e 100644
 +
 +	// Read chassis type from GPIO
 +	gpio_chassis_type = get_gpio(70) << 3 | get_gpio(38) << 2 |
-+			    get_gpio(17) << 1 | get_gpio(0);
+			    get_gpio(17) << 1 | get_gpio(1);
 +
 +	printk(BIOS_DEBUG, "GPIO chassis type = %#x\n", gpio_chassis_type);
 +
@@ -408,7 +409,7 @@ index c834fea5d3..10b8aaca0e 100644
 +	case 0x0f:
 +		return 6;
 +	default:
-+		die("Unknown GPIO chassis type\n");
+		return CHASSIS_TYPE_UNKNOWN;
 +	}
 +
 +}
@@ -469,9 +470,15 @@ index c834fea5d3..10b8aaca0e 100644
 +	ec_write(1, 0x2fc, 0xa0);
 +	ec_write(1, 0x2fd, 0x32);
 +
-+	// Apply HWM table based on chassis type
 +	chassis_type = get_chassis_type();
-+	printk(BIOS_DEBUG, "Chassis type = %#x\n", chassis_type);
+
+	if (chassis_type != CHASSIS_TYPE_UNKNOWN) {
+		printk(BIOS_DEBUG, "Chassis type = %#x\n", chassis_type);
+	} else {
+		printk(BIOS_DEBUG, "WARNING: Unknown chassis type\n");
+	}
+
+	// Apply HWM table based on chassis type
 +	switch (chassis_type) {
 +	case 3:
 +		apply_hwm_tab(HWM_TAB3, ARRAY_SIZE(HWM_TAB3));
@@ -485,19 +492,17 @@ index c834fea5d3..10b8aaca0e 100644
 +	case 6:
 +		apply_hwm_tab(HWM_TAB6, ARRAY_SIZE(HWM_TAB6));
 +		break;
-+	default:
-+		die("Unknown chassis type\n");
 +	}
 +
-+	if (CONFIG_MAX_CPUS > 2) {
-+		ec_write(1, 0x9e, 0x30);
-+		ec_write(1, 0xeb, ec_read(1, 0xea));
-+	}
+	// NOTE: vendor firmware applies these when "max core address" > 2
+	// i think this is always the case
+	ec_write(1, 0x9e, 0x30);
+	ec_write(1, 0xeb, ec_read(1, 0xea));
 +
 +	ec_write(1, 0x2fc, saved_2fc);
 +
-+	// Apply full speed fan config if requested
-+	if (get_uint_option("fan_full_speed", 0)) {
+	// Apply full speed fan config if requested or if the chassis type is unknown
+	if (chassis_type == CHASSIS_TYPE_UNKNOWN || get_uint_option("fan_full_speed", 0)) {
 +		printk(BIOS_DEBUG, "Setting full fan speed\n");
 +		ec_write(1, 0x80, 0x60 | ec_read(1, 0x80));
 +		ec_write(1, 0x81, 0x60 | ec_read(1, 0x81));
@@ -518,7 +523,7 @@ index c834fea5d3..10b8aaca0e 100644
 +BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
 diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.c b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
 new file mode 100644
-index 0000000000..92244da9ab
+index 0000000000..a1067ac063
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
@@ -0,0 +1,54 @@
@@ -546,7 +551,7 @@ index 0000000000..92244da9ab
 +	outb(1, SCH555x_EMI_IOBASE);
 +
 +	// wait for ack
-+	for (size_t timeout = 0; timeout < 0xfff; ++timeout)
+	for (size_t retry = 0; retry < 0xfff; ++retry)
 +		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
 +			break;
 +
@@ -572,23 +577,26 @@ index 0000000000..92244da9ab
 +	outb(1, SCH555x_EMI_IOBASE);
 +
 +	// wait for ack
-+	for (size_t timeout = 0; timeout < 0xfff; ++timeout)
+	for (size_t retry = 0; retry < 0xfff; ++retry)
 +		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
 +			break;
 +}
 diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.h b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
 new file mode 100644
-index 0000000000..6e703ff865
+index 0000000000..7e399e8e74
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
-@@ -0,0 +1,7 @@
+@@ -0,0 +1,10 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
 +
-+#pragma once
+#ifndef __SCH5555_EC_H__
+#define __SCH5555_EC_H__
 +
 +uint8_t ec_read(uint8_t addr1, uint16_t addr2);
 +
 +void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val);
+
+#endif
 -- 
 2.39.2

--- a/config/coreboot/haswell/patches/0025-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
+++ b/config/coreboot/haswell/patches/0025-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
@@ -0,0 +1,49 @@
+From 355536155898e649fa50277136ccd2df53a52bb1 Mon Sep 17 00:00:00 2001
+From: Mate Kukri <kukri.mate@gmail.com>
+Date: Wed, 10 Apr 2024 20:31:35 +0100
+Subject: [PATCH 1/1] mb/dell/optiplex_9020: Add support for TPM1.2 device
+
+These machines come with a TPM1.2 device by default. It is somewhat
+obsolete these days, but there is no harm in enabling it.
+
+Change-Id: Iec05321862aed58695c256b00494e5953219786d
+Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
+Reviewed-on: https://review.coreboot.org/c/coreboot/+/81827
+Reviewed-by: Angel Pons <th3fanbus@gmail.com>
+Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
+---
+ src/mainboard/dell/optiplex_9020/Kconfig       | 2 ++
+ src/mainboard/dell/optiplex_9020/devicetree.cb | 3 +++
+ 2 files changed, 5 insertions(+)
+
+diff --git a/src/mainboard/dell/optiplex_9020/Kconfig b/src/mainboard/dell/optiplex_9020/Kconfig
+index 2de4a9abd6..38c3281e70 100644
+--- a/src/mainboard/dell/optiplex_9020/Kconfig
+++ b/src/mainboard/dell/optiplex_9020/Kconfig
+@@ -12,7 +12,9 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select INTEL_GMA_HAVE_VBT
+ 	select INTEL_INT15
+ 	select MAINBOARD_HAS_LIBGFXINIT
+	select MAINBOARD_HAS_TPM1
+ 	select MAINBOARD_USES_IFD_GBE_REGION
+	select MEMORY_MAPPED_TPM
+ 	select NORTHBRIDGE_INTEL_HASWELL
+ 	select SERIRQ_CONTINUOUS_MODE
+ 	select SOUTHBRIDGE_INTEL_LYNXPOINT
+diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb
+index dce5869478..841285bb9c 100644
+--- a/src/mainboard/dell/optiplex_9020/devicetree.cb
+++ b/src/mainboard/dell/optiplex_9020/devicetree.cb
+@@ -70,6 +70,9 @@ chip northbridge/intel/haswell
+ 					device pnp 2e.b  off end	# Floppy Controller
+ 					device pnp 2e.11 off end	# Parallel Port
+ 				end
+				chip drivers/pc80/tpm
+					device pnp 0c31.0 on end
+				end
+ 			end
+ 			device pci 1f.2 on  end				# SATA controller 1
+ 			device pci 1f.3 on  end				# SMBus
+-- 
+2.39.2
+
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
--- a/config/coreboot/t440pbmrc_12mb/target.cfg
+++ b/config/coreboot/t440pbmrc_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
@@ -114,7 +114,7 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xBE0000
+CONFIG_CBFS_SIZE=0x800000
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=8
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
@@ -114,7 +114,7 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xBE0000
+CONFIG_CBFS_SIZE=0x800000
 CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
--- a/config/coreboot/t440pmrc_12mb/target.cfg
+++ b/config/coreboot/t440pmrc_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
--- a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
@@ -33,8 +33,8 @@ CONFIG_USE_BLOBS=y
 CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -114,7 +114,7 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xBE0000
+CONFIG_CBFS_SIZE=0x800000
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=8
--- a/config/coreboot/w541_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
@@ -33,8 +33,8 @@ CONFIG_USE_BLOBS=y
 CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -114,7 +114,7 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xBE0000
+CONFIG_CBFS_SIZE=0x800000
 CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
--- a/config/coreboot/w541bmrc_12mb/target.cfg
+++ b/config/coreboot/w541bmrc_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
--- a/config/coreboot/w541mrc_12mb/target.cfg
+++ b/config/coreboot/w541mrc_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
--- a/include/err.sh
+++ b/include/err.sh
@@ -2,7 +2,28 @@
 # SPDX-FileCopyrightText: 2022, 2023 Leah Rowe <leah@libreboot.org>

 version=""; versiondate=""; projectname=""; _nogit=""
-err="err_"
+err="err_"; tmpdir=""
+
+# if "y": a coreboot target won't be built if target.cfg says release="n"
+# (this is used to exclude certain build targets from releases)
+lbmk_release=
+set | grep LBMK_RELEASE 1>/dev/null 2>/dev/null || lbmk_release="n" || :
+[ -z "$lbmk_release" ] && lbmk_release="$LBMK_RELEASE"
+[ "$lbmk_release" = "n" ] || [ "$lbmk_release" = "y" ] || lbmk_release="n"
+
+tmpdir_was_set="y"
+set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
+if [ "${tmpdir_was_set}" = "y" ]; then
+	[ "${TMPDIR%_*}" = "/tmp/lbmk" ] || tmpdir_was_set="n"
+fi
+if [ "${tmpdir_was_set}" = "n" ]; then
+	export TMPDIR="/tmp"
+	tmpdir="$(mktemp -d -t lbmk_XXXXXXXX)"
+	export TMPDIR="${tmpdir}"
+else
+	export TMPDIR="${TMPDIR}"
+	tmpdir="${TMPDIR}"
+fi

 x_() {
 	[ $# -lt 1 ] || ${@} || $err "Unhandled non-zero exit: $@"; return 0
--- a/script/build/roms
+++ b/script/build/roms
@@ -20,7 +20,7 @@ cfgsdir="config/coreboot"
 # target.cfg files have to specifically enable [a] payload(s)
 pv="payload_grub payload_grub_withseabios payload_seabios payload_memtest t"
 pv="${pv} payload_seabios_withgrub payload_seabios_grubonly payload_uboot memtest_bin"
-v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps"
+v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps release"
 v="${v} grub_timeout ubdir board grub_scan_disk uboot_config"
 eval "$(setvars "n" ${pv})"
 eval "$(setvars "" ${v} boards _displaymode _payload _keyboard all targets)"
@@ -56,6 +56,13 @@ main()
 		grub_background="background1280x800.png"
 		board="${x}"
 		configure_target
+
+		# exclude certain targets from the release
+		if [ "$release" = "n" ] && [ "$lbmk_release" = "y" ]; then
+			printf "Skipping target: %s\n" "$x"
+			continue
+		fi
+
 		build_payloads
 		build_target_mainboard
 		[ -d "bin/${board}" ] || continue
@@ -194,7 +201,8 @@ build_target_mainboard()
 			    [ "$displaymode" != "txtmode" ] && continue
 			cbcfg="${targetdir}/config/${initmode}_${displaymode}"
 			[ "${initmode}" = "normal" ] && cbcfg="${cbcfg%_*}"
-			build_roms "${cbcfg}"	
+			build_roms "${cbcfg}"
+			x_ rm -f "$cbrom"
 		done
 	done
 }
--- a/script/update/release
+++ b/script/update/release
@@ -9,6 +9,8 @@ set -u -e

 eval "$(setvars "" vdir relname src_dirname srcdir _xm target romdir mode)"

+export LBMK_RELEASE="y"
+
 main()
 {
 	vdir="release"
Author	SHA1	Message	Date
Leah Rowe	2d7debd33c	9020 sff/mt: add tpm enable patch from mate kukri Signed-off-by: Leah Rowe <leah@libreboot.org>	2024-04-25 20:18:01 +01:00
Leah Rowe	08859bb4a5	lbmk: export TMPDIR from err.sh, not build lbmk sets TMPDIR to /tmp, and then creates a tmpdir, then exports that as the value of TMPDIR. this unified TMPDIR location then contains all subsequent files and directories, when any script or program makes use of /tmp, via mktemp. at least, that's the theory! in practise, because it was only being properly exported from the main build scripts, subscripts that are then called were not exporting it, at least that is my assumption because in some cases, i found that the coreboot build system was leaving errant files behind outside of our own TMPDIR, and that build system did not seem to be setting TMPDIR itself; more debugging is needed. anyway: use the exact same logic, but do it from err.sh. since err.sh is included from every lbmk script, that means it will always be exported when running every single part of lbmk. this should reduce the chance that mktemp creates files and directories outside of our custom TMPDIR location. this is because in lbmk, we mitigate unhandled tmpdirs/files by unifying it in the manner described, then deleting the entire TMPDIR on exit from the main lbmk parent process (the main script that the user called from, which is always the "build" file). in lbmk, effort is made to clean up temporary files properly, without relying on this catch-all, but we can't rely on that. the catch-all should also be as robust as possible. Signed-off-by: Leah Rowe <leah@libreboot.org>	2024-04-25 19:08:53 +01:00
Leah Rowe	f5f2c58a0e	build/roms: add missing deletion of tmp file the temporary rom per build was not being deleted after finishing the current target. this adds up in /tmp during large builds, when building for many targets. fix this! Signed-off-by: Leah Rowe <leah@libreboot.org>	2024-04-25 19:03:43 +01:00
Leah Rowe	02e4c0b28e	hp820g2: allow building, but don't do release ROMs at present, the inject scripts compress refcode in a way that is not reproducible, so there's no way to verify that the firmware is correct, via checksum verification, when injecting vendor code on release images the lack of reproducibility in recompression will have to be addressed, but the issue is that lbmk does not provide its own sources for compression utilities, instead opting to use the system's own compression utility so the solution might be for lbmk not to use the host's utility, and compile its own, or insert the refcode uncompressed. for now, simply disable the hp 820 g2 target in libreboot releases this uses the same logic recently implemented for excluding mrc-based haswell images in libreboot releases Signed-off-by: Leah Rowe <leah@libreboot.org>	2024-04-25 12:47:46 +01:00
Leah Rowe	ed0678ae2e	haswell: only provide NRI-based ROMs in releases release="n" is set in target.cfg on haswell build targets that use mrc.bin script/update/release exports LBMK_RELEASE="y" script/build/roms skips building a given target if release="n" in target.cfg and LBMK_RELEASE="y" you could also do the export yourself before running ./build roms, for example: export LBMK_RELEASE="y" ./build roms all This would skip these ROM images. The native haswell raminit is now stable enough in my testing, that I wish to delete the MRC-based targets. This is in line with Libreboot's Binary Blob Reduction Policy, which states: if a blob can be avoided, it should be avoided. The problem is that users often run the inject script in lbmk from Git, instead of from the src release archive. I forsee some users running this on modern lbmk with older release images. If the mrc-based target isn't there, the user may use an NRI-based target name, and think it works; they will insert without MRC. I foresaw this ages ago, which is why Caleb and I ensured that the script checks hashes, and hashes are included in releases. Therefore: for the time being, keep the MRC-based configs in lbmk but do not include images for them in releases. This can be done indefinitely, but I'll probably remove those configs entirely at some point. On the following boards, Libreboot now will only provide NRI-based ROM images for the following machines: * Dell OptiPlex 9020 SFF * Dell OptiPlex 9020 MT * Lenovo ThinkPad T440p * Lenovo ThinkPad W541/W540 I now recommend exclusive use of NRI-based images, on Haswell hardware. It's stable enough in my testing, and now supports S3. Signed-off-by: Leah Rowe <leah@libreboot.org>	2024-04-24 05:27:27 +01:00
Leah Rowe	f5035e327a	9020 sff/mt: fix bad gpio read on hwm patch sff happened to work, but mt would not boot with the patch, because it called die() on unknown chassis type, and the gpio happened to have a bad value in the old patch, because it wasn't reading the right gpio. i tested the fix on the old patch, but then decided to use mate's new patch because instead of calling die(), it simply boots with fan control disabled (max fan speed in that case), if this happens again. mt and sff have both been tested with this new version of the patch. both of them boot, and they both have proper fan control. Signed-off-by: Leah Rowe <leah@libreboot.org>	2024-04-21 21:55:57 +01:00
Leah Rowe	523f1df9bf	w541 libremrc: disable tseg stage cache a hangover from earlier days, but i still disable it. i forgot to do so on this config, when updating the nri code. do it now. Signed-off-by: Leah Rowe <leah@libreboot.org>	2024-04-21 03:16:43 +01:00
Leah Rowe	c557e9e0e1	haswell nri: set 8MB CBFS on thinkpads (fix S3) hell added a patch fixing S3 on haswell NRI, but it seems you still need to set 8MB CBFS size as with the MRC tested on a t440p. S3 now works on haswell NRI. Signed-off-by: Leah Rowe <leah@libreboot.org>	2024-04-21 01:52:29 +01:00